HP 1660 Series User manual

Service Guide
Publication number 01660-97002
First edition, August 1993
For Safety information, Warranties, and Regulatory
information, see the pages at the end of the book.
Copyright Hewlett-Packard Company 1987–1993
All Ri ght s Reser ved.
HP 1660 Series
Logic Analyzers

Printed in USA July 2004
Notice
Hewlett-Packard to Agilent Technologies Transition
This manual may contain references to HP or Hewlett-Packard. Please note that Hewlett-
Packard’s former test and measurement, semiconductor products and chemical analysis
businesses are now part of Agilent Technologies. To reduce potential confusion, the only
change to product numbers and names has been in the company name prefix: where a
product name/number was HP XXXX the current name/number is now Agilent XXXX. For
example, model number HP8648 is now model number Agilent 8648.
Contacting Agilent Sales and Service Offices
The sales and service contact information in this manual may be out of date. The latest
service and contact information for your location can be found on the Web at:
http://www.agilent.com/find/assist
If you do not have access to the Internet, contact your field engineer or the nearest sales
and service office listed below. In any correspondence or telephone conversation, refer to
your instrument by its model number and full serial number.
United States
(tel) 1 800 452 4844
(fax) 1 800 829 4433
Latin America
(tel) [phone]
(fax) [phone]
New Zealand
(tel) 0 800 738 378
(fax) 64 4 495 8950
Canada
(tel) [phone]
(fax) [phone]
Japan
(tel) (81) 426 56 7832
(fax) (81) 426 56 7840
Asia Pacific
(tel) (852) 3197 7777
(fax) (852) 2506 9284
Europe
(tel) (31 20) 547 2323
(fax) (31 20) 547 2390
Australia
(tel) 1 800 629 485
(fax) (61 3) 9210 5947

HP 1660A Series and HP 1660AS Series
Logic Analyzers
The HP 1660A Series are 100-MHz State/500-MHz Timing Logic Analyzers.
The HP 1660AS Series include all the features of the HP 1660A Series, as well as a
2-channel, 1 GSa/s oscilloscope.
Feat uresFeat ures
Some of the main features of the HP 1660 Series Logic Analyzers are as follows:
•128 data channels and 6 clock/data channels in the HP 1660A
•96 data channels and 6 clock/data channels in the HP 1661A
•64 data channels and 4 clock/data channels in the HP 1662A
•32 data channels and 2 clock/data channels in the HP 1663A
•3.5-inch disk drive
•HP-IB and RS-232C interface
•Variable setup/hold time
•4 kbytes deep memory on all channels with 8 kbytes in half channel mode
•Marker measurements
•12 levels of trigger sequencing for state and 10 levels of sequential triggering for
timing
•100 MHz time and number-of-states tagging
•Full programmability
The HP 1660AS Series Logic Analyzers also include the following features:
•1 GSa/s digitizing for 250 MHz bandwidth single shot oscilloscope
•8000 samples per channel
•Automatic pulse parameters, displays time between markers, acquires until
specified time between markers is captured, performs statistical analysis on time
between markers
•Lightweight miniprobes
Ser vi ce St r at egySer vi ce St r at egy
The service strategy for this instrument is the replacement of defective assemblies.
This service guide contains information for finding adefective assembly by testing
and servicing the HP 1660 Series.
This logic analyzer can be returned to Hewlett-Packard for all service work, including
troubleshooting. Contact your nearest Hewlett-Packard Sales Office for more details.
ii

The HP 1660-series Logic Analyzer
iii

In This Book
This book is the service guide for the HP 1660 Series Logic Analyzers and is divided into
eight chapters.
Chapt er 1 cont ains informat i on about t he logi c analyzer and i ncludes accessor ies,
specifications and characteristics, and equipment required for servicing.
Chapter 2 tells how t o prepare t he logic analyzer for use.
Chapt er 3 gives inst r uct ions on how t o t est t he perfor mance of t he logic analyzer.
Chapter 4 contains calibration instructions for the logic analyzer.
Chapter 5 contains self-tests and flowcharts for troubleshooting the logic analyzer.
Chapter 6 tellshow to replace assembliesof the logic analyzer and how to return them to
Hewlett-Packard.
Chapter 7 lists replaceable part s, shows an exploded view, and gives ordering information.
Chapter 8 explains how the logic analyzer works and what t he self-tests are checking.
iv

Contents
11 Gener al I nfor mat ionGeneral Information
Accessories 1-2
Specifications (logic analyzer) 1-3
Specifications (oscilloscope) 1-4
Char act er ist ics ( logic analyzer ) 1-5
Characteristics (oscilloscope) 1-5
Supplemental Characteristics (logic analyzer) 1-6
Supplemental Characteristics (oscilloscope) 1-9
Recommended Test Equipment (Logic Analyzer) 1-13
Recommended Test Equipment (Oscilloscope) 1-14
22 Preparing for UsePreparing for Use
To inspect the logic analyzer 2-2
To apply power 2-3
To operate the user interface 2-3
To set the line voltage 2-3
To degauss t he display 2-4
To clean t he logic analyzer 2-4
To test the logic analyzer 2-4
33 Testing PerformanceTesting Performance
To perform the self-tests 3-3
To make the test connectors (logic analyzer) 3-6
To test the threshold accuracy (logic analyzer) 3-8
Set up the equipment 3-8
Set up the logic analyzer 3-9
Connect the logic analyzer 3-9
Test theTTL threshold 3-10
Test theECL threshold 3-12
Test the- User threshold 3-13
Test the+ User threshold 3-14
Test the 0 VUser threshold 3-15
Test the next pod 3-16
To test the glitch capture ( logic analyzer) 3-17
Set up the equipment 3-17
Set up the logic analyzer 3-18
Connect the logic analyzer 3-18
Test the glitch capture on the connected channels 3-20
Test the next channels 3-22
v

To test the single-clock, single-edge, state acquisition ( logic analyzer) 3-23
Set up the equipment 3-23
Set up the logic analyzer 3-24
Connect the logic analyzer 3-25
Verify t he t est si gnal 3-28
Check the setup/hold combination 3-30
Test the next channels 3-34
To test the multiple-clock, multiple-edge, state acquisition (logic analyzer) 3-35
Set up the equipment 3-35
Set up the logic analyzer 3-36
Connect the logic analyzer 3-38
Verify t he t est si gnal 3-40
Check the setup/hold with single clock edges, multiple clocks 3-42
Test the next channels 3-46
To test the single-clock, multiple-edge, state acquisition (logic analyzer) 3-47
Set up the equipment 3-47
Set up the logic analyzer 3-48
Connect the logic analyzer 3-50
Verify t he t est si gnal 3-52
Check the setup/hold with single clock, multiple clock edges 3-54
Test the next channels 3-58
To test the timeinterval accuracy (logic analyzer) 3-59
Set up the equipment 3-59
Set up the logic analyzer 3-60
Connect the logic analyzer 3-62
Acquirethedata 3-63
To test the CAL OUTPUT ports (oscilloscope) 3-64
Set up the equipment 3-64
Set up the logic analyzer 3-65
Verify the DC CAL OUTPUT port 3-66
Set up the logic analyzer 3-67
Verify the ACCAL OUTPUT port 3-67
To test the input resistance (oscilloscope) 3-68
Set up the equipment 3-68
Set up the logic analyzer 3-69
Connect the logic analyzer 3-70
Acquirethedata 3-71
Perform an operational accuracy calibration 3-71
Contents
vi

To test the voltage measurement accuracy (oscilloscope) 3-72
Set up the equipment 3-72
Set up the logic analyzer 3-73
Connect the logic analyzer 3-74
Acquirethedata 3-75
To test the offset accuracy (oscilloscope) 3-76
Set up the equipment 3-76
Set up the logic analyzer 3-77
Connect the logic analyzer 3-78
Acquire the zero input data 3-79
Acquire the DC input data 3-80
To test the bandwidth (oscilloscope) 3-81
Set up the equipment 3-81
Set up the logic analyzer 3-82
Connect the logic analyzer 3-84
Acquirethedata 3-85
To test the time measurement accuracy (oscilloscope) 3-86
Set up the equipment 3-86
Set up the logic analyzer 3-87
Connect the logic analyzer 3-89
Acquirethedata 3-89
To test the trigger sensit ivity ( oscilloscope) 3-90
Set up the equipment 3-90
Set up the logic analyzer 3-91
Connect the logic analyzer 3-93
Acquirethedata 3-93
Performance Test Record ( logic analyzer) 3-94
Performance Test Record (oscilloscope) 3-101
44 Calibrating and AdjustingCalibrating and Adjusting
Logic analyzer calibration 4-2
To calibrate the oscilloscope 4-3
Set up the equipment 4-3
Load the Default Calibration Factors 4-4
Self Cal menu calibrations 4-5
To adjust theCRT monitor alignment 4-6
To adjust the CRT intensity 4-8
Contents
vii

55 TroubleshootingTroubleshooting
To usethe flowcharts 5-2
To check the power-up tests 5-15
To run the self-tests 5-16
To test the power supply voltages 5-22
To t est t he CRT monit or signal s 5-24
To t est t he keyboard signal s 5-25
To test the disk drive voltages 5-26
To perform theBNCtest 5-28
To test the logic analyzer probe cables 5-29
To test the auxiliary power 5-33
66 Replacing AssembliesReplacing Assemblies
To remove and replace the handle 6-5
To remove and replace the feet and tilt stand 6-5
To remove and replace the cover 6-5
To remove and replace the disk drive 6-6
To remove and replace the power supply 6-7
To remove and replace the CPU board 6-7
To remove and replace t he swit ch act uat or assembly 6-8
To remove and replace the rear panel assembly 6-9
To remove and replace the acquisition board (oscilloscope board for HP1660AS-series) 6-10
To remove and replace the front panel and keyboard 6-11
To remove and replace the intensity adjustment 6-11
To remove and replace the monitor 6-12
To remove and replace the handle plate 6-12
To remove and replace the fan 6-13
To remove and replace the line filter 6-13
To remove and replace the HP-IB and RS-232C cables 6-14
To ret urn assembl ies 6-15
77 Replaceable Part sReplaceable Parts
Replaceable Parts Ordering 7-2
Exploded View 7-3
Replaceable Parts List 7-4
Power Cables and Plug Configurations 7-8
Contents
viii

88 Theory of OperationTheor y of Operat ion
Block-Level Theory 8-3
The HP 1660 Series Logic Analyzer 8-3
The Logic Acquisition Board 8-6
The Oscilloscope Board 8-9
Self-Tests Description 8-12
Power-up Self-Tests 8-12
Syst em Test s ( Syst em PV) 8-13
Analyzer Tests ( Analy PV) 8-16
Oscilloscope Tests (Scope PV) 8-18
HP-IB 8-19
RS-232C 8-20
Contents
ix

x

1
Accessories 1-2
Specifications (logic analyzer) 1-3
Specifications (oscilloscope) 1-4
Char act er ist ics ( logic analyzer ) 1-5
Characteristics (oscilloscope) 1-5
Supplemental Characteristics (logic analyzer) 1-6
Supplemental Characteristics (oscilloscope) 1-9
Recommended Test Equipment (logic analyzer) 1-13
Recommended Test Equipment (oscilloscope) 1-14
General Information

General Information
This chapter lists the accessories, the specifications and characteristics, and the
recommended test equipment.
Accessories
The following accessories are supplied with the HP 1660 Series Logic Analyzers.
Accessories SuppliedAccessories Supplied HP Part NumberHP Part Number QtyQt y
Probe tip assemblies 01650-61608 Note 1
Probe cables 16550-61601 Note 2
Grabbers ( 20 per pack) 5090-4356 Note 1
Probe ground (5 per pack) 5959-9334 Note 1
Demo Training Kit E2433-60007 1
User’s Reference 01660-90904 1
Programming Reference 01660-90902 1
Service Guide 01660-90901 1
Accessories Pouch 01660-84501 1
RS-232C Loopback Connector 01650-63202 1
HIL Mouse A2838A 1
Note 1 Quantities: 8 - 1660A. 1660AS
6 - 1661A. 1661AS
4 - 1662A. 1662AS
2 - 1663A. 1663AS
Note 2 Quantities: 4 - 1660A. 1660AS
3 - 1661A. 1661AS
2 - 1662A. 1662AS
1 - 1663A. 1663AS
In addition to the above, the following accessories are supplied with the HP 1660AS Series
Logic Analyzers.
Accessories SuppliedAccessories Supplied HP Part NumberHP Part Number QtyQt y
10:1 probes 10430A 2
BNC miniprobe adapter 1250-1454 1
Accessories AvailableAccessories Available
Other accessories available for the HP 1660 Series Logic Analyzer are listed in the
Accessor i es for HP Logi c An alyzer s brochure.
1–2

Specifications (logic analyzer)
Thespecificationsarethe performance standardsagainst which theproduct istested.
Maximum State Speed 100 MHz
Minimum St ate Clock Pulse Width*3.5 ns
Minimum Master to Master Clock Time*10.0 ns
Minimum Glitch Width* 3.5 ns
Threshold Accuracy ±( 100 mV + 3% of
threshold setting)
Setup/Hold Time:*
Single Clock, Single Edge 0.0/3.5 ns through 3.5/0.0 ns,
adjustable in 500-ps increments
Single Clock, Multiple Edges 0.0/4.0 ns through 4.0/0.0 ns,
adjustable in 500-ps increments
Multiple Clocks, Multiple Edges 0.0/4.5 ns through 4.5/0.0 ns,
adjustable in 500-ps increments
*Specified for an input signal VH = −0.9 V, VL = −1.7 V, slew rate = 1 V/ns, and threshold = −1.3 V.
General Information
Specifications (logic analyzer)
1–3

Specifications (oscilloscope)
The HP 1660AS Logic Analyzers also include the following specifications:
Bandwidth (*,1) DC to 250 MHz ( real t ime, dc-coupled)
Time Interval Measurement Accuracy( *,3,6) ±[( 0.005% X ∆t)+
(2x 10
−6x delay setting) +150 ps]
DC Offset Accuracy(*) ±( 1.0% of channel offset + 2.0% of
full scale)
Volt age Measurement Accuracy(*,5) ±[( 1.5% of full scale + offset accuracy)
+ ( 0.008 x V/div) ]
Trigger Sensitivity(*) DC to 50 MHz: 0.063 x full scale,
50 to 250 MHz: 0.125 x full scale
Input R (selectable) (*) 1 MΩ: ±1%, 50 Ω: ±1%
* Specifications (valid within ±10°C of auto-calibration temperature, excluding bandwidth−see note 1 for bandwidth specification.
1. Upper bandwidth reduces by 2.5 MHz for every degree C above 35°C.
2. Rise time is calculated from the formula:
tr =0.35
bandwidth
3. Specification applies to the maximum sampling rate. At lower rates, the specification is:±[(0.005% x ∆t)+(2 x 10-6 x delay setting)
+ (0.15 x sample interval)] for bandwidth limited signals (tr= 1.4 x sample interval). Sample interval is defined as 1
sample rate
4. Vertical gain accuracy decreases 0.08% per degree C from software calibration temperature.
5. Digitizing level = (#vertical divisions)(1
2)( 1
LSB
), where LSB=2 # bits in ADC
6. The Time Interval Measurement Accuracy deteriorates across multiple modules connected as one unit with each added module.
General Information
Specifications (oscilloscope)
1–4

Characteristics (logic analyzer)
These characteristics are not specifications, but are included as additional information.
Full Channel Half Channel
Maximum State Clock Rate 100 MHz 100 MHz
Maximum Conventional Timing Rate 250 MHz 500 MHz
Maximum Transitional Timing Rate 125 MHz 250 MHz
Maximum Timing with Glitch Rate N/A 125 MHz
Memory Depth 4K 8K*
Channel Count :
HP 1660A/AS 136 68
HP 1661A/AS 102 51
HP 1662A/AS 68 34
HP 1663A/AS 34 17
* For all modesexcept glitch.
Characteristics (oscilloscope)
The HP 1660AS Logic Analyzers also include the following characteristics:
Maximum Sample Rate 1 Gigasample per second
Number of Channels 2
Rise Time(2) 1.4 ns
ADC 8-bit real time
Vertical Resolution 8 bits over 4 vertical divisions ( ±0.4%)
Waveform Record Length 8000 points
Vertical ( DC) Gain Accuracy(4) ±1.25% of full scale
Input Coupling 1 MΩ: ac and DC, 50 Ω: DC only
Input C Approximately 7 pF
General Information
Characteristics (logic analyzer)
1–5

Supplemental Characteristics (logic analyzer)
ProbesProbes
Input Resistance 100 kΩ, ±2%
Input Capacitance ~ 8 pF
Minimum Voltage Swing 500 mV, peak-to-peak
Threshold Range ±6.0 V, adjustable in 50-mV increments
St at e A nal ysi sSt at e A nal ysi s
State/Clock Qualifiers 6
Time Tag Resolution*8 ns or 0.1%, whichever is greater
Maximum Time Count
Between States 34 seconds
Maximum State Tag Count*4.29 x 109
Timing AnalysisTiming Analysis
Sample Period Accuracy 0.01 % of sample period
Channel-to-Channel Skew 2 ns, typical
Time Interval Accuracy ±[sample period + channel-to-channel skew
+( 0.01%) ( time reading) ]
Tr i gger i ngTr i gger i ng
Sequencer Speed 125 MHz, maximum
St at e Sequence L evel s 12
Timing Sequence Levels 10
Maximum Occurrence Counter
Value 1,048,575
Pat tern Recognizers 10
Maximum Pattern Width 136 channels in HP 1660A, 102 channels in HP 1661A,
68 channels in HP 1662A, 34 channels in HP 1663A
Range Recognizers 2
Range Width 32 bits each
Timers 2
Timer Value Range 400 ns to 500 seconds
Glitch/Edge Recognizers 2 ( timing only)
Maximum Glitch/Edge Width 136 channels in HP 1660A, 102 channels in HP 1661A,
68 channels in HP 1662A, 34 channels in HP 1663A
*Maximum state clock rate with time or state tags on is 100 MHz. When all pods are assigned to a state or timing machine,
time or state tags halve the memory depth.
General Information
Supplemental Characteristics (logic analyzer)
1–6

Measurement and Display FunctionsMeasurement and Display Functions
Di splayed WaveformsDisplayed Waveforms 24 lines maximum, with scrolling across 96 waveforms.
Measurement FunctionsMeasurement Functions
Run/Stop FunctionsRun/Stop Functions Run starts acquisition of datain specified trace mode.
St opStop In singletracemodeor the first run of arepetitiveacquisition, Stop halts
acquisition and displaysthe current acquisition data. For subsequent runs in repetitive
mode, Stop halts acquisition of data and does not change the current display.
Trace ModeTrace Mode Single mode acquires data once per trace specification. Repetitive mode
repeats single mode acquisitions until Stop is pressed or until the time interval between
two specified patterns is less than or greater than a specified value, or within or not
within aspecified range.
IndicatorsIndicators
Activity IndicatorsActivity Indicators Provided in the Configuration and Format menusfor identifying
high, low, or changing states on the inputs.
MarkersMar k er s Two markers ( X and O) are shown as vert ical dashed lines on t he display.
Tr i ggerTrigger Displayed as avertical dashed line in the Timing Waveform display and as line 0
in the State Listing display.
Data Entry/DisplayData Entry/Display
LabelsLabel s Channels may be grouped toget her and given a 6-character name. Up to
126 labels in each analyzer may be assigned with up to 32 channels per label.
Display ModesDi spl ay M odes St at e list ing, St at e Wavef or ms, Char t , Compar e List ing, Compar e
Differ ence List ing, Timing Waveforms, and Timing List i ngs. St at e List ing and Timing
Waveformscan be time-correlated on thesamedisplays.
Timing WaveformTiming Waveform Pattern readout of timing waveforms at X or Omarker.
BasesBases Binary, Octal, Decimal, Hexadecimal, ASCII (display only), Two’sComplement,
and User-defined symbols.
SymbolsSymbols 1,000 maximum. Symbols can be downloaded over RS-232 or HP-IB.
General Information
Supplemental Characteristics (logic analyzer)
1–7

Marker FunctionsMarker Functions
Time IntervalT i me I n t er val The X and O mar kers measur e t he t i me int er val bet ween a poi nt on a
timing waveform and t he trigger, two points on the same timing waveform, two points on
different waveforms, or two states (time tagging on).
Delta StatesDelt a St at es ( st at e analyzer only)( st at e anal yzer only) The X and O markers measure the number of
tagged states between one state and trigger or between t wo states.
Pat t ernsPat t er ns The X and O markers can be used to locate the nth occurrence of a specified
pattern from t rigger, or from the beginning of data. The O marker can also find the n th
occurrence of a pattern from the X marker.
St at i st i csSt at i st i cs X and O mar ker st at ist ics are calculat ed for repet it ive acquisit ions. Pat t er ns
must be specified for both markers, and statistics are kept only when both patterns can
be found in an acquisition. Statistics are minimum X to O time, maximum X to O time,
average X to Otime, and ratio of valid runsto total runs.
Auxiliary PowerAuxiliary Power
Power Through Cables 1/3 amp at 5 V maximum per cable
Operating EnvironmentOperating Environment
Temperature Instrument, 0 °C to 55 °C ( +32 °F to 131 °F).
Probe lead sets and cables,
0 °C to 65 °C ( +32 °F to 149 °F).
Humidity Instrument, probe lead sets, and cables, up to
95% relative humidity at +40 °C(+ 122 °F) .
Altitude To 4600 m ( 15,000 ft ) .
Vibration Operating: Random vibration 5 to 500 Hz,
10 minutes per axis, ≈0.3 g ( rms) .
Non-operating: Random vibration 5 to 500 Hz,
10 minutes per axis, ≈ 2.41 g ( rms) ;
and swept sine resonant search, 5 to 500 Hz,
0.75 g ( 0-peak) , 5 minute resonant dwell
at 4 resonances per axis.
DimensionsDimensions
General Information
Supplemental Characteristics (logic analyzer)
1–8

Product RegulationsProduct Regulations
Safety IEC 348
UL 1244
CSA Standard C22.2 No.231 ( Series M-89)
EMC This product meets the requirement of t he European
Communities (EC) EMC Directive 89/336/EEC.
Emissions EN55011/CSIPR 11 ( ISM, Group1,Class A equipment)
SABS RAA Act No. 24( 1990)
Immunity EN50082-1 Code1Notes2
IEC 801-2 ( ESD) 4kV CD, 8kV AD 2
IEC 801-3 ( Rad.) 3V/m 1
IEC 801-4 ( EFT) 1kV 2
1Performance Codes:
1 PASS - Normal operations, no effect.
2 PASS - Temporary degradation, self recoverable.
3 PASS - Temporary degradation, operator intervention required.
4 FAIL - Not recoverable, component damage.
2Notes: ( None)
Supplemental Characteristics (oscilloscope)
Ver t ical ( at BNC)Ver t ical ( at BNC)
Vertical Sensitivity Range 4 mV/div to 10 V/div in 1-2-4 increments
(1:1 Probe)
DC Offset Range (1:1 Probe)
Vertical Sensitivity Available Offset
4 mV/div to 100 mV/div ±2 V
>100 mV/div to 500 mV/div ±10 V
>500 mV/div to 2.5 V/div ±50 V
>2.5 V/div to 10 V/div ±250 V
Probe Factors Any integer ratio from 1:1 to 1000:1
Maximum Safe Input Voltage 1 MΩ: ±250 V [DC + peak ac ( < 10 KHz) ]
50 Ω: ±5 VRMS
Channel-to-Channel Isolation DC to 50 MHz: 40 dB, 50 MHz to 250 MHz: 30 dB
TimebaseTimebase
Range 1 ns/div to 5 s/div
Resolution 20 ps
Delay Pre-trigger Range
Time/div Setting Available Delay
1 µs to 5 s/div -8 x (s/div)
1 ns to 500 ns/div -4 µs
Delay Post-trigger Range
Time/div Setting Available Delay
100 ms to 5 s/div 2.5 ks
1 µs to 50 ms/div 33,500 x ( s/div)
1ns to 500 ns/div 16.7 ms
General Information
Supplemental Characteristics (oscilloscope)
1–9