Infineon XMC4000 series User manual

Microcontroller
XMC4000
XMC4000 Family
User Guide
Device Guide
<Revision 1.0>, <2012-30-03>
Preliminary
CCU8 and Cross Interconnections
Top-Level Interconnect Control

Edition <2012-30-03>
Published by
Infineon Technologies AG
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© 2012 Infineon Technologies AG
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Device Guide XMC4000
CCU8 and Cross Interconnections
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Device Guide XMC4000
CCU8 and Cross Interconnections
Table of Contents
User Guide 4 <Revision 1.0>, <2012-30-03>
Device Guide
Table of Contents
1Top Level Interconnect Control........................................................................................................6
2Top-Level Control of Event Requests to/from a Timer Slice.........................................................7
2.1 CCU8 Using Top-Level Interconnect Control with Event Request Unit (ERU)....................................8
2.2 CCU8 and ERU Use Cases .................................................................................................................8
2.2.1 Example –Using CCU8 and ERU1 for Delayed ADC-Start controlled by an IO...............................10
3Getting Started with CCU8 and Cross Interconnections .............................................................11
3.1 Getting Started with the CAPCOM8 Unit CCU8x...............................................................................11
3.1.1 Using the CAPCOM8 External Events Control Setup Registers .......................................................11
3.1.2 CAPCOM8 External Event Control Register Bitfields ........................................................................11
3.2 Getting Started with Event Request Unit –ERU1..............................................................................11
3.3 Cross Interconnection Example –Using CCU8, ERU1, ADC and GPIO...........................................11
3.3.1 ADC Request on Port Pin P1.15 State AND the Timer CCU80CC81 Status Bit...............................11
3.3.2 Event Request Unit Block Diagrams and Control Registers..............................................................13

Device Guide XMC4000
CCU8 and Cross Interconnections
List of Figures
User Guide 5 <Revision 1.0>, <2012-30-03>
Device Guide
List of Figures
Figure 1 The Top-Level (Cross) Interconnect matrix .........................................................................................6
Figure 2 Example with an ADC cross connected to a Timer via the Top-Level Interconnect matrix.................7
Figure 3 Top-Level Interconnect with conditional event request control by the Event Request Unit.................8
Figure 4 Details of a CCU8 Timer Slice system interactions by Top-Level Interconnect Control....................10
Figure 5 Using CCU8 and ERU1 for Delayed ADC Start controlled by an IO .................................................10
Figure 6 Event Request Unit Block Diagrams and Control Registers..............................................................13

Device Guide XMC4000
CCU8 and Cross Interconnections
Top Level Interconnect Control
User Guide 6 <Revision 1.0>, <2012-30-03>
Device Guide
1 Top Level Interconnect Control
The comprehensive matrix of interconnect lines enables signals to get directly from one system unit to another –
e.g. an ADC conversion may be started directly by a signal from a timer. Such immediate interconnections are
described by the so called Top-Level Interconnect matrix –a table that is embodied by a block shown here.
See Figure 1.
See Figure 2.
Figure 1 The Top-Level (Cross) Interconnect matrix

Device Guide XMC4000
CCU8 and Cross Interconnections
Top-Level Control of Event Requests to/from a Timer Slice
User Guide 7 <Revision 1.0>, <2012-30-03>
Device Guide
Figure 2 Example with an ADC cross connected to a Timer via the Top-Level Interconnect matrix
2 Top-Level Control of Event Requests to/from a Timer Slice
Top-Level Control of Event Requests is a flexible control and crossunit distribution of event signals to/from a
slice. The Event Request Unit (ERU1) may combine events via the Top-Level Interconnect matrix. Hence a
crossunit event flow can be top-level controlled without SW according to a request-to-action event pattern setup.

Device Guide XMC4000
CCU8 and Cross Interconnections
Top-Level Control of Event Requests to/from a Timer Slice
User Guide 8 <Revision 1.0>, <2012-30-03>
Device Guide
Figure 3 Top-Level Interconnect with conditional event request control by the Event Request Unit
2.1 CCU8 Using Top-Level Interconnect Control with Event Request Unit (ERU)
A slice interface to the ERU1 and to the Top-Level Interconnect matrix can be shown by a simplified scheme.
To complete the picture of capable interactions, this scheme also shows how operations can be extended to
involve DMA transfers (by the GPDMA), triggered by a handler (DLR) on the Service Request Lines (SRn).
See Figure 3
2.2 CCU8 and ERU Use Cases
If an application requires ADC conversions to start on timer events under specific conditions, i.e. if not directly
via a Top-Level Interconnect matrix path, then the ERU1 is able to offer an alternative signal path. It may
involve dependence on a port pin, time window due to a second timer –or a certain sequence of event patterns.

Device Guide XMC4000
CCU8 and Cross Interconnections
Top-Level Control of Event Requests to/from a Timer Slice
User Guide 9 <Revision 1.0>, <2012-30-03>
Device Guide

Device Guide XMC4000
CCU8 and Cross Interconnections
Top-Level Control of Event Requests to/from a Timer Slice
User Guide 10 <Revision 1.0>, <2012-30-03>
Device Guide
Figure 4 Details of a CCU8 Timer Slice system interactions by Top-Level Interconnect Control
2.2.1 Example –Using CCU8 and ERU1 for Delayed ADC-Start controlled by an IO
See Figure 5.
The CCU8xCC8y is here a single shot delay timer. Its status bit (red) that is delayed and set by compare event,
shall delay an ADC-start when triggered by a PWM timer (blue) on a GPIO state (orange). The ERU1 combines,
detects and links it all as a trigger (grey) via the delay timer and the Top-Level Interconnect matrix to the ADC.
Figure 5 Using CCU8 and ERU1 for Delayed ADC Start controlled by an IO

Device Guide XMC4000
CCU8 and Cross Interconnections
Getting Started with CCU8 and Cross Interconnections
User Guide 11 <Revision 1.0>, <2012-30-03>
Device Guide
3 Getting Started with CCU8 and Cross Interconnections
3.1 Getting Started with the CAPCOM8 Unit CCU8x
In the following examples the ERU1 and CAPCOM8 Ultimate Initialization Sequence is assumed before start!
3.1.1 Using the CAPCOM8 External Events Control Setup Registers
The Input Selection register CC8yINS maps External-Event-Sources and Edge/Level Mode conditions to the
Event[2:0] Input Lines. In turn the Connection Matrix Control register CC8yCMC maps the three Event[2:0] Input
Lines to any of the 11 Input Functions. The Timer Control register CC8yTC enables different Mode Alternatives.
3.1.2 CAPCOM8 External Event Control Register Bitfields
1. CC8yCMC.<function> Input function selection and Event Number (x=0-2) Input Line Selection bitfield
2. CC8yINS.<Event-xbitfields> Event-x source EVxIS (CC8yINS[P:A]), mode EVxEM or EVxLM bitfields
3. CC8yTC.<Mode bitfields> Timer Mode selections e.g. Modes/Extended modes, Counting Schemes etc
Note:When using the index „x‟ in event nomenclature, it should be understood as „Actual Event[2:0] Number ‟.
Note:When using the index „x‟ in CCU8x nomenclature, it should be understood as „Actual CCU8 Unit Number‟.
Note:The Ultimate Event  Number „x‟ for the Input Function is x == <function>-1 (when <function> != 0).
<function> == 0 means “disabled”.
3.2 Getting Started with Event Request Unit –ERU1
There are simply just one Input Selection Register plus two Control Registers per input channel x(x=0-3) to
setup the entire functionality of an ERU on a Top Level and channel wise target the Output Channels y (y=0-3):
EXISEL Input Selection Register
EXICONx Input and Trigger Control Register
EXOCONx Output Control Register
Initializations and functions are determined by writing to the respective register bitfields.
See Figure 5.
3.3 Cross Interconnection Example –Using CCU8, ERU1, ADC and GPIO
3.3.1 ADC Request on Port Pin P1.15 State AND the Timer CCU80CC81 Status Bit
See Figure 6.
Setup ERU1 Input Channel x=1, targeting the Output Channel y=2 (IOUT2), from which a link to the ADC
Trigger Request N Input, Group 2 or 3 can be routed –as follows:
// Select Event Request for input Aand Bin the ERU1_EXISEL register bitfields:
EXS1A = 0; // select input ERU1_1A0 –i.e. B connected to a GPIO port pin P1.15
EXS1B = 1; // select input ERU1.1B1 –i.e. B connected to CCU80.ST1status bit 1
// Select logical combinations that should be taken into account as event request
NA = 0; // input A is used directly, i.e. not inverted
NB = 0; // input A is used directly, i.e. not inverted
SS = 3;// setup source combination, i.e. logical condition: input A AND input B
// Select Event Trigger Logic conditions for trigger, level detect and event edge

Device Guide XMC4000
CCU8 and Cross Interconnections
Getting Started with CCU8 and Cross Interconnections
User Guide 12 <Revision 1.0>, <2012-30-03>
Device Guide
PE = 1;// set trigger pulse enable, i.e. an output trigger pulse will be created
LD = 0; // define event flag sticky, i.e. it will not be rebuild by HW, but by SW
RE = 1;// detection on Rising Edge, i.e. event edge on positive signal transition
FE = 0; // no detection on Falling Edge
// Perform Cross Connect Selection, i.e. select target output channel y (here y=2)
// for the Event Trigger Logic Output Pulse TR1 from input channel x (here x=1):
// Target register for the following mapping is EXICONx, i.e. here ERU1_EXICON1:
OCS = 2; // the channel output (IOUT2) would trigger the following destinations:
// CCU8x.IN2(K) - i.e. CAPCOM8 Unit CCU8x, Slice CC82 Timer Input
// CCU8x.IN2(G) - i.e. CAPCOM8 Unit CCU8x, Slice CC82 Timer Input
// VADC.G2REQTRN - i.e. ADC Trigger Request N Input, Group 2
// VADC.G3REQTRN - i.e. ADC Trigger Request N Input, Group 3
// ERU1.1B3 - i.e. A trigger feed-back to ERU1 Channel Input 1B3
// NVIC.SR7 - i.e. A trigger puls to Service Request Line nr 7
// POSIF0.MSET(F) - i.e. POSIF 0 Multi Channel Next Pattern Update Set
// POSIF1.MSET(F) - i.e. POSIF 1 Multi Channel Next Pattern Update Set
// Select Event Output Trigger Control 2 Register ERU1_EXOCON2 for output gating
// Select Output Gating functions –Here: just a straight forward alternative:
// Target register for the following mapping is EX0CONy, i.e. here ERU1_EXOCON2:
ISS = 0; // set the Internal Peripheral Trigger Source Selection =0, “no source”
GEEN = 0; // disable “Gating Event Enable on Pattern Detection Changes” trigger
GP = 1;// set “Output Gating Select on Pattern Detection” =1, to activate IOUT2
IPEN0, IPEN1, IPEN2, IPEN3 = 0;// disable the Pattern Detection Enable flags

Device Guide XMC4000
CCU8 and Cross Interconnections
Getting Started with CCU8 and Cross Interconnections
User Guide 13 <Revision 1.0>, <2012-30-03>
Device Guide
3.3.2 Event Request Unit Block Diagrams and Control Registers
Figure 6 Event Request Unit Block Diagrams and Control Registers

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