Intel QM77 User manual

Document Number: 328076-001
Intel® Core™ i5-3610ME
Processor (PGA) and
Mobile Intel® QM77 Express
Chipset Development Kit
User Guide
November 2012

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
2 Document Number: 328076-001
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Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
November 2012 User Guide
Document Number: 328076-001 3
Contents
1Introduction ...................................................................................................... 6
1.1 Terminology ........................................................................................... 6
1.2 Reference Documents.............................................................................. 8
1.3 Development Kit Items ............................................................................ 8
2Features ........................................................................................................... 9
3Power management ..........................................................................................12
3.1 Power Management States ......................................................................12
4Reference Board Summary ................................................................................14
4.1 Connectors............................................................................................17
4.1.1 Back Panel Connectors ..............................................................17
4.1.2 Configuration Settings...............................................................17
4.1.3 Header Pinout Configuration.......................................................19
4.1.3.1 J3C2/J3C1- Dual Channel LVDS Data Connector ............20
4.1.3.2 Embedded Display Port (eDP) connector .......................21
4.1.3.3 Front Panel Status Indicating and Control Connector ......22
4.2 Power On and Reset Buttons ...................................................................23
Figures
Figure 1. Block Diagram................................................................................................... 9
Figure 2. Board Layout - Top view....................................................................................14
Figure 3. Board Layout –Bottom view ..............................................................................15
Figure 4. Back Panel Connectors ......................................................................................17
Tables
Table 1. Terminology...................................................................................................... 6
Table 2. Reference Documents ........................................................................................ 8
Table 3. Feature set summary ......................................................................................... 9
Table 4. Power Management States Description ................................................................12
Table 5. Development Kit states .....................................................................................12
Table 6. Components list ...............................................................................................16
Table 7. J1D3-Clear/Keep CMOS Setting ..........................................................................17
Table 8. J1D2-Clear/Keep ME Register Setting ..................................................................18
Table 9. J1B1-Flash descriptor security override ...............................................................18
Table 10. J1D1-Enable the Operating Voltage of LVDS and eDP ............................................18
Table 11. J4C1-Select LVDS panel Operating Voltage ..........................................................18
Table 12. J3F2-Select eDP panel Operating Voltage.............................................................18
Table 13. J2G1/J2G2/J2G3 USB Port .................................................................................19

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
4 Document Number: 328076-001
Table 14. J2C1/J1C1Serial Port.........................................................................................19
Table 15. J2B1 GPIO Header ............................................................................................19
Table 16. J3B1- TPM Pin Header .......................................................................................20
Table 17. J4C2-LVDS Backlight Control Connector ..............................................................20
Table 18. J3C2 LVDS1 Connector ......................................................................................21
Table 19. J3C1 LVDS2 Connector ......................................................................................21
Table 20. J3F1 Embedded Display Port (eDP) Connector ......................................................22
Table 21. J1G3 Power Switch and HDD Indicator header......................................................22
Table 22. J1G1 Power Indicator Header .............................................................................23
Table 23. J1G2 Speaker Output Header .............................................................................23

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
November 2012 User Guide
Document Number: 328076-001 5
Revision History
Date
Revision
Description
November 2012
1.0
Initial release.
§

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
6 Document Number: 328076-001
1Introduction
This User Guide describes the typical hardware set-up procedures, features, and use
of the Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit. Read this document in its entirety prior to powering ON. The
Quick Start document provides quick start procedures for reference. It is
recommended to have the schematics present as you proceed through this document.
The Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit is a dual channel DDR3 mobility platform. It is designed to
support the Ivy Bridge and Sandy Bridge processors and the Panther Point-M Chipset.
1.1 Terminology
Table 1. Terminology
Term
Description
ACPI
Advanced Configuration + Power Interface
AHCI
Advanced Host Controller Interface for Serial ATA
BCLK
FSB Clock used for CPU Clock domain (Eg: 167/200/266/333)
BIOS
Basic Input Output System
CMOS
Refers to the non-volatile configuration memory in the PCH
DDR3
Double Data Rate Synchronous Dynamic Random Access Memory third
generation
DP
Display Port
DVI
Digital Visual Interface
eDP
Embedded Display Port
GND
Signal Ground
HDD
Hard disk drive
HDMI
High Definition Multimedia Interface
HSD
High Speed Database
IMVP-6
Intel Mobile Voltage Positioning 6
ITP-XDP
In-target-probe –eXtended debug port

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
November 2012 User Guide
Document Number: 328076-001 7
Term
Description
JTAG
Joint Test Action Group, IEEE 1149.1 standard for test access port and
boundary scan.
LVDS
Low-voltage Differential Signaling
OS
Operating System
PCH
Platform Controller Hub
PCI
Peripheral Component Interface
PCIe
Peripheral Component Interface Express
POST
Power-On Self Test
PPT
Panther Point
PS2
Programming System 2 (IBM) defines keyboard and mouse interface
S3
“Save to RAM” Sleep State
S5
“Soft Off” Sleep State
SATA
Serial - Advanced Technology Attachment
SIO
Super Input Output device
SLP
Sleep
SMBUS
System Management Bus, a two wire serial bus used for low-
bandwidth communication
SO-DIMM
Memory Module
USB
Universal Serial Bus
VAC
Volt AC
VCC
Used to signify circuit logic voltage
VDC
Volt DC
VDD
Used to signify DIMM logic supply voltage
VGA
Video Graphics Array
VID
Voltage Identification
VREF
Voltage reference
VSS
Used to signify ground connection
VTT
Used to signify signal termination voltage

Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
8 Document Number: 328076-001
Term
Description
VTT
Voltage Transient Test tool
XDP
eXtended Debug Port (See ITP-XDP)
1.2 Reference Documents
Table 2. Reference Documents
Document
Document
No./Location
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit Quick Start Guide
328077
1.3 Development Kit Items
The development kits include these items.
Note: All kit items need to be specifically ordered
•Board
•Fanless Chassis
•2G DDR3 non ECC SO-DIMM memory
•150W power adaptor
•SATA + power cable (custom made)
•60G SSD Hard Disk
•Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit Quick Start
•DVD installer driver
§

Features
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
November 2012 User Guide
Document Number: 328076-001 9
2Features
Figure 1. Block Diagram
Table 3. Feature set summary
Feature
Description
Implementation
Comments
Processor
Ivy Bridge-Mobile processor
supported in 989pin rPGA
package
Ci5 Ivy Bridge 2C CR i5-3610ME 2.7G 3M
Refdes on board: U5E1
Chipset
Panther Point- M
989-pin FCBGA Foot-Print;
Refdes on board: U3D1
Memory
2x DDR3 SODIMM non ECC
slots
Maximum capacity of 8GB using 4Gb
technology;
Minimum capacity of 256 MB using 512 Mb
technology;
Supports DDR3 frequency of up to 1600
MT/s with Ivy Bridge;
Refdes on Board: DIMM1, DIMM 2

Features
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
10 Document Number: 328076-001
Feature
Description
Implementation
Comments
SIO
NCT6776F
Nuvoton LPC I/O;
Refdes on Board:U2D1
Video
1x 24-bit dual channel
LVDS Interface
There are 3 connectors on board:
2 LVDS 20pins data connector
Redfes on Board:J3C2, J3C1
1 LVDS backlight connector
Redfes on Board:J4C2
Embedded Display Port
(eDP)
x4 eDP (18bit, single channel) from CPU
connected to onboard eDP connector
Redfes on Board:J3F1
Display Port
Connect from chipset Port B to DP
connector
Redfes on Board:J3A2
HDMI
Connect from chipset Port C to HDMI
connector
Redfes on Board:J4A1
DVI-D
Connect from chipset Port D to DVI-D
connector
Refdes on board: J6A1
SDVO
N/A in this Development Kit
CRT
On Board right-angled CRT Connector
Refdes on board: J6A1
PCI Express
8x PCIe lanes from Panther
Point
PCI Express 2.0 Compliance, 2.5GT/s
PCIe1-4 to PCIe x4 slot
Refdes on board: J1B2
PCIe5, PCIe 6 to 2 PCIe x1 slot (optional)
Refdes on board: J1F2, J1A1
PCIe7 to WLAN mini PCIe
Refdes on board: J6R1
PCIe8 to 82579 (Lewisville) LAN
On-Board LAN
82579 (Lewisville) PHY
supported
Refdes on board: U2C1
BIOS (SPI)
SPI flash devices
Support for multi-vendor SPI;
2x 4MB SOIC-8 parts provided on board.
Refdes on board: U2E4, U2E3
Support multi package (SOIC-8 & SOIC-16)
(optional)
Refdes on board: U2E2, U2E1
SATA
2x SATA III Ports
SATA connector with 4 pin power header on
board
SATA III connector