
R6-NE2
EM-7790 Rev.5 P. 7 / 9
MG CO., LTD. www.mgco.jp
5-2-55 Minamitsumori, Nishinari-ku, Osaka 557-0063 JAPAN
MODBUS I/O ASSIGNMENTS
The DIP SW located at the side of the module switches the unit’s data allocation mode.
In the Data Allocation Mode 1, one (1) word is assigned per module. The second channel of analog I/O modules cannot be used.
In the Data Allocation Mode 2, two (2) words are assigned per module regardless of whether the second word area is required
or not.
For discrete I/O, 16-channel area is automatically assigned to each module. With a 4-channel module, the bits assigned to ch.
5 through 16 remain “0.”
Note: DO NOT access addresses other than mentioned below. Such access may cause problems such as inadequate operation.
Coil (0X) 1 – 16 Module address 0 Do 1 – 4
17 – 32 Module address 1 Do 1 – 4
33 – 48 Module address 2 Do 1 – 4
49 – 64 Module address 3 Do 1 – 4
: : :
497 – 512 Module address 31 Do 1 – 4
Inputs (1X) 1 – 16 Module address 0 Di 1 – 4
17 – 32 Module address 1 Di 1 – 4
33 – 48 Module address 2 Di 1 – 4
49 – 64 Module address 3 Di 1 – 4
: : :
497 – 512 Module address 31 Di 1 – 4
513 – 544 Active module map
545 – 560 Status
561 – 624 Channel status
■Data Allocation Mode 1
Input Registers
(3X)
1 Module address 0 Ai 1 (INT)
2 Module address 1 Ai 1 (INT)
3 Module address 2 Ai 1 (INT)
4 Module address 3 Ai 1 (INT)
: : :
32 Module address 31 Ai 1 (INT)
33, 34 Module address 0 Ai 1 (Float)
35, 36 Module address 1 Ai 1 (Float)
37, 38 Module address 2 Ai 1 (Float)
39, 40 Module address 3 Ai 1 (Float)
: : :
95, 96 Module address 31 Ai 1 (Float)
Holding Registers
(4X)
1 Module address 0 Ao 1 (INT)
2 Module address 1 Ao 1 (INT)
3 Module address 2 Ao 1 (INT)
4 Module address 3 Ao 1 (INT)
: : :
32 Module address 31 Ao 1 (INT)
33, 34 Module address 0 Ao 1 (
Float
)
35, 36 Module address 1 Ao 1 (
Float
)
37, 38 Module address 2 Ao 1 (
Float
)
39, 40 Module address 3 Ao 1 (
Float
)
: : :
95, 96 Module address 31 Ao 1 (
Float
)
■Data Allocation Mode 2
Input Registers
(3X)
1 Module address 0 Ai 1 (INT)
2 Module address 0 Ai 2 (INT)
3 Module address 1 Ai 1 (INT)
4 Module address 1 Ai 2 (INT)
: : :
63 Module address 31 Ai 1 (INT)
64 Module address 31 Ai 2 (INT)
65, 66 Module address 0 Ai 1 (Float)
67, 68 Module address 0 Ai 2 (Float)
69, 70 Module address 1 Ai 1 (Float)
71, 72 Module address 1 Ai 2 (Float)
: : :
189, 190 Module address 31 Ai 1 (Float)
191, 192 Module address 31 Ai 2 (Float)
Holding Regis-
ters
(4X)
1 Module address 0 Ao 1 (INT)
2 Module address 0 Ao 2 (INT)
3 Module address 1 Ao 1 (INT)
4 Module address 1 Ao 2 (INT)
: : :
63 Module address 31 Ao 1 (INT)
64 Module address 31 Ao 2 (INT)
65, 66 Module address 0 Ao 1 (
Float
)
67, 68 Module address 0 Ao 2 (
Float
)
69, 70 Module address 1 Ao 1 (
Float
)
71, 72 Module address 1 Ao 2 (
Float
)
: : :
189, 190 Module address 31 Ao 1 (
Float
)
191, 192 Module address 31 Ao 2 (
Float
)