MiTAC PD10AI User manual

1
MITAC Desktop Board PD10AI
Product Guide

2
Desktop Board Features
This chapter briefly describes the features of Desktop Board PD10AI.
Below to summarizes the major features of the Desktop Board.
Feature Summary
T ABL E : M I TAC D ESKTOP B OARD PD10AI F EATURES
Form Factor
Low-profile Mini-ITX (20 millimeters [0.79 inches] x 170.18
millimeters [6.7 inches] x 170.18 millimeters [6.7 inches])
Processor Chipset
Intel Apollo Lake Processor with integrated graphics (Compatible
with N3350 and N4200)
Main Memory
Support for dual channel DDR3L 1866 SO-DIMMs
Support for up to 8 GB of system memory on a single SO-DIMM
(or 4 GB each by 2 SO-DIMM)
204-pin DDR3L SO-DIMM
2
Audio Controller
Realtek ALC283 audio codec
Expansion
Capability
PCI Express 2.0 x1 add-in card connector
1
M.2 B KEY (2242/2260/2280) with USB2.0 and SATA III
signal for SSD
1
M.2 E KEY (2230) with PCIex1 and USB2.0 signal for
wireless
1
External I/O
DC-in Jack
1
HD-out
1
DP-out
1
line-out
1
Mic-in
1
USB 3.0 back panel connectors
4
RJ45
2
Internal I/O
LVDS Connector (40Pin)
1
eDP Connector (40Pin) (colay with LVDS connector
1
Stereo speaker header
1
HD Audio/AC'97 headphone/mic
1
USB 2.0 front panel ports
2
SATA 3.0 Gb/s
1
SATA 3.0 Gb/s port (multiplexed with an m.2 B KEY
slot)
1
Serial port header
2
Parallel port header (Option with MiAPI header)
1
4-pin system fan header
2
2 pin power connector
1
S I/O Controller
NCT6793D

3
LAN Support
Intel I211-AT (10/100/1000 Mb/s) Ethernet LAN controller *2
BIOS
BIOS resident in a Serial Peripheral Interface (SPI) Flash device
Support for Advanced Configuration and Power Interface (ACPI),
and System Management BIOS (SMBIOS)
Hardware
Management
Nuvoton NCT6793D based subsystem, including:
Voltage sense to detect out of range power supply voltages
Thermal sense to detect out of range thermal values
Environment
Operating Temperature: 0°C to +60°C
Storage Temperature: -20°C to +70°C
Safety
CE
FCC

4
Desktop Board Components
Figure shows the approximate location of the major components on the top side of
MiTAC Desktop Board PD10AI.
Figure: MiTAC Desktop Board PD10AI Components (Top)

5
T ABL E : M I TAC D ESKTOP B OARD PD10AI C OMPO NENTS
A
Back Panel Connectors
B
12V 2-PIN DC-in
C
M.2 Key-E
D
SATA 7-Pin Connector
E
Com2 RS232 Power Select
F
SATA Power Connector
G
SO-DIMM slot
H
CPU Fan Header
I
System Fan Header
J
Chassis Front I/O Header
K
LVDS Connector (eDP Connector at the bottom side)
L
Panel Power
M
LCD Panel Power Select
N
Inverter Power Select
O
USB 2.0 Header
P
M.2 Key-B
Q
Parallel port/ MiAPI Header
R
CMOS Reset
S
Legacy I/O Header
T
COM1 RS232
U
COM1 RS232 Power Select
V
COM2 RS232
W
AT/ATX Mode
X
MCU Program Header
Y
PCI Express X1 Connector
Z
Speaker Header
AA
Front Panel Audio Header

6
Processor
MITAC Desktop Board PD10AI includes apassively-cooled, Intel Apollo Lake N3350/N4200
processor with integrated graphics and memory controller. The processor is soldered
to the Desktop Board and is not customer upgradeable.
NOTE
The board is designed to be passively cooled in aproperly ventilated chassis. Chassis
venting locations are recommended above the processor heatsink area for maximum
heat dissipation effectiveness.
System Memory
NOTE
To be fully compliant with all applicable SDRAM memory specifications, the
board should be populated with DIMMs that support the Serial Presence Detect (SPD)
data structure. If your memory modules do not support SPD, you will see a
notification to this effect on the screen at power up. The BIOS will attempt to
configure the memory controller for normal operation.
The Desktop Board has two 204-pin DDR3L SO-DIMM sockets with gold-plated contacts.
These sockets support:
Support for DDR3L SO-DIMMs
Serial Presence Detect (SPD) memory only
Non-ECC memory
Up to 8 GB of memory (on a single SO-DIMM or 4 GB each by 2 SO-DIMM)

7
Connecting to the Internal Headers and Connectors
LVDS feature:
40-pin LVDS connector must be right-angled, single-row shrouded colored white, as shown in Figure 1 (part
number reference: ACES 88341-40xx).
Figure 1: Panel 40-pin LVDS connector
Table 1: 40-pin LVDS connector pin-out

8
eDP feature:
40-pin eDP connector must be right-angled, single-row shrouded colored black, as shown in Figure 2 (part
number reference: ACES 50203-04001-001).
Figure 2: Panel 40-pin LVDS connector
Table 2: 40-pin eDP connector pin-out

9
Figure 3: Panel LCD voltage selection header (Location M)
Pin
Signal Name
Description
1
Key
No pin
2
3.3V
3.3V option
3
12V
12V option
4
LCD_VCC
Send voltage to connector
5
Key
No pin
6
5V
5V option (default)
Table 3: Panel LCD voltage selection header pin-out (Location M)
Figure 4: Backlight inverter voltage selection header(Location N)

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Pin
Signal
Description
1
Key
No pin
2
5V
5V option (default)
3
8v~24V
Vin option same as DC-IN power rail
4
BKLT_PWR
Send voltage to connector
5
Key
No pin
6
12V
12V option
Table 4: Backlight inverter voltage selection header pin-out(Location N)
LVDS inverter power header pin-out (part number reference: Foxconn HF5508).
Figure 5: LVDS inverter power header pin-out
Pin
Signal
Description
1
BKLT_EN
Backlight enable
2
BKLT_PWM
Backlight control
3
BKLT_PWR
Backlight inverter power
4
BKLT_PWR
Backlight inverter power

11
5
BKLT_GND/Brightness_GND
Ground (shared)
6
BKLT_GND/Brightness_GND
Ground (shared)
7
Brightness_Up
Panel brightness increase
8
Brightness_Down
Panel brightness decrease
Table 5: 8-pin FPD power connector pin-out
Figure 6: Front panel audio header
Pin
Signal name
Description
1
MIC
Front panel microphone input signal (biased when supporting stereo microphone)
2
AUD_GND
Ground used by analog audio circuits
3
MIC_BIAS
Microphone power / additional MIC input for stereo microphone support
4
PRESENCE#
Active low signal that signals BIOS that an Intel® HD Audio dongle is connected to the
analog header. PRESENCE# = 0 when an Intel® HD Audio dongle is connected.
5
FP_OUT_R
Right channel audio signal to front panel (headphone drive capable)
6
AUD_GND
Ground used by analog audio circuits
7
RESERVED
Reserved
8
KEY
No pin
9
FP_OUT_L
Left channel audio signal to front panel (headphone drive capable)
10
AUD_GND
Ground used by analog audio circuits
Table 6: Passive AC’97 front panel audio header pinout

12
Pin
Signal name
Description
1
PORT 1L
Analog Port 1 - Left channel (Microphone)
2
GND
Ground
3
PORT 1R
Analog Port 1 - Right channel (Microphone)
4
PRESENCE#
Active low signal that signals BIOS that an Intel® HD Audio dongle is connected
to the analog header. PRESENCE# = 0 when an Intel® HD Audio dongle is
connected.
5
PORT 2R
Analog Port 2 - Right channel (Headphone)
6
SENSE1 RETURN
Jack detection return for front panel (JACK1)
7
SENSE SEND
Jack detection sense line from the Intel® HD Audio CODEC jack detection
resistor network
8
KEY
No pin
9
PORT 2L
Analog Port 2 - Left channel (Headphone)
10
SENSE2 RETURN
Jack detection return for front panel (JACK2)
Table 6.1: HD Audio front panel audio header pinout
Figure 7: Internal stereo speakers header diagram
Pin
Signal name
Description
1
Front_L-
Analog front left (differential negative)
2
Front_L+
Analog front left (differential positive)

13
3
Front_R+
Analog front right (differential positive)
4
Front_R-
Analog front right (differential
negative)
Table 7: Internal stereo speakers header pinout
Figure 8:SATA Power Cable pin-out
Pin
Signal Name
Description
1
VCC3
Power
2
VCC3
Power
3
VCC3
Power
4
GND
Ground
5
GND
Ground
6
GND
Ground
7
VCC
Power
8
VCC
Power
9
VCC
Power
10
GND
Ground
11
RES
NC
12
GND
Ground
13
+12V
Power

14
14
+12V
Power
15
+12V
Power
Table 8:SATA Power Cable signals
Figure 9:SATA Header pin-out
Pin
Signal Name
Description
1
GND
Ground
2
SATAHDR_TXP0_C
SATA DATA Transmit(positive)
3
SATAHDR_TXN0_C
SATA DATA Transmit(negative)
4
GND
Ground
5
SATAHDR_RXN0_C
SATA DATA Receive(negative)
6
SATAHDR_RXP0_C
SATA DATA Receive(positive)
7
GND
Ground
8
G1
NC
9
G2
NC
Table 9:SATA Header signals

15
Figure 10: Front panel USB header pin-out
Pin
Signal
Pin
Signal
1
+5V DC
2
+5V DC
3
Data (negative)
4
Data (negative)
5
Data (positive)
6
Data (positive)
7
Ground
8
Ground
9
Key (no pin)
10
No Connect
Table 10: Front panel USB header signals
Figure 11: Front panel main header pin-out
Pin
Signal Name
Description
Pin
Signal Name
Description
1
HDD_POWER_LED
Pull-up resistor (750) to +5V
2
POWER_LED_MAIN
[Out] Front panel LED (main color)
3
HDD_LED#
[Out] Hard disk activity LED
4
POWER_LED_ALT
[Out] Front panel LED (alt color)

16
5
GROUND
Ground
6
POWER_SWITCH#
[In] Power switch
7
RESET_SWITCH#
[In] Reset switch
8
GROUND
Ground
9
+5V_DC
Power
10
KEY
No pin
Table 11: Front panel main header signals
Figure 12: serial port pin out
Pin
Signal
Pin
Signal
1
COM3_P1_40mils
DCD (Data Carrier Detect)
2
NRX3
RXD# (Receive Data)
3
NTX3
TXD# (Transmit Data)
4
NDTR3
DTR (Data Terminal Ready)
5
GND
Ground
6
NDSR3
DSR (Data Set Ready)
7
NRTS3
RTS (Request To Send)
8
NCTS3
CTS (Clear To Send)
9
COM3_P9_40mils
RI (Ring Indicator)
10
Key
Key (no pin)
Table 12: Power RS232 Serial port header signals
Note: The serial port header must be placed within a keep-out-zone no smaller than 1 inch (half-inch to
the left and half-inch to the right of the header) so as to support commonly available dongles.

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Figure 13: power RS232 header pin-out
J26 pin out
P2
V_12P
P3
NDCD1
P4
COM1_P9
P6
V+5P
J27 pin out
P2
V_12P
P3
NRI2
P4
COM2_P9
P6
V+5P
Table 13: power RS232 Serial port header signals

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Figure 14: Parallel port header pin-out
Pin
Standard Signal Name
ECP Signal Name
EPP Signal Name
1
STROBE#
STROBE#
WRITE#
2
AUTOFD#
AUTOFD#, HOSACK
DATASTB#
3
PD0
PD0
PD0
4
FAULT#
FAULT#, PERIPHREQST#
FAULT#
5
PD1
PD1
PD1
6
INT#
INT#, REVERSERQST#
RESET#
7
PD2
PD2
PD2
8
SLCTIN#
SLCTIN#
ADDRSTB#
9
PD3
PD3
PD3
10
GROUND
GROUND
GROUND
11
PD4
PD4
PD4
12
GROUND
GROUND
GROUND
13
PD5
PD5
PD5
14
GROUND
GROUND
GROUND
15
PD6
PD6
PD6
16
GROUND
GROUND
GROUND
17
PD7
PD7
PD7
18
GROUND
GROUND
GROUND
19
ACK#
ACK#
INTR

19
Pin
Standard Signal Name
ECP Signal Name
EPP Signal Name
20
GROUND
GROUND
GROUND
21
BUSY
BUSY#, PERIPHACK
WAIT#
22
GROUND
GROUND
GROUND
23
PERROR
PE, ACKREVERSE#
PE
24
GROUND
GROUND
GROUND
25
SELECT
SELECT
SELECT
26
KEY (no pin)
KEY (no pin)
KEY (no pin)
Table 24: Parallel port header signals
Figure 15: Clear CMOS
CMOS
Jumper Header location
Default
Pin1 and Pin2
Clear CMOS
Pin2 and Pin3
Table 35: Clear CMOS signals

20
Figure 16: AT/ATX mode header pin-out
AT/ATX
Jumper Header location
Default
Pin2 and Pin3
Auto PWR ON
Pin1 and Pin2
Table 46: AT/ATX mode header pin-out
Figure 17: CPU fan header
Pin
Signal
1
Ground
2
+12V
3
CPU_FAN_TACH
4
CPU_FAN_CTRL
Table 57: Figure 27: CPU fan header