PLX Technology PCI 9054RDK-860 Quick user guide

PCI 9054RDK-860
Hardware Reference Manual

PCI 9054RDK-860
Hardware Reference Manual
Version 2.3
July 2005
Website: http://www.plxtech.com
Technical Support: http://www.plxtech.com/support/
Phone: [phone]
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© 2005 PLX Technology, Inc. All rights reserved.
PLX Technology, Inc. retains the right to make changes to this product at any time, without notice. Products may
have minor variations to this publication, known as errata. PLX assumes no liability whatsoever, including
infringement of any patent or copyright, for sale and use of PLX products.
PLX Technology and the PLX logo are registered trademarks of PLX Technology, Inc.
Other brands and names are the property of their respective owners.
Order Number: 9054/860-RDK-HRM-P1-2.3
Printed in the USA, March 2005

Notice
This document contains PLX Confidential and Proprietary information. The contents of this document
may not be copied nor duplicated in any form, in whole or in part, without prior written consent from
PLX Technology, Inc.
PLX provides the information and data included in this document for your benefit, but it is not possible
to entirely verify and test all information, in all circumstances, particularly information relating to non-
PLX manufactured products. PLX makes neither warranties nor representations relating to the quality,
content or adequacy of this information. The information in this document is subject to change without
notice. Although every effort has been made to ensure the accuracy of this manual, PLX assumes no
responsibility for any errors or omissions in this document. PLX shall not be liable for any errors,
incidental or consequential damages in connection with the furnishing, performance, or use of this
manual or examples herein. PLX assumes no responsibility for damage or loss resulting from the use
of this manual, for loss or claims by third parties, which may arise through the use of this RDK, or for
any damage or loss caused by deletion of data as a result of malfunction or repair.
About This Manual
This manual provides information about the PCI 9054RDK-860 Rapid Development Kit (RDK), from a
hardware perspective. It contains descriptions of all major functional circuit blocks on the board. This
manual also includes the complete schematic and bill of materials.
REVISION HISTORY
Date Version Comments
April 2000 2.0 Hardware Reference Manual release
June 2002 2.1 Updated Bill of Materials, HRM and Schematic
March 2003 2.2 Corrected EEPROM Register Value Tables
July 2005 2.3 Updated EEPROM values
PCI 9054RDK-860 Hardware Reference Manual v2.3
© 2005 PLX Technology, Inc. All rights reserved. i

Table of Contents
1. GENERAL INFORMATION .................................................................................1-1
1.1 FEATURES .............................................................................................. 1-1
2. HARDWARE INSTALLATION.............................................................................2-1
2.1 INSTALLATION PROCEDURE ...................................................................... 2-1
2.2 VERIFY INSTALLATION .............................................................................. 2-1
3. SYSTEM ARCHITECTURE.................................................................................3-1
4. HARDWARE ARCHITECTURE...........................................................................4-1
4.1 HARDWARE MEMORY MAP ....................................................................... 4-1
4.2 MAIN COMPONENTS................................................................................. 4-2
4.2.1 PCI 9054................................................................................... 4-2
4.3 MPC860................................................................................................ 4-2
4.4 CLOCK.................................................................................................... 4-3
4.4.1 PCI Clock.................................................................................. 4-3
4.4.2 Local Clock ............................................................................... 4-3
4.5 MEMORY................................................................................................. 4-4
4.5.1 Boot ROM (FLASH) .................................................................. 4-4
4.5.2 SDRAM..................................................................................... 4-4
4.6 SERIAL PORT .......................................................................................... 4-7
4.7 DEBUG PORT .......................................................................................... 4-7
4.8 INTERRUPTS............................................................................................ 4-7
4.8.1 MPC860 Critical Interrupt.......................................................... 4-7
4.8.2 MPC860 External Interrupt........................................................ 4-7
4.8.3 PCI-to-Local interrupt................................................................ 4-7
4.8.4 PCI Interrupt (INTA#) via the PCI 9054..................................... 4-7
4.9 LED INDICATORS..................................................................................... 4-7
4.10 POWER SUPPLY ...................................................................................... 4-7
4.11 MPC860 PERIPHERALS CONNECTOR (POM2).......................................... 4-8
4.12 RESET CIRCUITRY ................................................................................... 4-9
4.12.1 Power-On Reset and Pushbutton Reset................................... 4-9
4.12.2 Register Initialization................................................................. 4-9
4.12.3 Serial EEPROM Loads............................................................ 4-10
4.13 ARBITRATION ........................................................................................ 4-12
4.14 POWER MANAGEMENT ........................................................................... 4-12
4.15 PROTOTYPE AREA................................................................................. 4-12
4.16 TEST CONNECTORS............................................................................... 4-12
4.17 TEST POINTS ........................................................................................ 4-12
4.18 JUMPERS AND CONNECTORS SUMMARY .................................................. 4-13
4.18.1 Configuration Jumpers (Resistors).......................................... 4-13
4.18.2 Jumpers, Test Points, and Connectors................................... 4-14
4.19 SPECIAL CONSIDERATIONS..................................................................... 4-14
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5. SOFTWARE ARCHITECTURE........................................................................... 5-1
5.1 PCI SDK.................................................................................................5-1
5.1.1 PLXMon (Uses PCI SDK)..........................................................5-1
5.1.2 Windows Device Drivers............................................................5-1
6. SERIAL INTERFACE PINOUT............................................................................ 6-1
6.1 SCC1.....................................................................................................6-1
6.2 SCC2.....................................................................................................6-3
6.3 SCC3.....................................................................................................6-4
6.4 SCC4.....................................................................................................6-5
6.5 MISC......................................................................................................6-6
7. CUSTOMER SUPPORT...................................................................................... 7-1
8. REFERENCES .................................................................................................... 8-1
9. BILL OF MATERIALS & SCHEMATICS............................................................. 9-1
LIST OF FIGURES
FIGURE 3-1. PCI 9054RDK-860 SYSTEM ARCHITECTURE.................................................3-1
FIGURE 4-1. MPC860 PERIPHERALS CONNECTOR (POM2)...............................................4-8
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© 2005 PLX Technology, Inc. All rights reserved.

LIST OF TABLES
TABLE 4-1.LOCAL BUS HARDWARE MEMORY MAP ...........................................................4-1
TABLE 4-2.LONG SERIAL EEPROM LOAD REGISTERS...................................................4-10
TABLE 4-3. EXTRA LONG SERIAL EEPROM LOAD REGISTERS ........................................4-11
TABLE 4-4. CONFIGURATION JUMPERS (RESISTORS).......................................................4-13
TABLE 4-5. JUMPERS,TEST POINTS,AND CONNECTORS ................................................4-14
TABLE 6-1. UART..........................................................................................................6-1
TABLE 6-2. HDLC CONTROLLER ..................................................................................... 6-1
TABLE 6-3.TRANSPARENT CONTROLLER .........................................................................6-1
TABLE 6-4. ETHERNET CONTROLLER ............................................................................... 6-2
TABLE 6-5. I2C...............................................................................................................6-2
TABLE 6-6. CENTRONIC TRANSMITTER............................................................................. 6-2
TABLE 6-7. UART..........................................................................................................6-3
TABLE 6-8. HDLC..........................................................................................................6-3
TABLE 6-9.TRANSPARENT CONTROLLER .........................................................................6-3
TABLE 6-10. UART........................................................................................................6-4
TABLE 6-11. HDLC........................................................................................................6-4
TABLE 6-12. TRANSPARENT CONTROLLER ....................................................................... 6-4
TABLE 6-13. UART........................................................................................................6-5
TABLE 6-14. HDLC........................................................................................................6-5
TABLE 6-15. TRANSPARENT CONTROLLER ....................................................................... 6-5
TABLE 6-16. SIWITH TDM(TIME SLOT ASSIGNOR)..........................................................6-6
TABLE 9-1. BOM –COMPONENTS SHOULD BE ASSEMBLED...............................................9-1
TABLE 9-2. BOM –THROUGH HOLE COMPONENTS........................................................... 9-3
TABLE 9-3. BOM –MANUALLY INSERTED COMPONENTS ...................................................9-3
TABLE 9-4. BOM –MISCELLANEOUS COMPONENTS.......................................................... 9-3
TABLE 9-5. BOM –COMPONENTS SHOULD NOT BE ASSEMBLED.......................................9-3
PCI 9054RDK-860 Hardware Reference Manual v2.3
© 2005 PLX Technology, Inc. All rights reserved.
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