Texas Instruments AFE5818 User manual

User's Guide
SLOU430–October 2015
AFE5818 16-Channel Analog Front End Evaluation Module
(EVM Rev. C)
This user’s guide gives a general overview of the AFE5818 evaluation module (EVM) and provides a
general description of the features and functions to be considered while using this module. This manual is
applicable to the AFE5818 analog front-end, and to the Rev. C version of the EVM hardware. The
AFE5818 EVM provides a platform for evaluating the AFE under various signal, clock, reference, and ADC
output formats. In addition, the EVM supports the testing of both the LVDS interface as well as the
JESD204B interface. Note that the TSW1400EVM capture card is required for LVDS, and TSW14J56EVM
is required for JESD204B.
This user’s guide refers to software HMC-DAQ GUI v.2.8 or higher, and HSDCPro Software v.4.1 or
higher.
For any further questions regarding the EVM, GUI or device, please contact:
• [email protected]
Contents
1 EVM Hardware and Circuits Overview.................................................................................... 3
2 Quick Views of Evaluation Setups for LVDS and JESD204B Interfaces............................................. 3
2.1 LVDS Interface ( AFE5818 EVM and TSW1400EVM)......................................................... 3
3 GUI Software Installation ................................................................................................... 5
4 Testing the AFE5818 EVM Data Capture with LVDS and JESD Interface .......................................... 5
4.1 EVM Hardware Setup.............................................................................................. 5
4.2 Capturing a RAMP Test Pattern with the LVDS or JESD Interface.......................................... 6
4.3 Capturing an Analog Input Signal with the LVDS or JESD Interface....................................... 11
Appendix A Software Installation .............................................................................................. 15
Appendix B Hardware Reference.............................................................................................. 27
List of Figures
1 AFE5818 EVM Circuits Map................................................................................................ 3
2 LVDS Evaluation Setup Overview......................................................................................... 4
3 TSW1400EVM and AFE5818 Hardware Setup for LVDS Capture ................................................... 5
4 Clock Configuration on AFE EVM for LVDS ............................................................................. 6
5 AFE_RST Hardware Reset Button ........................................................................................ 6
6 Initialize Device .............................................................................................................. 7
7 GUI Quick Start Setup: Configure for Ramp Format.................................................................... 7
8 LMK04826 Clock Testpoints ............................................................................................... 8
9 HSDC Pro Set-up............................................................................................................ 9
10 AFE5818 RAMP Capture ................................................................................................. 10
11 JESD Lane Rate Information ............................................................................................. 10
12 Channel Drop-Down Menu................................................................................................ 11
13 HSDC Pro Error Refers to No Clocks from AFE ....................................................................... 11
14 Change ADC Format to Analog Input ................................................................................... 12
15 Choose VCA Gain.......................................................................................................... 12
16 Capture Button.............................................................................................................. 13
17 AFE5818 Analog Input Capture for SNR................................................................................ 14
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18 HSDC Pro Install (Begin).................................................................................................. 15
19 HSDC Pro Install (Install Directory) ..................................................................................... 16
20 HSDC Pro Install (TI License Agreement) .............................................................................. 17
21 HSDC Pro Install (NI License Agreement).............................................................................. 17
22 HSDC Pro Install (Start Installation) ..................................................................................... 18
23 HSDC Pro Install (Installation Progress) ................................................................................ 18
24 HSDC Pro Install (Installation Complete) ............................................................................... 19
25 HSDC Pro Install (Complete Process)................................................................................... 19
26 HSDC Pro Install (Restart)................................................................................................ 20
27 HMC-DAQ GUI Install: Driver Installation............................................................................... 20
28 HMC-DAQ GUI Install: Destination Directory .......................................................................... 21
29 HMC-DAQ GUI Install: Set Directory .................................................................................... 22
30 HMC-DAQ GUI Install: TI License Agreement ......................................................................... 23
31 HMC-DAQ GUI Install: Confirmation .................................................................................... 24
32 HMC-DAQ GUI Install: Progress......................................................................................... 25
33 HMC-DAQ GUI Install: Finished ......................................................................................... 26
List of Tables
1 AFE5818 EVM Bill of Materials .......................................................................................... 27
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1 EVM Hardware and Circuits Overview
Figure 1. AFE5818 EVM Circuits Map
2 Quick Views of Evaluation Setups for LVDS and JESD204B Interfaces
The AFE5818 EVM can be tested using the TSW1400EVM for LVDS data interface, or using the
TSW14J56EVM for the JESD204B data interface.
2.1 LVDS Interface ( AFE5818 EVM and TSW1400EVM)
As shown in , mating the AFE5818 EVM with a TSW1400 EVM allows for testing using the LVDS data
interface.
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Figure 2. LVDS Evaluation Setup Overview
TSW1400 EVM: The TSW1400 EVM is required for capturing data from the AFE5818 EVM and its
analysis using the TSW1400 graphical user interface (GUI), called High Speed Data Converter Pro .
For more information on the TSW1400EVM, see:
http://focus.ti.com/docs/toolsw/folders/print/tsw1400evm.html.
Equipment: Signal generators (with low-phase noise) must be used as source of input signal (0.1 MHz to
20 MHz) and clock (10 MHz to 100 MHz) for optimal performance. For LVDS capture, an on-board crystal
oscillator option is provided so that an external clock source is not needed for basic capture. Additionally,
for best performance a band-pass filter (BPF) is required on the analog input signal to attenuate the
harmonics and noise from the generators. For coherent sampling, an external clock can be provided to
J35 (GUI configuration is required for the external clock configuration).
Power Supply: A barrel connector power cable is provided with the EVM, but does not support the CW
mode or Vcntl circuit. Alternatively, a dual ±5-V supply can power the EVM through a connector located at
P1. All supplies for the AFE5818 device is derived from this +5-V supply. This +5-V power supply must be
able to source up to 2 A, and –5 V supply must provide up to 1 A. The –5 V supply is used for the
negative supply of amplifiers in the CW output external circuitry and Vcntl circuit. The TSW1400 EVM is
powered through an AC adapter provided with its own EVM kit. Turn on the TSW1400 at the SW7 switch.
USB Interface to PC: The USB connections from the AFE5818 EVM and TSW1400EVM to the computer
are used for communication from the GUIs to the boards. After installing the GUIs as shown in Section 3,
connect the mini-USB cables provided to J50 on the AFE5818 EVM, and to J5 of the TSW1400 EVM.
Section A.1 explains the High Speed Data Converter Pro and AFE5818 GUI installation procedures.
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3 GUI Software Installation
The AFE5818 EVM and the de-serializing capture card EVM both require software installations. Ensure
that no USB connections are made to the EVMs until after the installations are complete. Install HSDCPro
before installing HMC-DAQ GUI. This user’s guide refers to software HMC-DAQ GUI v.2.8 or higher, and
HSDCPro Software v.4.1 or higher.
For information on the installation of the TSW1400EVM or TSW14J56EVM Software GUI (HSDCPro), see
the section on HSDCPro Installation. For information on the installation of the AFE5818 EVM Software
GUI (HMC-DAQ GUI), see the section on HMC-DAQ GUI Installation
4 Testing the AFE5818 EVM Data Capture with LVDS and JESD Interface
This section outlines (1) the external connections required to test the AFE5818 EVM using the LVDS and
JESD interfaces, (2) how to setup the GUIs for testing, (3) how to capture a RAMP test pattern, and (4)
how to capture an analog input signal. Both LVDS and JESD modes are addressed.
4.1 EVM Hardware Setup
The connections shown in Figure 3 should be made for proper hardware setup. Note: testing the LVDS
interface between the AFE5818 EVM and the TSW1400 EVM is performed using a built-in RAMP test
function generated within the AFE5818 device in lieu of the signal source listed in item 8 below.
Figure 3. TSW1400EVM and AFE5818 Hardware Setup for LVDS Capture
1. For LVDS data, mate the TSW1400 EVM at connector J3 to the AFE5818 EVM at connector P900
through the high-speed ADC interface connector. For JESD data, mate the TSW14J56 EVM at
connector J4 to the AFE5818 EVM at connector P800 through the FPGA Mezzanine Card (FMC)
connector.
2. POWER:Connect the DC +5 V output of the provided AC-to-DC power supply to J12 (+5V_IN) of the
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TSW1400 EVM or +5V_IN of the TSW14J56 EVM , and the input of the power supply cable to a 110-
230 VAC source. Connect the provided AC power supply to J1 of the AFE5818 EVM or a +5V(2A)
bench power supply to P1.
3. Connect the USB cable from PC to J50 (USB) located on the top side of the AFE5818 EVM. Connect
the USB cable from PC to J5 (USB_IF) of the TSW1400 EVM or J9 of the TSW14J56 EVM . Note: TI
recommends that the PC USB port be able to support USB2.0. If unsure, always chose the USB ports
at the back of the PC chassis over ones located on the front or sides.
4.2 Capturing a RAMP Test Pattern with the LVDS or JESD Interface
This section describes capturing a RAMP test pattern with the AFE5818 EVM. Data capture can be
confirmed by using only the Quick Setup page of the HMC-DAQ GUI. Assuming the hardware is
connected correctly as in Section 4.1, follow these five steps to acquire data:
1. Verify the clock configuration by matching P40, P42, P43, and P71 to Figure 4.Figure 4.
Figure 4. Clock Configuration on AFE EVM for LVDS
2. Press the AFE_RST button on the AFE EVM, located above the AFE device (SW1). Hold for 1 second.
Figure 5. AFE_RST Hardware Reset Button
3. Press the Initialize Device button on the HMC-DAQ GUI. The progress bar indicates the device is
configured over SPI. The default condition of the device is RAMP test pattern.
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Figure 6. Initialize Device
4. Choose the desired serialized data format. LVDS data capture requires the TSW1400, and JESD data
capture requires the TSW14J56.
5. Choose Ramp Test Pattern for the ADC format.
Figure 7. GUI Quick Start Setup: Configure for Ramp Format
OPTIONAL: At this point the LMK04826 device should provide the following clocks, which are confirmed
by probing test points with an oscilloscope. If any of these clock signals are not present at these test
points, an error has occurred.
1. 50 MHz Sampling Clock to AFE5818 (P43)
2. 200 MHz Global Clock (TP77)
3. 16.66 MHz SYSREF Clock (TP75)
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Figure 8. LMK04826 Clock Testpoints
Return to the HSDC Pro GUI and perform the following steps highlighted in Figure 9:
1. Press the ADC tab in HSDCpro.
2. Change the plot type from Real FFT to Codes.
3. Enter 50M in the field labeled ADC Output Data Rate.
4. Press the Capture button.
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Figure 9. HSDC Pro Set-up
5. A RAMP capture should appear, as shown in Figure 10.
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Figure 10. AFE5818 RAMP Capture
JESD Only: The following message or similar message appears after hitting capture for the first time after
a new firmware has been loaded and, subsequently, any time the JESD line rate changes (for example,
when the ADC output data rate is changed.) Press OK.
Figure 11. JESD Lane Rate Information
By default, channel 1/16 is the first channel displayed. Use the drop-down menu shown in Figure 12 to
view any one 16 channels and confirm that a ramp waveform has been captured. In the menu to the left
side, confirm that the min code is 0 and the max code is 16383, corresponding to the min and max codes
in the datasheet.
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Figure 12. Channel Drop-Down Menu
If a discrepancy exists, the error shown in Figure 13 will appear after pressing the capture button,
indicating the data framing is incorrect. This is typically due to the FPGA not receiving a clock from the
ADC device or the serialization factors do not match for the AFE and FPGA.
Figure 13. HSDC Pro Error Refers to No Clocks from AFE
4.3 Capturing an Analog Input Signal with the LVDS or JESD Interface
This section describes the Software setup for capturing a sinusoidal input using the AFE5818 . This
section assumes that the user has completed the steps from Section 4.2. If there is any issue with a data
capture time out in this section, return to the previous section and confirm that a RAMP capture is
successful.
1. After capturing ramp test data, change from the RAMP setting on the Quick Setup page, to Analog
Input.
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Figure 14. Change ADC Format to Analog Input
2. Select firmware: AFE5818 _14X_B(LVDS) or AFE5818 B_4L_16x(JESD).
3. Change the plot type from Codes to Real FFT.
4. Enter 50M in the field labeled ADC Output Data Rate.
5. Enter 5M in the field labeled ADC Input Target Frequency, or set to the desired input that is being
provided to SMA J10, IN_1, as described in Section 4.1.
6. Choose VCA GAIN.
Figure 15. Choose VCA Gain
7. Press the Capture button.
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Figure 16. Capture Button
A capture similar to that shown in Figure 17 should appear.
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Figure 17. AFE5818 Analog Input Capture for SNR
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Appendix A
SLOU430–October 2015
Software Installation
A.1 High Speed Data Converter Pro (HSDC Pro) GUI Installation
Download the HSDC Pro GUI Installer using this link: HSDC Pro GUI
1. Unzip the saved folder and run the installer executable to obtain the menu shown in Figure 2.
2. Click the Install button.
Figure 18. HSDC Pro Install (Begin)
3. Leave the destination directories as the default location for the TSW1400 GUI installation, and press
the Next button as shown in Figure 19.
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Figure 19. HSDC Pro Install (Install Directory)
4. Read the License Agreement from Texas Instruments and select I accept the License Agreement, then
press the Next button as shown in Figure 18.
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Figure 20. HSDC Pro Install (TI License Agreement)
5. Read the License Agreement from National Instruments and I accept the License Agreement, then
press the Next button as in Figure 19.
Figure 21. HSDC Pro Install (NI License Agreement)
6. Press the Next button as in Figure 20
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Figure 22. HSDC Pro Install (Start Installation)
7. The window shown in Figure 21 should appear, indicating that the installation is in progress.
Figure 23. HSDC Pro Install (Installation Progress)
8. When finished, the window shown in Figure 22 appears, indicating Installation Complete. Press the
Next button.
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Figure 24. HSDC Pro Install (Installation Complete)
9. The window in Figure 23 appears briefly to complete the process.
Figure 25. HSDC Pro Install (Complete Process)
10. As shown in Figure 24, a computer restart may be requested, depending on whether the PC already
has the National Instruments MCR installer. If requested, press the Restart button to complete the
installation.
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Figure 26. HSDC Pro Install (Restart)
A.2 HMC-DAQ GUI Installation
Check the ti.com product folder for the relevant device, such as http://www.ti.com/tool/AFE5818EVM or
email the list mentioned at the beginning of this document.
Clicking on the hyperlink leads to another link titled HMC-DAQ GUI Installer, v2.4 or greater. Click on this
link to download and save the file.
1. Press the Run button to begin the download and installation. A prompt will appear for the desktop
shortcut. Figure 27.
Figure 27. HMC-DAQ GUI Install: Driver Installation
2. Press the Next button as shown in Figure 28.
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