Texas Instruments THS3061EVM User manual

THS3061EVM
September 2002 High Performance Linear Products
User’s Guide
SLOU145

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Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the specified input and output ranges described in
the EVM User’s Guide. The input supply voltage (VS) should be no greater than 15 V for
dual supply or 30 V for single supply. The differential input signal (VID) should be no greater
than 3 V. The output current (IO) should be no greater than 150 mA.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
60°C. The EVM is designed to operate properly with certain components above 60°C as long
as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

Information About Cautions and Warnings
iii
Preface
Read This First
How to Use This Manual
This document contains the following chapters:
-Chapter 1—Introduction and Description
-Chapter 2—Using the THS3061EVM
-Chapter 3—THS3061EVM Applications
-Chapter 4—EVM Hardware Description
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.

Trademarks
iv
FCC Warning
This equipment is intended for use in a laboratory test environment only. It gen-
erates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.
This EVM contains components that can potentially be damaged by
electrostatic discharge. Always transport and store the EVM in its
supplied ESD bag when not in use. Handle using an antistatic
wristband. Operate on an antistatic work surface. For more
information on proper handling, refer to SSYA008.
Related Documentation From Texas Instruments
The URLs below are correct as of the date of publication of this manual. Texas
Instruments applications apologizes if they change over time. Go to the TI
website at www.ti.com and search on the literature number (e.g., SLOS394).
-THS3061 data sheet (SLOS394)
-Application report (SLOA069), How (Not) to Decouple High Speed Op
Amp Circuits, http://www-s.ti.com/sc/psheets/sloa069/sloa069.pdf
-Application report (SLMA002), Power Pad Thermally Enhanced Package,
http://www-s.ti.com/sc/psheets/slma004/slma002.pdf
-Application report (SLMA004), Power Pad Made Easy,
http://www-s.ti.com/sc/psheets/slma004/slma004.pdf
-Application report (SSYA008), Electrostatic Discharge (ESD),
http://www-s.ti.com/sc/psheets/ssya008/ssya008.pdf
-High-Speed Amplifier PCB Layout Tips,
http://www-s.ti.com/sc/psheets/sloa102/sloa102.pdf
Trademarks
PowerPAD is a trademark of Texas Instruments.

Contents
v
Contents
1 Introduction and Description 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Evaluation Schematic 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Using the THS3061EVM 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 THS3061EVM Applications 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Inverting Gain Stage 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Noninverting Gain Stage 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 EVM Hardware Description 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures
1-1 Schematic of the Populated Circuit on the EVM (Default Configuration) 1-2. . . . . . . . . . . . . .
2-1 THS3061EVM Interconnection Diagram 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-1 Inverting Gain Stage 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2 Noninverting Gain Stage 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-1 Board Layout Views for THS3061EVM 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
4-1 THS3061EVM Bill of Materials 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
Introduction and Description
Introduction and Description
The Texas Instruments THS3061 evaluation module (EVM) helps designers
evaluate the performance of the THS3061 operational amplifier. Also, this
EVM is a good example of high-speed PCB design.
This document details the THS3061EVM. It includes a list of EVM features, a
brief description of the module illustrated with a series of schematic diagrams,
EVM specifications, details on connecting and using the EVM, and a discus-
sion of high-speed amplifier design considerations.
This EVM enables the user to implement various circuits to clarify the available
configurations presented by the schematic of the EVM. The user is not limited
to the circuit configurations presented here. The EVM provides enough hard-
ware hooks that the only limitation should be the creativity of the user.
1.1 Evaluation Schematic
As delivered, the EVM has a fully functional example circuit—just add power
supplies, a signal source, and monitoring instrument. See Figure 1–1 for the
complete (default) EVM schematic showing all component locations. The user
can change the gain by changing the ratios of the feedback and gain resistors
(see the device data sheet for recommended resistor values).
The default configuration is designed to provide for a voltage gain of –1 and
about +2 depending on which input is connected to the signal source. This volt-
age gain is the ratio of the voltage at the output pin of the amplifier (pin 6) to
the voltage at the input at J1 or J2 respectively.
For optimum frequency response and stability at either –1 or +2 gain, a 562-Ω
feedback resistor was chosen for R5. The same value is set for R3 to provide
a gain in the inverting configuration of –1. To match the signal generator source
impedance, R2 is set to 54.9 Ω. This is the closest value, when placed in paral-
lel with R3 (562 Ω) that terminates the inverting input to 50 Ω).
Output series resistor R6 is set to 49.9Ω. This value terminates the output cor-
rectly for connection to a 50-Ωinput device, as shown in the applications de-
scribed in Chapter 3. Setting R7 to 953 Ω loads the amplifier at about 1 kΩ, to
match a high-impedance instrument connected to the output connector J4.
Chapter 1

Evaluation Schematic
1-2
When used as an inverting amplifier in the default configuration connected to
a 50-Ωinput measurement instrument, R7 causes a slight gain error. The total
voltage gain is the negative ratio of the feedback resistor R5 and the gain
resistor R3, times the voltage divider created by R6-R7, and the measurement
device input termination resistance. This gain follows the equation:
VO
VI+–R5
R3 ǒR7 ø50 W
R7 ø50 W)R6Ǔ+–0.475 (1)
When using the default configuration, the noninverting gain of the amplifier is
affected by the same slight gain error, plus the gain error imposed by the invert-
ing input termination resistor R2. The following equation shows the gain for this
situation.
VO
VI+ǒ1)R5
R3 )R2ǓǒR7 ø50 W
R7 ø50 W)R6Ǔ+0.908 (2)
Some components such as C1, C2, C3, C4, C5, C6, TP1, J5, J6, and J7 are
omitted on the application schematics of Chapter 3 for clarity.
Figure 1-1.Schematic of the Populated Circuit on the EVM (Default Configuration)
TP1
*Device not installed
J1
Vin-J4
Vout
R4
R2
J2
Vin+
-
+
U1
THS3061
2
36
7
4
R5
R6
R7
R3
J7J5
+C2 -VS
+VS(IN)
FB2
+
C1
-VS(IN)
FB1
+VS
U1A C4
100 pF C3
+VS
C5
-VS
C6
J6
562 W
0.1 mF
562 W
54.9 W49.9 W
953 W
0.1 mF
100 pF
49.9 W
22 mF

2-1
Using the THS3061 EVM
Using the THS3061 EVM
This section shows how to connect the THS3061EVM to test equipment. It is
recommended that the user connect the EVM as shown in this section to avoid
damage to the EVM or the THS3061 installed on the board.
Figure 2-1.THS3061EVM Interconnection Diagram
Figure 2-1 shows the connections to measure the output while a signal is in-
serted into EVM’s noninverting input. For an inverting signal path, the signal
source can be connected to J1 instead.
Chapter 2

3-1
THS3061EVM Applications
THS3061EVM Applications
Example applications are presented in this chapter. These applications
demonstrate the most popular circuits, but many other circuits can be
constructed. The purpose of the EVM board is for the user to experiment with
different circuits, exploring new and creative design techniques, which is the
function of an evaluation board.
3.1 Inverting Gain Stage
The circuit described in Chapter 1 is an inverting gain stage with a voltage
divider on the output. Equation 1 (Chapter 1) indicates the gain when
connected to a 50-Ωmeasurement input device. The 953-Ω R7 is included to
provide a 1-kΩload to the amplifier—the user may remove it, as shown in
Figure 3-1. When this is done the voltage gain equation from J1 to J4 is
simplified, as shown here:
VO
VI+–R5
R3 ǒ50 W
50 W)R6Ǔ+0.5 (1)
R6 is used to match the output impedance of the amplifier to the line being
driven and the instrument taking measurements. For high impedance and
short transmission line length, R6 can be removed. R6 can also be used to
isolate the amplifier from extremely large capacitive loads.
Figure 3-1.Inverting Gain Stage
R6
R2
R5
J4
Vout
J1
Vin-
Vs-
-
+
U1
THS3061
2
36
7
4
R3
Vs+
R4
562 W
49.9 W
49.9 W
562 W
54.9 W
Chapter 3

Noninverting Gain Stage
3-2
3.2 Noninverting Gain Stage
The EVM can be modified to eliminate the gain error imposed by R2 by
replacing R2 with a 0-Ω resistor. This is shown in Figure 3-2. R7 has been
removed, as it was in the inverting gain stage shown above. The following
equation indicates the voltage gain from J2 to J4:
VO
VI+ǒ1)R5
R3Ǔǒ 50 W
50 W)R6Ǔ+1(2)
Figure 3-2.Noninverting Gain Stage
R2
0
R6
49.9
R4
-
+
U1
THS3061
2
36
7
4
Vs-
R5
J4
Vout
Vs+
R3
J2
Vin+
562 W
49.9 W
562 W
This is a common amplifier configuration used to drive video or VDSL lines,
for example. The 49.9-Ωresistor in series with the output, matches the
effective output impedance of the amplifier to the line impedance. In test and
measurement instruments the nominal line impedance is assumed to be 50 Ω;
for video the nominal line impedance is assumed to be 75 Ω. If testing this
device as a video linear driver, we recommend changing the value of R6 to
75 Ω. Due to the nature of current-feedback high-speed amplifiers, the gain of
the THS3061 can be increased by changing the values of R5 and R3 with little
change in bandwidth. R5 should be reduced to maintain optimum
compensation. Refer to the data sheet for recommended resistor values.

4-1
EVM Hardware Description
EVM Hardware Description
This chapter describes the EVM hardware. It includes the EVM parts list, and
printed circuit board layout.
Table 4-1.THS3061EVM Bill of Materials
Item Description SMD
Size Reference Designator PCB Manufacturer’s Part Number Distributor’s Part Number
1Bead, ferrite, 3A, 80 Ω1206 FB1, FB2 2 (Steward)
HI1206N800R-00 (Digi-Key) 240-1010-1-ND
2Cap, 22 µF, tanatalum, 25 V,
10% DC1, C2 2 (AVX) TAJD226K025R (Garrett) TAJD226K025R
3Cap, 100 pF, ceramic, 5%,
150 V AQ12 C4, C5 2 (AVX) AQ12EM101JAJME (TTI) AQ12EM101JAJME
4Cap, 0.1 µF, ceramic, X7R,
50 V 0805 C3, C6 2 (AVX) 08055C104KAT2A (Garrett) 08055C104KAT2A
6 Open 0805 R1, R8, R9 3
7Resistor, 49.9 Ω, 1/8 W, 1% 0805 R6 1 (Phycomp)
9C08052A49R9FKHFT (Garrett) 9C08052A49R9FKHFT
8Resistor, 953 Ω, 1/8 W, 1% 0805 R7 1 (Phycomp)
9C08052A9530FKHFT (Garrett) 9C08052A9530FKHFT
9Resistor, 562 Ω, 1/8 W, 1% 0805 R3, R5 2 (Phycomp)
9C08052A5620FKHFT (Garrett) 9C08052A5620FKHFT
10 Open 1206 C7, C8 2
11 Resistor, 54.9 Ω, 1/4W, 1% 1206 R2 1 (Phycomp)
9C12063A54R9FKRFT (Garrett) 9C12063A54R9FKRFT
12 Resistor, 49.9 Ω, 1/4 W, 1% 1206 R4 1 (Phycomp)
9C12063A49R9FKRFT (Garrett) 9C12063A49R9FKRFT
13 Test point, black TP1 1 (Keystone) 5001 (Allied) 839-3601
14 Open J8, J9 2
15 Jack, banana receptacle,
0.25”Diameter hole J5, J6, J7 (HH Smith) 101 (Newark) 35F865
16 Connector, edge, SMA PCB
jack J1, J2, J4 3 (Johnson) 142-0701-801 (Allied) 528-0238
17 Standoff, 4-40 HEX, 0.625”
length 4(Keystone) 1804 (Allied) 839-2089
18 Screw, Phillips, 4-40, 0.250”4 SHR-0440-016-SN
19 IC, THS3061 U1 1 (TI) THS3061DGN
20 Printed-circuit board 1 (TI)
EDGE #6439527 Rev.C
Chapter 4

4-2
Figure 4-1.Board Layout Views for THS3061EVM
Top Layer 2 - Ground
Layer 3 - Power Bottom

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