Texas Instruments BQ25672EVM User manual

User’s Guide
BQ25672 Evaluation Module
ABSTRACT
This user's guide describes the characteristics, operation, and functionality of the BQ25672 Evaluation Module
(EVM). The document also describes the equipment, test setup, and software required to operate the EVM. A
complete schematic diagram, printed-circuit board (PCB) layouts, and bill of materials (BOM) are also included in
this document.
Throughout this user's guide, the abbreviations and terms EVM, BQ25672EVM, BMS034, and evaluation
module are synonymous with the BQ25672 EVM. Note that the BQ25672 EVM is not yet available for order.
WARNING
Hot surface! Contact may cause burns. Do not touch!
Some components may reach high temperatures >55°C when the board is powered on. The user must
not touch the board at any point during operation or immediately after operating, as high temperatures
may be present.
Table of Contents
1 Introduction.............................................................................................................................................................................3
1.1 EVM Features.................................................................................................................................................................... 3
1.2 I/O Descriptions..................................................................................................................................................................4
1.3 Recommended Operating Conditions................................................................................................................................ 6
2 Test Setup and Results ......................................................................................................................................................... 7
2.1 Equipment.......................................................................................................................................................................... 7
2.2 Equipment Setup................................................................................................................................................................7
2.3 Software Setup...................................................................................................................................................................8
2.4 Test Procedure................................................................................................................................................................... 9
3 PCB Layout Guidelines........................................................................................................................................................ 11
4 Board Layout, Schematic and Bill of Materials..................................................................................................................12
4.1 BMS034E1 Board Layout.................................................................................................................................................12
4.2 BQ25672EVM (BMS034E1-004) Schematic....................................................................................................................16
4.3 Bill of Materials ................................................................................................................................................................18
5 Revision History................................................................................................................................................................... 23
List of Figures
Figure 2-1. Equipment Test Setup for Testing Battery Charging..................................................................................................8
Figure 4-1. BMS034E2/A Top Layer.......................................................................................................................................... 12
Figure 4-2. BMS034E2/A Signal Layer 1...................................................................................................................................13
Figure 4-3. BMS034E2/A Signal Layer 2...................................................................................................................................14
Figure 4-4. BMS034E2/A Bottom Layer.................................................................................................................................... 15
Figure 4-5. BQ25672EVM (BMS034E2/A-004) Schematic Page 1........................................................................................... 16
Figure 4-6. BQ25672EVM (BMS034E2/A-004) Schematic Page 2........................................................................................... 17
List of Tables
Table 1-1. Device Data Sheet...................................................................................................................................................... 3
Table 1-2. EVM Connections....................................................................................................................................................... 4
Table 1-3. EVM Shunt and Switch Installation............................................................................................................................. 4
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Table 1-4. Recommended Operating Conditions.........................................................................................................................6
Table 4-1. BQ25672EVM Bill of Materials..................................................................................................................................18
Trademarks
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
All trademarks are the property of their respective owners.
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1 Introduction
The BQ25672 is an integrated switched-mode buck battery charge management device in QFN package. It
is intended to charge 1S to 4S cell Li-ion and Li-polymer batteries. The charger features a narrow voltage
DC architecture (NVDC) which allows the system to be regulated to a minimum value even if the battery is
completely discharged. With dual input source selection, OTG support, and an integrated 16-bit multi-channel
analog-to-digital converter (ADC), the BQ25672 is a complete charging solution.
1.1 EVM Features
The BQ25672EVM is a complete module for evaluating the BQ25672 charger IC in the QFN package. Key
features of this EVM include:
• Synchronous Switch Mode Buck-Boost Charger for 1S-4S Battery Configuration for 3-A Charging with 10-mA
Resolution
• Support for 6-V to 24-V Wide Range of Input Sources
• Dual Input Source Selector to Drive Bi-Directional Blocking NFETs
• Power up USB Port from Battery (USB OTG) with 5-V to 12-V OTG Output Voltage with 10-mV Resolution
• Low Battery Quiescent Current < 1 µA in Shutdown Mode
The device data sheet, listed in Table 1-1, provides detailed features and operation.
Table 1-1. Device Data Sheet
Device Data Sheet
BQ25672 SLUSEB9
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1.2 I/O Descriptions
Table 1-2 lists the BQ25672EVM board connections and ports.
Table 1-2. EVM Connections
Connector, Port Description
J1 VIN1 Positive rail of the priority input adapter or power supply
GND Ground
J2 VIN2 Positive rail of the secondary input adapter or power supply
GND Ground
J3 SYSTEM Positive rail of the charger system output voltage, typically connected to the system load
GND Ground
J4 VPMID Positive rail of the charger output voltage for reverse mode (OTG). This output also shares the rail with
VBUS in forward mode
GND Ground
J5 BATTERY Positive rail of the charger battery input
SNS_BATP Input connected to the positive terminal of the battery for remote battery voltage measurement
GND Ground
J6 USB port N/A
J7 EXTERNAL
THERMISTOR
Input connected to an external battery temperature sensing thermistor
GND Ground
J8 Communication port I2C communication port for use with the EV2300/2400 Interface Board
J9 Communication port I2C communication port for use with the USB2ANY Interface Adapter (for future use)
Table 1-3 lists the shunt installations available on the EVM, and their respective descriptions.
Table 1-3. EVM Shunt and Switch Installation
Shunt Description BQ25672 Setting
JP1 ACDRV1 pin connection to control ACFET1-RBFET1. Connect this to _acdrv1 when utilizing
the input protection MOSFETs. Connect this to GND when input protection MOSFETs are not
utilized or bypassed
ACDRV1 to _acdrv1
JP2 ACDRV2 pin connection to control ACFET2-RBFET2. Connect this to _acdrv2 when utilizing
the input protection MOSFETs. Connect this to GND when input protection MOSFETs are not
utilized or bypassed
ACDRV2 to _acdrv2
JP3 VIN1/VAC1 to VBUS bypass connection. Connect this when the input protection MOSFET
feature is not desired. This will connect the input source on VIN1 to VBUS.
Not Installed
JP4 VIN2/VAC2 to VBUS bypass connection. Connect this when the input protection MOSFET
feature is not desired. This will connect the input source on VIN2 to VBUS.
Not Installed
JP5 BAT to BATTERY bypass connection. Connect this when the ship and shutdown mode
features are not desired.
Not Installed
JP6 N/A Installed
JP7 USB port J6 positive rail to charger VBUS selection. Use shunt to select either VIN1/VAC1 or
VIN2/VAC2 as the connection for the USB port.
USB_VIN to VAC1
JP8 SDRV pin connection to control SFET. Disconnect when ship and shutdown mode features are
not desired.
Not Installed
JP9 BATP pin connection. BATP is always connected to J5 pin 2 for remote battery sense. If
remote sense is not used, short pin 1 to J5 pin 1 (BATTERY) for the charger constant voltage
sensing to occur at the connector pin or short pin 2 to pin 3 (BAT pin) for the charger constant
voltage sensing to occur on the PCB board. Do not leave BATP pin floating.
Short pin 1 to J5 pin 1
(BATTERY)
JP10 Do not remove Installed
JP11 N/A Installed
JP12 REGN to TS resistor divider network connection. This must remain connected. Installed
JP13 ILIM_HIZ pin setting for 500 mA. Connect to set the external input current limit setting to
500mA
Not Installed
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Table 1-3. EVM Shunt and Switch Installation (continued)
Shunt Description BQ25672 Setting
JP14 ILIM_HIZ pin setting for 1.5 A. Connect to set the external input current limit setting to 500mA Installed
JP15 Thermistor COOL temperature setting. Connect jumper to simulate charger entering TCOOL
(T1-T2) temperature region.
Not Installed
JP16 Thermistor COLD temperature setting. Connect jumper to simulate charger entering TCOLD
(<T1) temperature region.
Not Installed
JP17 CE pin connection to ground to enable charging. When removed, CE pin will pull up to disable
charge
Installed
JP18 Thermistor NORMAL temperature setting. Connect jumper to simulate charger entering
TNORMAL (T2-T3) temperature region. Keep connected when testing other termistor
temperature settings (JP17 - TCOOL, JP18 - TCOLD, JP21 - TWARM, JP22 - THOT).
Remove this jumper whenever using an externally connected thermistor.
Installed
JP19 Thermistor WARM temperature setting. Connect jumper to simulate charger entering TWARM
(T3-T5) temperature region.
Not Installed
JP20 Thermistor HOT temperature setting. Connect jumper to simulate charger entering THOT
(>T5) temperature region.
Not Installed
JP21 ILIM_HIZ pin setting for HIZ mode. Connect to enter the charger high impedance (HIZ) mode
to disable the converter
Not Installed
JP22 PROG pin setting for 1S, 1.5 MHz. Connect to configure charger default setting to 1S charge
regulation voltage, 2 A charging current, and 1.5 MHz switching frequency
Not Installed
JP23 PROG pin setting for 1S, 750 kHz. Connect to configure charger default setting to 1S charge
regulation voltage, 2 A charging current, and 750 kHz switching frequency
Not Installed
JP24 PROG pin setting for 2S, 1.5 MHz. Connect to configure charger default setting to 2S charge
regulation voltage, 2 A charging current, and 1.5 MHz switching frequency
Installed
JP25 PROG pin setting for 2S, 750 kHz. Connect to configure charger default setting to 2S charge
regulation voltage, 2 A charging current, and 750 kHz switching frequency
Not Installed
JP26 PROG pin setting for 3S, 1.5 MHz. Connect to configure charger default setting to 3S charge
regulation voltage, 1 A charging current, and 1.5 MHz switching frequency
Not Installed
JP27 PROG pin setting for 3S, 750 kHz. Connect to configure charger default setting to 3S charge
regulation voltage, 1 A charging current, and 750 kHz switching frequency
Not Installed
JP28 PROG pin setting for 4S, 1.5 MHz. Connect to configure charger default setting to 4S charge
regulation voltage, 1 A charging current, and 1.5 MHz switching frequencyv
Not Installed
JP29 PROG pin setting for 4S, 750 kHz. Connect to configure charger default setting to 4S charge
regulation voltage, 1 A charging current, and 750 kHz switching frequency
Not Installed
JP30 Input connection for onboard PULLUP rail LDO. Connect to power onboard 3.3V pullup rail.
LDO input will be connected via diode-OR between VBUS and BAT
Installed
JP31 EV2400 internal pullup to PULLUP connection. Connect to use EV2400 internal 3.3 V pullup to
drive the EVM PULLUP rail 1
Not Installed
JP32 STAT pin LED indicator connection. This indicates the current charger Status Installed
JP33 USB2ANY internal pullup to PULLUP connection. Connect to use the USB2ANY internal 3.3 V
pullup to drive the EVM PULLUP rail
Not Installed
S1 QON control switch. Press to either exit Ship Mode or reset the System Power Default Off
1EV2400 internal 3.3V pullup rail is not active by default. Requires modification to the internal circuit of the EV2400.
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1.3 Recommended Operating Conditions
Table 1-4. Recommended Operating Conditions
Description MIN TYP MAX Unit
V(VINx) at J1 or J2 Power supply voltage to the external blocking FETs
which allow power to VBUS pin 6 24 V
I(INx) into J1 or J2 Power supply current, which can be limited by charger's
input current limit feature (IINDPM) 0.01 3.3 A
V(BATTERY) voltage at J5 Battery voltage supported for pre charge 2.2 3.8(1S), 7.6(2S),
11.4(3S), 15.2V(4S) 18.8 V
I(BATTERY) out of/into J5 Battery charge current 0.01 2 (1S, 2S), 1(3S, 4S) 3 A
V(SYS) at J3 System voltage regulation range 3.2 19 V
I(SYS) out of J3 System load current 0 5 A
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2 Test Setup and Results
2.1 Equipment
This section includes a list of supplies required to perform tests on the BQ25672EVM.
•Power Supplies for VBUS pin: Power Supply #1 (PS1): A power supply capable of supplying up to 24 V at
3 A is required.
•Battery Simulator for BAT pin: Load #1 (4-Quadrant Supply): A Kepco Load, BOP, 20-5M, DC 0 to ±20 V,
0 to ±6 A (or higher) or a Keithley 2450 3-A source meter. When using both, a 1000-µF or higher, low ESR,
25-V rated or higher connected at the EVM battery and ground terminals is recommended.
Alternative Option: A 0–20 V/0–5 A, > 60-W DC electronic load set in a constant voltage loading mode in
parallel with a second power supply can be used. The second power supply is set to a voltage slightly below
the electronic load's constant voltage setting. When enabled, the charger's charge current then replaces the
current provided the second power supply.
•System load simulator for SYS pin:Load #2( Electronic load set to constant resistance or Resistive Load):
10 Ω, 5 W (or higher)
•Meters: (6x) "Fluke 75" multimeters, (equivalent or better).
Alternative Option: (4x) equivalent voltage meters and (2x) equivalent current meters. The current meters
must be capable of measuring at least 5 A. If used in series between the PS#1, Load#1 or Load#2, the
meters should be set for manual not auto ranging. Current meters add significant series resistance which
affects charger performance.
•Computer: A computer with at least one USB port and a USB cable. A valid internet connection is required
when using the GUI Composer application.
•PC Communication Interface:EV2300/2400 USB-Based PC Interface Board (when using Battery
Management Studio) or USB2ANY interface adapter (when using TI Charger GUI).
2.2 Equipment Setup
Use the following list to set up the EVM testing equipment. Refer to Figure 2-1 for the test setup connections to
the EVM:
1. Review the EVM connections in Table 1-2.
2. Set PS#1 for 5.0-V, 3-A current limit and then turn off the supply. Connect PS#1 to J1 (VIN1 and PGND).
3. Connect a voltage meter across TP23 (VBUS) and TP44 (PGND) to measure the input voltage as seen from
the VBUS pins of the charger.
4. Connect a voltage meter across TP1 and TP2 (I_VAC1_SENSE) to measure the input current into the VBUS
pins through the VIN1 path. Alternatively, you may connect a current meter between PS1 and J1.
5. Set Load #1 to constant voltage mode, capable of sinking (for example, compliance) at least 3 A, and output
to 5.0 V, and then disable load. Connect Load #1 to J5 (BATTERY and PGND).
6. Connect a voltage meter across TP29 (BAT) and TP46 (PGND) to measure the battery voltage as seen from
the BAT pins of the charger.
7. Connect a voltage meter across TP19 and TP20 (I_BAT_SENSE) to measure the battery charge current out
of and discharge current into BAT pins. Alternatively, you may connect a current meter between Load #1 and
J5.
8. Connect a voltage meter across TP28 (SYS) and TP45 (PGND) to measure the system voltage as seen
from the SYS pins of the charger.
9. Install shunts as shown in Table 1-3.
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Power Supply #1
Load #1:
Battery
Simulator
VVV
+
VVV
EV2300/2400
USB
VVV
+
VV
4-pin Connector
VPMID VVBUS
VSYS
VBAT
VVV
IVAC1
±
+
±
±
+
±
VVV
Optional Load #2:
eLoad or
resistor
USB2ANY
USB
OR
10-pin
Connector
IBAT
Figure 2-1. Equipment Test Setup for Testing Battery Charging
2.3 Software Setup
2.3.1 BQSTUDIO using EV2400
Download the latest version of BQSTUDIOTEST. Double click the Battery Management Studio installation file
and follow the installation steps. The software supports Microsoft® Windows® XP, 7, and 10 operating systems.
Launch BQSTUDIO and select Charger. If the EVM configuration file for BQSTUDIO does not appear in the
Charger, close BQSTUDIO and either download the .BQZ file from the EVM product folder at www.ti.com or
request the file via e2e.ti.com. The file must be saved into C:\XXX\BatteryManagementStudio\config, where XXX
is the directory you selected to install BQSTUDIO.
2.3.2 TI Charger GUI for USB2ANY
Navigate to the TI-CHARGER-GUI tool folder. Once at the tool page click on the "Start Evaluation" button. The
browser will automatically be redirected to the TI Charger GUI landing page. From the landing page locate the
device desired for evaluation and click "Select Device." Please note that the EVM must be powered and the
USB2ANY must be connected to both the EVM and the PC for a connection be established.
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2.4 Test Procedure
2.4.1 Initial Settings
Use the following steps to enable the EVM test setup:
1. Make sure Equipment Setup steps have been followed.
2. Remove the shunt on JP17 to disable charge.
3. Launch the TI-CHARGER-GUI software and select the BQ25672, if not already done.
4. Turn on PS1 and Load #1:
•Measure ➡ VSYS-PGND (TP28 and TP45) = 8.55 V ±0.2 V
2.4.2 Communication Verification
Use the following steps for communications verification:
1. In the TI Charger GUI, select the device to be evaluated, once directed, the software will be directed to
Home page. The connection status should display as Connected.
Note
If the device is not communicating and does not connect, verify that Section 2.2 and Section
2.4.1 steps have been followed. Verify the voltage across TP41 (PULLUP) and TP49 (AGND) is
approximately 3.3 V.
2. Select Menu in the top left of the screen. Note the names of the pages and the associated icons.
3. Prepare the charge mode charger register settings in the following way if not already set there by default:
• On the Quick Start page below the Quick Start section
– Set Watchdog Timer to "Disabled"
– Set Charge Current to "0.500 A"
– Set Charge Voltage to "8.400 V"
• On the Charger Configuration page below the Charging Configuration section
– Set Precharge current to "0.240 A"
– Set VSYSMIN to "7.000 V"
• On the Charger Configuration page below the Input Configuration section
– Set IINDPM to "3.000 A"
– Set ABS VINDPM to "6.000 V"
• On the Chip Configuration page below the Chip Configuration section
– Check the ShipFET Present? box
2.4.3 Charge Mode Verification
Use the following steps for charge mode verification, including pre-charge, CC and CV phases for boost
operation:
1. PS1 and Load #1 should be on from Initial Settings. In the EVM GUI, it is generally recommended to read
READ ALL REGISTERS one time in order to show all the interrupts (from status changes, automated routine
completion, faults) that occurred since the last read. Reading those registers a second clears the interrupts.
After reading the registers,
•Verify ➡ the Status and Faults page reports all Normal, meaning no DPM loops active and no WD timer
fault, VAC1 Present, VBUS Present and Power Good
2. Reinstall the shunt on jumper J17 to enable charge
•Verify ➡ STAT LED (D13) is lit
3. Take measurements as follows, noting that you may have to adjust the output of the load to accommodate
for voltage drop across the leads from the load to the EVM:
•Measure ➡ VVBUS-PGND (TP23 and TP44) = 12.0 V ±0.2 V
•Measure ➡ VBAT-PGND (TP29 and TP46) = 5.0 V ±0.2 V
•Measure ➡ IBAT_SENSE (voltage across 0.01 ohm resistor between TP19 and TP20) = 240 mA ±60 mA
•Click READ ALL REGISTERS and Verify ➡ Charge Status reports Precharge
4. Increase Load #1 regulation voltage to 8.0 V and take measurements as follows, noting that you may have
to adjust the output of the load to accommodate for voltage drop across the leads from the load to the EVM:
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•Measure ➡ VVBUS-PGND (TP23 and TP44) = 12.0 V ±0.2 V
•Measure ➡ VBAT-PGND (TP29 and TP46) = 8.0 V ±0.1 V
•Measure ➡ IBAT_SENSE (voltage across 0.01-Ω resistor between TP19 and TP20) = 500 mA ±50 mA
•Measure ➡ IVAC1_SENSE (voltage across 0.01-Ω resistor between TP1 and TP2) = 900 mA ±60 mA
•Click READ ALL REGISTERS and Verify ➡ Charge Status reports fast charge
5. Increase Load #1 regulation voltage to 8.4 V and take measurements as follows:
•Measure ➡ VBAT-PGND (TP29 and TP46) = 8.4 V ±0.04 V
•Measure ➡ IBAT_SENSE (voltage across 0.01-Ω resistor between TP19 and TP20) = 0 mA ±10 mA
•Click READ ALL REGISTERS and Verify ➡ Charge Status reports termination
6. Helpful hints when changing voltages and register settings from those above during charge mode:
• If increasing charge current or adding a load at SYS J3 terminal, you will likely need to disable the
EN_ILIM bit using the Charger Configuration page and increase the IINDPM register setting in the
Charger Configuration page.
• If increasing the input voltage above 8 V for the charger to enter buck mode, you will need to increase the
VAC_OVP from 7 V default using Charger Configuration page.
• The battery configuration is set at startup using the PROG pin (Jumpers JP24 to JP31). The battery
configuration can also be changed using the Quick Start page. Note that the SYSMIN and charge current
charge with cell configuration.
• The status, fault and interrupt bits report are helpful debug tools.
2.4.4 OTG Mode Verification
Use the following steps for OTG mode verification for boost operation:
1. Power up then turn off Load#2 output. Set to CR = 12 V/0.5 A = 24 Ω. Disconnect PS1 from J1 and attach
Load#2 to J1 (VIN1 and GND).
2. Increase Load #1 regulation voltage to 8.0 V and take measurements as follows:
•Measure ➡ VBAT-PGND (TP29 and TP46) = 8.0 V ±0.1 V
3. Prepare the OTG mode charger register settings in the following way:
• In the Chip Configuration page below the Chip Configuration section
– Uncheck "EN Charge" to disable charge mode
– Check "EN OTG Mode" to enable OTG mode
– Check "EN ADRV1" to enable ACDR1 FETs
• In the OTG Configuration page below the OTG Configuration section
– Set the OTG Reg Voltage to 12.000 mV.
– Set the IOTG Limit to 1.000 A
4. Take measurements as follows:
•Measure ➡ VVBUS-PGND (TP23 and TP44) = 12.0 V ±0.2 V
•Measure ➡ VAC1-PGND (TP24 and TP44) = 12.0 V ±0.2 V. Note that the PCB silk screen for VAC1 and
VAC2 are reversed.
•Click READ ALL REGISTERS
–Verify ➡ REG1Bb[6] reports VINDPM or OTG
–Verify ➡ REG1Cb[4:1] reports VBUS Status as Normal OTG
5. Turn on Load#2 output set to constant resistance (CR) of 24 Ω.
6. Take measurements as follows:
•Measure ➡ VAC1-PGND (TP23 and TP44) = 12.0 V ±0.2 V
•Measure ➡ IAC1-SENSE (TP1 and TP2) = 500 mA ±0.10 A
7. Lower the Load#2 to constant resistance (CR) to 10 Ω.
8. Take measurements as follows to confirm OTG current limit function:
•Measure ➡ VAC1-PGND (TP23 and TP44) < 12.0 V ±0.2 V
•Measure ➡ IAC1-SENSE (TP1 and TP2) = 1000 mA ±0.10 A
•Click READ ALL REGISTERS and Verify ➡ REG1Bb[7] reports IINDPM
9. Hints for further OTG testing:
• Enabling OTG mode is a two-step process, first enable OTG and then turn on the appropriate AC drive
FETs.
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3 PCB Layout Guidelines
Careful placement of components is critical in order for the charger to meet specifications. The items below are
listed in order of placement priority.
1. Place high frequency decoupling capacitors for PMID and SYS (C3 and C18 on the EVM) as close possible
to their respective pins and ground pin on the same layer as the charger IC (in other words, no vias) in order
to have the smallest current loop.
2. Place bulk capacitors for PMID and SYS as close possible to their respective pins and the charger's ground
pin on the same layer as the charger IC on the same layer as the charger IC (in other words, no vias).
3. Place the REGN capacitor (C35) to ground and BTST capacitors (C6 and C8) to SW as close as possible to
their respective pins only using vias for 1 side of each component if necessary.
4. Place high frequency decoupling capacitors for VBUS and BAT pins as close as possible to their respective
pins. Use at least 2 vias per capacitor terminal if required.
5. Place bulk capacitors for VBUS and BAT pins as close as possible to their respective pins. Use at least 2
vias per capacitor terminal if required.
6. Place the inductor close to SW1 and SW2 pins. It is acceptable to use multiple vias to make these
connections as the vias are only adding small amounts of inductance and resistance to an inductor.
7. While this EVM has analog ground (AGND) and power ground (PGND) planes that connect close to the
charge GND pin, two grounds not required. Resistors and capacitors used for setting sensitive nodes (for
example, ILIM, TS) can use one common ground plane but with their ground terminals connected away from
high current ground return paths containing switching noise.
Note that this EVM has test points and jumpers requiring traces out to the PCB edges. Routing these traces
required some PCB layout compromises for less critical components than those listed in the first six items above.
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4 Board Layout, Schematic and Bill of Materials
4.1 BMS034E1 Board Layout
Figure 4-1 through Figure 4-4 illustrate the schematic for the BQ25672EVM
Figure 4-1. BMS034E2/A Top Layer
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Figure 4-2. BMS034E2/A Signal Layer 1
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Figure 4-3. BMS034E2/A Signal Layer 2
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Figure 4-4. BMS034E2/A Bottom Layer
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4.2 BQ25672EVM (BMS034E1-004) Schematic
0.01
R12
3.9V - 24V
0V - 19.0V
5A MAX
1uF
C26
DNP
5A
D+
D-
PGND
PGND
2200pF
C5 30V
DNP
D4
DNP
PGND
2.0
R10
DNP
2200pF
C7 30V
DNP
D8
DNP
PMID
PGND
PMID
SYS
0.01
R11
TP15 TP16
PGND
10uF
C27
DNP
2.0
R7
DNP
AGNDAGND
10uF
C28
DNP 10uF
C29
10uF
C30
10uF
C31
GND
BATTERY
0V - 18.8V
5A MAX
0.01
R13
TP19 TP20
PGND
TS
ILIM_HIZ
PROG
/QON
BATP
/INT
STAT
REGN
4.7uF
C35
PGND
/CE
SDRV
1000pF
C41
DNP
AGND
NT1
Net-Tie
1nF
C42
DNP100k
R16
40V
DNP
D10
DNP
0
R17
4
7,8
1,2,3
5,6,
Q5
CSD17575Q3
10uF
C38
10uF
C39
10uF
C40
DNP
0
R14
DNP
BTST1
33uF
C34
DNP
PGND
VAC1
1
2
JP5
BYPASS
BAT-BATTERY
12V
D9
DNP
PGND
VBUS
0.01uF
C16
0.01uF
DNP C17 DNP
AGNDAGND
TP32TP29 TP30TP28
TEST POINTS
TP23 TP24 TP26 TP33TP31
TP37
TP35TP25 TP27
VAC1
TP34
TP36
VAC2 PMIDVBUS ACDRV1 ACDRV2REGN SDRVSYS BAT
/CE
TS
STAT /QON/INTBATP
PROGILIM_HIZ
TP38 TP39 TP40
PULLUP
TP41
SCL SDA
TP42 TP43 TP44 TP45 TP46 TP48
AGNDPGND PGND PGND AGND AGND
TP49 TP50
VIN1
GND 0.01
R2
100k
R8DNP 1nF C4
1uF
C1
DNP
0
R1
DNP
3.9V - 24V
5A
VIN2
GND
3.9V - 24V
5A 1uF
C3
DNP
0.01
R6
0
R5
DNP
4
7,8 1,2,3
5,6,
Q3
CSD17581Q3A
4
7,8 1,2,3
5,6,
Q1
CSD17581Q3A
4
7,8
1,2,3
5,6,
Q4
CSD17581Q3A
4
7,8
1,2,3
5,6,
Q2
CSD17581Q3A
12V
D2
12V
D6
1nF
C2
100k
R3DNP
PGND
PGND
VAC1
VAC2
1
2
J2
1
2
JP3
BYPASS
BYPASS
VAC1-VBUS
VAC2-VBUS
VBUSVBUS
VAC1
VAC2
BTST2
TP14
TP7
TP6
PGND
TP13
PGND
SYS
10uF
C19
10uF
C20
10uF
C21
10uF
C22
DNP 10uF
C23
DNP 10uF
C24
DNP
PGND
33uF
C25
DNP
TP17 TP18
TP9TP8
DNP
TP1 TP2
40V
D5
DNP
_acdrv2
40V
D1
DNP
_acdrv1
VAC2 ACDRV1
10uF
C10
DNP
10uF
C9
DNP 10uF
C11
10uF
C12
PGND
BAT
VBUS 1
D- 2
D+ 3
ID 4
GND 5
6 7 8
11 10 9
J6
1
2
JP10
USB D-
USB D+
1
2
JP6
1 2
JP11
PGND
PGND
D+
D-
TP21
TP22
USB_VIN
1
2
3
JP1
1
2
3
JP2
ACDRV1 ACDRV2
_acdrv1 _acdrv2
PGND PGND
VBUS
BAT
PULLUP
VBUS
BAT
PULLUP
REGN REGN
PROG
TS
ILIM_HIZ
PROG
ILIM_HIZ
TS
/INT
/CE
STAT
/QON
/INT
/CE
STAT
/QON SDA
SCL SCL
SDA
1uH
L1
DNP
USB_VIN
1
2
3
JP7
VAC1
VAC2
1
2
J4
1
2
J1
1
2
JP4
0.047uF
C8
0.047uF
C6
ACDRV2
VAC1
VAC2
USB VIN
TP3
DNP
SW1
SW2
TP10
DNP
TP4
TP11
TP5
DNP
TP12
DNP
TP47
PGND
1
2
3
JP8
1000pF
C36
BAT
33uF
C33
DNP
1
2
3
J5
100
R15
1
2
3
JP9
EXT_BATP
BATTERYBAT PIN
BATP
SDRV
CONNECT
SCL
SDA
1
2
J3
VBUS
2
VBUS
3BTST1 4
BTST2 19
VAC1
9
VAC2
8
ACDRV1
11
ACDRV2
10
BAT 22
BAT 23
SW1 28
SW2 26
CE
13
INT 21
QON
12
BATP 18
D+
6D-
7
ILIM_HIZ
17
PMID
29
PROG
20
REGN
5
SCL
14
SDA
15 SDRV 24
STAT 1
SYS 25
TS 16
GND 27
BQ25672RQM
U1
1uH
L2
EXT_BATP
EXT_BATP
0.1uF
C13
30V
D3
DNP
0.1uF
C32
0.1uF
C18
0.1uF
C37
DNP
30V
D7
DNP
0.1uF
C14
0.1uF
C15
294
R4
294
R9
Figure 4-5. BQ25672EVM (BMS034E2/A-004) Schematic Page 1
Board Layout, Schematic and Bill of Materials www.ti.com
16 BQ25672 Evaluation Module SLUUCF3A – DECEMBER 2020 – REVISED OCTOBER 2021
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PULLUP
SCL
SDA
4
1
2
3
J8
AGND
10.0
R37
SCL
SDA
AGND
PULLUP
10.0
R43
EV2400
PULLUP
USB2ANY
PULLUP
REGN
ILIM_HIZ
AGND
1
2
JP21
100k
R23
1
2
JP13
1
2
JP14
1.5A500mA
IINDPM IINDPM
ENABLE
HIZ
S1
/QON
AGND
1
2
JP17
CHARGE
ENABLE
/CE
AGND
EXT_TS
AGND
EXTERNAL
THERMISTOR
GND
D11 D12
0.1uF
C43
0.1uF
C44
10.0
R35
PGNDPGND
PULLUP
CONNECT
PULLUP
VBUS BAT
1 2
JP30
30.1k
R24
5
NORMAL
.23k
R18
TS
WARM
1
2
JP19
TS
COOL
1
2
JP15
TS
HOT
1
2
JP20
TS
TS
COLD
1
2
JP16
10
TS
.0k
R25
1
2
JP18
4.87k
R26
7.68k
R19
REGN
1
2
JP12
AGND
0
R22 EXT_TS
8.20k
R30
1
2
JP25
1
2
JP24
1
2
JP23
1
2
JP22
1S 1S 2S 2S
1.5MHz 1.5MHz750kHz 750kHz
2A ICHG 2A ICHG 2A ICHG 2A ICHG
10.5k
R31
27.0k
R34
1
2
JP29
1
2
JP28
1
2
JP27
1
2
JP26
3S 3S 4S 4S
1.5MHz 1.5MHz 750kHz750kHz
1A ICHG 1A ICHG 1A ICHG 1A ICHG
AGND
1
2
JP31
1
2
JP33
Green
1
2
D13
1
2
JP32
STAT LED
CONNECT
STAT
10.0k
R39
10.0k
R40
10.0k
R41
/INTSDASCL
10.0k
R42
/CE
2.21k
R38
PROG
PULLUP PULLUP VBUS
BAT
PULLUP
VBUS
BAT
PULLUP
/INT
SDA
SCL
/CE
STAT
/QON
PROG
TS
REGN
ILIM_HIZ
REGN
SCL
SDA
PROG
ILIM_HIZ
/INT
/CE
STAT
/QON
TS
1
2
J7
1 2
3 4
5 6
7 8
9 10
J9
IN
2OUT 1
GND 3
TLV76033DBZR
U2
0
R36
255k
R20
127k
R21
3.00k
R27
4.70k
R28
6.04k
R29
13.7k
R32
17.4k
R33
Figure 4-6. BQ25672EVM (BMS034E2/A-004) Schematic Page 2
www.ti.com Board Layout, Schematic and Bill of Materials
SLUUCF3A – DECEMBER 2020 – REVISED OCTOBER 2021
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4.3 Bill of Materials
Table 4-1. BQ25672EVM Bill of Materials
Designator QTY Value Description PackageReference PartNumber Manufacturer
!PCB1 1 Printed Circuit Board BMS034 Any
C2, C4 2 1000pF CAP, CERM, 1000 pF, 50 V, +/- 1%, C0G/
NP0, 0402
0402 GRM1555C1H102FA01
D
MuRata
C6, C8 2 0.047uF CAP, CERM, 0.047 uF, 25 V, +/- 10%, X7R,
0402
0402 GRM155R71E473KA88
D
MuRata
C11, C12, C19, C20,
C21, C29, C30, C31
8 10uF CAP, CERM, 10 uF, 25 V, +/- 10%, X5R,
0805
0805 C2012X5R1E106K125A
B
TDK
C13, C14, C15, C18,
C32
5 0.1uF CAP, CERM, 0.1 uF, 50 V,+/- 10%, X7R,
0402
0402 C1005X7R1H104K050B
E
TDK
C35 1 4.7uF CAP, CERM, 4.7 uF, 16 V, +/- 10%, X5R,
0603
0603 GRM188R61C475KAAJ
D
MuRata
C36 1 1000pF CAP, CERM, 1000 pF, 50 V, +/- 5%, C0G/
NP0, 0402
0402 GRM1555C1H102JA01
D
MuRata
C38, C39 2 10uF CAP, CERM, 10 uF, 25 V, +/- 20%, X5R,
0603
0603 GRT188R61E106ME13
D
MuRata
C43, C44 2 0.1uF CAP, CERM, 0.1 uF, 25 V, +/- 10%, X5R,
0402
0402 GRM155R61E104KA87
D
MuRata
D2, D6 2 12V Diode, Zener, 12 V, 300 mW, SOD-523 SOD-523 BZT52C12T-7 Diodes Inc.
D11, D12 2 30V Diode, Schottky, 30 V, 0.2 A, SOD-323 SOD-323 BAT54HT1G ON Semiconductor
D13 1 Green LED, Green, SMD 1.6x0.8x0.8mm LTST-C190GKT Lite-On
H1, H2, H3, H4 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M
J1, J2, J3, J4 4 Terminal Block, 5.08 mm, 2x1, Brass, TH 2x1 5.08 mm Terminal
Block
ED120/2DS On-Shore Technology
J5 1 Terminal Block, 5.08 mm, 3x1, Brass, TH 3x1 5.08 mm Terminal
Block
ED120/3DS On-Shore Technology
J6 1 Connector, Receptacle, Micro-USB Type B,
R/A, Bottom Mount SMT
7.5x2.45x5mm 47346-0001 Molex
J7 1 Terminal Block, 3.5 mm, 2x1, Tin, TH Terminal Block, 3.5 mm,
2x1, TH
0393570002 Molex
J8 1 Header (friction lock), 100mil, 4x1, R/A, TH 4x1 R/A Header 0022053041 Molex
J9 1 Header (shrouded), 100mil, 5x2, High-
Temperature, Gold, TH
5x2 Shrouded header N2510-6002-RB 3M
JP1, JP2, JP7, JP8,
JP9
5 Header, 100mil, 3x1, Tin, TH Header, 3 PIN, 100mil,
Tin
PEC03SAAN Sullins Connector
Solutions
JP3, JP4, JP5 3 Header, 100mil, 2x1, Gold, TH Header, 100mil, 2x1, TH HTSW-102-07-G-S Samtec
Board Layout, Schematic and Bill of Materials www.ti.com
18 BQ25672 Evaluation Module SLUUCF3A – DECEMBER 2020 – REVISED OCTOBER 2021
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Table 4-1. BQ25672EVM Bill of Materials (continued)
Designator QTY Value Description PackageReference PartNumber Manufacturer
JP6, JP10, JP11,
JP12, JP13, JP14,
JP15, JP16, JP17,
JP18, JP19, JP20,
JP21, JP22, JP23,
JP24, JP25, JP26,
JP27, JP28, JP29,
JP30, JP31, JP32,
JP33
25 Header, 100mil, 2x1, Tin, TH Header, 2 PIN, 100mil,
Tin
PEC02SAAN Sullins Connector
Solutions
L2 1 1uH Inductor, Shielded, Ferrite, 1 uH, 11.1 A,
0.0078 ohm, SMD
SMD 7.1x3.0x6.5mm SPM6530T-1R0M120 TDK
LBL1 1 Thermal Transfer Printable Labels, 0.650" W
x 0.200" H - 10,000 per roll
PCB Label 0.650 x 0.200
inch
THT-14-423-10 Brady
Q1, Q2, Q3, Q4 4 30V MOSFET, N-CH, 30 V, 60 A, DNH0008A
(VSONP-8)
DNH0008A CSD17581Q3A Texas Instruments
Q5 1 30V MOSFET, N-CH, 30 V, 60 A, DQG0008A
(VSON-CLIP-8)
DQG0008A CSD17575Q3 Texas Instruments
R2, R6, R11, R12,
R13
5 0.01 RES, 0.01, 1%, 1 W, 2010 2010 WSL2010R0100FEA18 Vishay-Dale
R4, R9 2 294 RES, 294, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW0603294RFKEA Vishay-Dale
R15 1 100 RES, 100, 1%, 0.1 W, 0603 0603 RC0603FR-07100RL Yageo
R17, R36 2 0 RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW06030000Z0EA Vishay-Dale
R18 1 5.23k RES, 5.23 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW04025K23FKED Vishay-Dale
R19 1 7.68k RES, 7.68 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW04027K68FKED Vishay-Dale
R20 1 255k RES, 255 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW0603255KFKEA Vishay-Dale
R21 1 127k RES, 127 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW0603127KFKEA Vishay-Dale
R22 1 0 RES, 0, 1%, 0.5 W, 0805 0805 5106 Keystone
R23 1 100k RES, 100 k, 1%, 0.1 W, 0603 0603 RC0603FR-07100KL Yageo
R24 1 30.1k RES, 30.1 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW040230K1FKED Vishay-Dale
R25, R39, R40, R41,
R42
5 10.0k RES, 10.0 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW040210K0FKED Vishay-Dale
R26 1 4.87k RES, 4.87 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW04024K87FKED Vishay-Dale
R27 1 3.00k RES, 3.00 k, 1%, 0.1 W, 0603 0603 RC0603FR-073KL Yageo
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Table 4-1. BQ25672EVM Bill of Materials (continued)
Designator QTY Value Description PackageReference PartNumber Manufacturer
R28 1 4.70k RES, 4.70 k, 1%, 0.1 W, 0603 0603 RC0603FR-074K7L Yageo
R29 1 6.04k RES, 6.04 k, 1%, 0.1 W, 0603 0603 RC0603FR-076K04L Yageo
R30 1 8.20k RES, 8.20 k, 1%, 0.1 W, 0603 0603 RC0603FR-078K2L Yageo
R31 1 10.5k RES, 10.5 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW060310K5FKEA Vishay-Dale
R32 1 13.7k RES, 13.7 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW060313K7FKEA Vishay-Dale
R33 1 17.4k RES, 17.4 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 CRCW060317K4FKEA Vishay-Dale
R34 1 27.0k RES, 27.0 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0603
0603 ERJ-3EKF2702V Panasonic
R35, R37, R43 3 10.0 RES, 10.0, 1%, 0.25 W, AEC-Q200 Grade 0,
1206
1206 ERJ-8ENF10R0V Panasonic
R38 1 2.21k RES, 2.21 k, 1%, 0.063 W, AEC-Q200 Grade
0, 0402
0402 CRCW04022K21FKED Vishay-Dale
S1 1 Switch, Normally open, 2.3N force, 200k
operations, SMD
KSR KSR221GLFS C&K Components
SH-JP1, SH-JP2,
SH-JP6, SH-JP7,
SH-JP8, SH-JP9,
SH-JP11, SH-JP12,
SH-JP14, SH-JP17,
SH-JP18, SH-JP24,
SH-JP30, SH-JP32
14 1x2 Shunt, 100mil, Gold plated, Black Shunt SNT-100-BK-G Samtec
TP1, TP2, TP4, TP6,
TP7, TP9, TP11,
TP13, TP14, TP15,
TP16, TP17, TP18,
TP19, TP20, TP21,
TP22, TP30, TP31,
TP32, TP33, TP34,
TP35, TP36, TP37,
TP38, TP39, TP40,
TP41, TP42, TP43
31 Test Point, Miniature, White, TH White Miniature
Testpoint
5002 Keystone
TP23, TP24, TP25,
TP26
4 Test Point, Miniature, Red, TH Red Miniature Testpoint 5000 Keystone
TP27, TP28 2 Test Point, Miniature, Orange, TH Orange Miniature
Testpoint
5003 Keystone
TP29 1 Test Point, Miniature, Yellow, TH Yellow Miniature
Testpoint
5004 Keystone
Board Layout, Schematic and Bill of Materials www.ti.com
20 BQ25672 Evaluation Module SLUUCF3A – DECEMBER 2020 – REVISED OCTOBER 2021
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