Texas Instruments BQ25886 User manual

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User's Guide
SLUUC11–February 2019
BQ25886 QFN Standalone boost-mode battery charger
evaluation module
This user's guide provides detailed testing instructions for the BQ25886 evaluation module (EVM). Also
included are descriptions of the necessary equipment, equipment setup, procedures, the printed-circuit
board layouts, schematics, and the bill of materials (BOM).
Throughout this user's guide, the abbreviations EVM, BQ25886EVM, BMS016, and the term evaluation
module are synonymous with the BQ25886 QFN evaluation module, unless otherwise noted.
Contents
1 Introduction ................................................................................................................... 2
1.1 EVM Features....................................................................................................... 2
1.2 I/O Descriptions..................................................................................................... 2
2 Test Summary................................................................................................................ 4
2.1 Equipment ........................................................................................................... 4
2.2 Charge Mode........................................................................................................ 5
2.3 OTG Mode .......................................................................................................... 8
2.4 Helpful Tips ........................................................................................................ 10
3 PCB Layout Guidelines.................................................................................................... 10
4 Board Layout, Schematic, and Bill of Materials ........................................................................ 11
4.1 Board Layout....................................................................................................... 11
4.2 Schematic .......................................................................................................... 12
4.3 Bill of Materials .................................................................................................... 13
List of Figures
1 BQ25886 Charge Mode Test Setup ...................................................................................... 5
2 Charge Mode Startup ....................................................................................................... 7
3 BQ25886 OTG Mode Test Setup.......................................................................................... 8
4 OTG Mode Startup .......................................................................................................... 9
5 BQ2588xEVM Top Overlay............................................................................................... 11
6 BQ2588xEVM Layer 2..................................................................................................... 11
7 BQ2588xEVM Layer 3..................................................................................................... 11
8 BQ2588xEVM Bottom Overlay ........................................................................................... 11
9 BQ25886EVM Schematic ................................................................................................. 12
List of Tables
1 Device Data Sheets ......................................................................................................... 2
2 EVM Connections............................................................................................................ 2
3 EVM Jumper Connections and Shunt Installation....................................................................... 3
4 Recommended Operating Conditions..................................................................................... 3
5 BQ25886EVM .............................................................................................................. 13

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Trademarks
All trademarks are the property of their respective owners.
1 Introduction
As industry improvements continue to make portable electronics more powerful, their power requirements
increase. Using two series Li-Ion polymer cells is one way to achieve this power increase. Charging these
8.4-V battery packs from a legacy 5-V USB port requires a boost charger. The BQ25886 is a highly-
integrated 2-A boosting, 1.5-MHz switch-mode battery charge management device for a 2s Li-Ion and Li-
polymer battery. BQ25886 is the standalone solution which device can operate without the need of a host.
1.1 EVM Features
The BQ25886 QFN evaluation module (EVM) is a complete charger module for evaluating the standalone,
2s battery NVDC charger in the QFN package. Key features of this EVM include:
• Easily evaluate the high-efficiency 2-A, 1.5-MHz integrated field-effect-transistor (FET), switch-mode
boost charger in the QFN package
• Use of an onboard USB input adapter for connecting to a USB source and either communication
through D+/D– to set the default input current limit
• Onboard test points, sense resistors, and jumpers facilitate measurement of high-efficiency- and high-
accuracy voltage and current regulation
See the device data sheet (Table 1) for detailed features and operation of the integrated circuit (IC).
Table 1. Device Data Sheets
Device Data Sheet EVM Label Variant
BQ25886 SLUSDE6 BQ25886EVM-002 002
1.2 I/O Descriptions
Table 2 lists the jumper connections available on this EVM.
Table 2. EVM Connections
Jack Description
J1(2)–VBUS Connection for positive terminal of charger power source
J1(1)–GND Connection for negative terminal (ground terminal) of charger power source
J2(1)–SYS Connection to system load
J2(2)–GND Ground
J3(1)–PMID PMID pin connection
J3(2)–GND Ground
J4(1)–BAT+ Connection for battery pack positive node to BAT pin
J4(2)-TOP-
/BOT+ Connection for the mid connection point of the top and bottom cell (BQ25887only. Do not use for BQ25883 or BQ25886)
J5(1)–GND Connection to battery pack negative node = EVM ground
J5(2)–TS Connection for the NTC thermistor
J6 I2C 4-pin connector for EV2400
J7 Input mini-USB port
lists the EVM jumper connections.

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Table 3. EVM Jumper Connections and Shunt Installation
Jack Description BQ25886 Setting
JP1 STAT, PG, CE pins 3.3-V LDO pullup source of either SYS (pin 1 to 2) or BAT (pin 2 to 3) Shunt pins 2 and 3
JP2 ILIM pin connection to resistor to GND Installed
JP3 Connects D+ pin to pin 3 of J5 mini-USB port Installed
JP4 DNI NA
JP5 TS resistor divider pullup source (REGN) connection Installed
JP6 Connects D– pin to pin 2 of J5 mini-USB port Installed
JP7 Connects an onboard 10 kΩfrom TS pin to GND Installed
JP8 Connects OTG pin to GND Open
JP9 Connects CE pin to GND Installed
JP10 Pulls up STAT through diode and resistor to pullup source Installed
JP11 Pulls up PG through diode and resistor to pullup source Shunt pins 2 and 1
JP12 Pull up GND pin to GND Shunt pins 2 and 3
JP13 NC pin Open
JP14 DNI NA
JP15 Pull up CE pin through 10-kΩresistor Open
JP16 Connects VSET to GND through 18-kΩresistor sets VREG to 8.2V Open
JP17 Connects VSET to GND through 39.2-kΩresistor sets VREG to 8.8V Open
JP18 Connects VSET to GND through 75-kΩresistor sets VREG to 8.7V Open
JP19 Connects VSET to GND through 150-kΩresistor sets VREG to 8.4V Installed
Table 4 lists the recommended operating conditions for this EVM.
Table 4. Recommended Operating Conditions
Symbol Description MIN TYP MAX Unit
Supply voltage, VVBUS Input voltage from AC adapter 4.3
Battery voltage, VBAT in charge
mode Voltage applied at VBAT terminal 0 or floating 8.4 9.2 V
IBAT Fast charging current 0 — 2.2 A
Discharging current through internal MOSFET 6 — — A
Supply current, IIN Maximum input current from AC adapter input 0 — 3.3 A

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2 Test Summary
2.1 Equipment
This section includes a list of supplies required to perform tests on this EVM.
1. Power supply (PS#1) : The power supply must be capable of supplying up to 6.5 V at 3.3 A. While this
part can handle larger voltage and current, it is not necessary for this procedure.
2. Battery simulator (BS#1) : Four-quadrant supply set to constant voltage ≤9.2 V
Example: Kepco Bipolar Power Supply: BOP 20–5M, DC 0 to ±20 V, 0 to ±5 A (or higher) and Keithley
2420 Sourcemeter
3. Load #1: Electronic or resistive load capable of sinking up to 3 A at 9.2 V
4. Meters: Six Fluke 75 multimeters (equivalent or better)
• Alternatively; four equivalent voltage meters and two equivalent current meters. The current meters
must be capable of measuring greater than 3 A of current. A current meter in series with the
battery or battery simulator must have auto-ranging disabled and should only be used for DC
measurements (no start-up, transients, and so forth).

V
VM#1
Power
Supply
PS#1
V
VM#4 VVM#5VM#2 VM#3
VVM#6
AGND
AGND
V V
Battery
Simulator
BS#1
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2.2 Charge Mode
2.2.1 Charge Mode Test Setup
Use the following list to set up the equipment for charge mode operation:
1. Figure 1 shows the test setup for BQ25886 when in charge (boosting) mode including jumper settings
per Table 2. Ensure that the power supply and battery simulator are turned off before connecting to the
EVM.
Figure 1. BQ25886 Charge Mode Test Setup
2. Voltmeters 1 through 3 (VM1, VM2, and VM3) connect to Kelvin test points for measuring VBUS, SYS,
and BAT as close to the IC pins as possible. Voltmeters 4 through 6 measure the voltage across 0.01
Ω, which gives the current.
3. Before attaching to the EVM, set battery simulator 1 (BS#1) no higher than 7.6 V and at a 2.5-A
current limit and set power supply 1 (PS#1) for 5.5 V and a 3.5-A current limit.
4. Turn off BS#1 and PS#1 then attach BS#1 to the BAT (J4) and PGND(J5) terminal of the EVM and
attach PS#1 to J1 (VBUS, GND) of the EVM.
5. For and BQ25886, optionally, turn off an electronic load and attach to the J2 (SYS, GND) terminal of
the EVM.
6. For BQ25886EVM, place shunt on JP15. Adjust R31 potentiometer such that the resistance measured
between TP18 and TP26 is 4.15kΩ. Adjust R5 potentiometer such that the resistance measured
between TP21 AND tp26 is 500Ω. Short D+ and D- pin to put the device in DCP upon adapter plug in
(Place shunt on JP3 pin 2 to JP6 pin 1).
2.2.2 Charge Mode Test Procedure
Use the following steps for charge mode verification and testing:

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1. Turn on PS#1 and click the Read Register button twice.
•Observe →everything "Normal" at the Fault box
•Observe →D4 (STAT) is off because charge is disabled.
•Observe →D5 (PG) is on indicating power is good.
•Measure on VM2 →V(TP14 (SYS), TP26 (AGND)) = 6.4 V ±50 mV
2. On BQ25886EVM, remove shunt on JP15 to start charge. To correct for cable resistance, adjust PS#1
until VM1 [TP7 (VBUS_S), TP26 (AGND)] measures 5.5 V ±50 mV and adjust BS#1 until VM3 [TP15
(BAT), TP26 (AGND)] measures 7.6 V ±50 mV.
•Measure on VM6 →V(TP5 (RBAT+), TP6 (RBAT-)) = 10 mV ±0.7 mV which corresponds to ICHG
= 1.0 A ±5% through a 0.010-Ω±1% resistor. Voltage of 0.1 mV is added to account for DMM
accuracy.
•Measure on VM4 →V(TP1 (RAC+), TP2 (RAC-)) = 14.8 mV ±0.7 mV which corresponds to IVBUS
= 1.48 A ±5% (accounting for efficiency variation across ICs and inductors) through a 0.010-Ω±1%
resistor. Voltage of 0.1 mV is added to account for DMM accuracy.
3. Optionally, . Adjust the RLIM potentiometer (R5) until:
•Measure on VM4 →V(TP1 (RAC+), TP2 (RAC-)) = 10 mV ±0.7 mV which corresponds to IVBUS =
1.0 A ±5% through a 0.010-Ω±1% resistor. Voltage of 0.1 mV is added to account for DMM
accuracy.
4. Turn off and disconnect PS#1, BS#1, Load#1, and voltmeters.

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2.2.3 Charge Mode Evaluation Results
Figure 2 shows the Charge Mode Startup graph.
Figure 2. Charge Mode Startup

V
VM#1
Battery
Simulator
or Power
Supply
BS#1
VM#2 VM#3
V
VM#4
AGND
AGND
V V
Resistive
or e-Load
Load#1
V
VM#5
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2.3 OTG Mode
2.3.1 OTG Mode Test Setup
Use the following list to set up the equipment for boost mode operation:
1. Ensure that the electronic load and battery simulator are turned off when connecting to the EVM.
shows the test setup for when in OTG mode, including the jumper settings per Table 2.
Figure 3. BQ25886 OTG Mode Test Setup
2. Voltmeters 1 through 3 (VM1, VM2, and VM3) connect to Kelvin test points for measuring VBUS, SYS,
and BAT as close to the IC pins as possible. Voltmeters 4 through 5 measure the voltage across 0.01
Ω, which gives the current.
3. Set BS#1 to 7.6 V and at a 6-A current limit, then turn off BS#1 and attach to the J4 (BAT, GND)
terminal of the EVM.
4. With electronic load disabled, attach to the J1 (VBUS, GND) terminal of the EVM.
5. Place shunt on JP8 to pull OTG pin high to enable OTG mode.
2.3.2 OTG Mode Test Procedure
Use the following steps for boost mode verification:
1. Measure on VM2 →V(TP1 (VBUS), TP26 (AGND)) = 5.1 V ±160 mV. Voltage of 10 mV is added to
account for DMM accuracy.
2. Set electronic load in CC mode to 500 mA, or resistive load to 10 Ω.
3. Measure on VM2 →V(TP1 (VBUS), TP26 (AGND)) = 5.1 V ±160 mV. Voltage of 10 mV is added to
account for DMM accuracy.
4. Turn off and disconnect BS#1, Load#1, and voltmeters.

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2.3.3 OTG Mode Evaluation Results
Figure 4 shows the OTG Mode Startup graph.
Figure 4. OTG Mode Startup

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2.4 Helpful Tips
The following list provides a few helpful tips:
• The leads and cables to the various power supplies, batteries, and loads have resistance. The current
meters also have series resistance. The charger dynamically reduces charge current depending on the
voltage sensed at its VBUS pin (using the VINDPM feature), BAT pin (as part of normal termination),
and TS pin (through its battery temperature monitoring feature through the battery thermistor).
Therefore, the designer must use voltmeters to measure the voltage as close to the IC pins (TP7,
TP15, and TP16) as possible instead of relying on the digital readouts of the power supply.
• When using a source meter that can source and sink current as the battery simulator, TI highly
recommends adding a large (1000 μF or greater) capacitor at the EVM BAT and GND connectors to
prevent oscillations at the BAT pin, which are due to mismatched impedances of the charger output
and source meter input within their respective regulation loop bandwidths. Configuring the source
meter for four-wire sensing eliminates the requirement for a separate voltmeter to measure the voltage
at the BAT pin. When using four-wire sensing, always ensure that the sensing leads are connected to
prevent accidental overvoltage by the power supply.
• For precise measurements of efficiency and charge current or battery regulation (or both) near
termination, a current meter in series with the battery or battery simulator must not be set to auto-range
and may require removal, entirely. This EVM offers an alternate method for measuring currents by
measuring the voltage across a 1%, thermally-capable (for example, 0.010 Ωin a 1210 or larger
footprint) resistor in series between the power sources and power pins.
3 PCB Layout Guidelines
Minimize the switching node rise and fall times for minimum switching loss. Proper layout of the
components that minimize the high-frequency current path loop is important to prevent electrical and
magnetic field radiation and high-frequency resonant problems. To ensure proper layout, follow the priority
list for this printed-circuit board (PCB) in the order presented:
1. Place the output capacitor as close as possible to the SYS pin and GND pin connections and use the
shortest copper trace connection or GND plane.
2. Put the input capacitors near to the VBUS and PMID pins. Tie ground connections to the IC ground
with a short copper trace connection or GND plane.
3. Place the inductor input terminal as close to the SW pin as possible. Minimize the copper area of this
trace to lower electrical and magnetic field radiation but make the trace wide enough to carry the
charging current. Do not use multiple layers in parallel for this connection. Minimize parasitic
capacitance from this area to any other trace or plane.
4. Route analog ground separately from power ground. Connect analog ground and connect power
ground separately. Connect analog ground and power ground together using the power pad as the
single ground connection point or use a 0-Ωresistor to tie analog ground to power ground.
5. Use a single ground connection to tie the charger power ground to the charger analog ground just
beneath the IC. Use ground copper pour but avoid power pins to reduce inductive and capacitive noise
coupling.
6. Place decoupling capacitors next to the IC pins and make the trace connection as short as possible.
7. One critical note regarding the layout is that the exposed power pad on the backside of the IC package
must be soldered to the PCB ground. Ensure that there are sufficient thermal vias directly under the IC
connecting to the ground plane on the other layers.
8. The via size and number must be sufficient for a given current path.
See the EVM design for the recommended component placement with trace and via locations..