Texas Instruments DLP LightCrafter Dual DLPC900 Instruction sheet

Preface
DLPU018–October 2014
Read This First
About This Manual
This document specifies the command and control interface to the DLPC900 controller and defines all
applicable commands, default settings, and control register bit definitions.
Related Documents from Texas Instruments
• DLPC900 Data Sheet. DLPS037
• DLP6500FLQ Data Sheet. DLPS040
• DLP6500FYE Data Sheet DLPS053
• DLP9000FLS Data Sheet. DLPS036
If You Need Assistance
See the DLP and MEMS TI E2E Community support forums.
LightCrafter is a trademark of Texas Instruments.
DLP is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
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DLPU018–October 2014
Interface Protocol
This chapter describes the interface protocol between the DLPC900 and a host processor. The DLPC900
supports two host interface protocols: I2C and USB 1.1 slave interfaces.
1 I2C Interface
The DLPC900 controller uses the I2C protocol to exchange commands and data with a host processor.
The I2C protocol is a two-wire serial data bus that conforms to the NXP I2C specification. One wire, SCL,
serves as a serial clock, while the second wire, SDA, serves as serial data. Several different devices can
be connected together in an I2C bus. Each device is software addressable by a unique address.
Communication between devices occurs in a simple master-to-slave relationship.
1.1 I2C Transaction Structure
All I2C transactions are composed of a number of bytes, combined in the following order:
START Condition, Slave Address Byte + R/W Bit, Sub-Address Byte, N-Data Bytes, STOP Condition
where N in "N-Data Bytes" varies based on the sub-address.
1.1.1 I2C START Condition
All I2C transactions begin with a START condition. A START condition is defined by a high-to-low
transition on the SDA line, followed by a high-to-low transition on the SCL line.
1.1.2 I2C STOP Condition
All I2C transactions end with a STOP condition. A STOP condition is defined by a low-to-high transition on
the SDA line, followed by a low-to-high transition on the SCL line.
1.1.3 DLPC900 Slave Address
The DLPC900 offers a programmable slave address. Refer to the App Defaults Settings found in the DLP®
LightCrafter™ 6500 & 9000 GUI Firmware tab to set a different slave address. The default I2C settings are
shown in Table 1. The Write Slave Address must be an even 7-bit address, and the Read Slave Address
must be the Write Slave Address plus 1.
Table 1. I2C Slave Settings
Addressing Default Write Address Default Read Address Maximum Clock Rate (kHz)
Mode
7-bit 0x34 0x35 400
1.1.4 DLPC900 Sub-Address and Data Bytes
The DLPC900 I2C sub-address corresponds to the byte address of the DLPC900 commands described in
Appendix A. Most I2C sub-addresses have a Read and Write command pair where the Write command
equals the Read command with the most significant bit set. For example, Table 2 and Table 4 shows the
Input Data Channel Swap sub-address command pair is (0x04,0x84), where the Write sub-address
command 0x84 is the Read sub-address command 0x04 with the most significant bit set. Each sub-
address command requires a certain number of data bytes, and each command is followed by variable
length data where the least significant byte is first for each parameter.
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SDA
SCL
0x34 0x04
START Slave Write Address Sub-addressACK ACK SCL held low by
DLPC900 STOP
www.ti.com I2C Interface
NOTE: The DLPC900 I2C command data is formatted with the least significant byte first for each
parameter in the data. This maintains the same format with the USB protocol. However, it
deviates from the DLPC350 I2C format where the most significant byte is first.
The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between the Read
and Write commands; therefore, whenever a Read command is executed it must be followed by I2C
operation with the Read Slave Address to retrieve the data otherwise the data will be overwritten by the
next command executed. See Section 1.2 for a Read command example.
1.2 Example I2C Read Command Sequence
To execute a command to read the Input Data Channel Swap setting, the host builds a sequence of bytes
containing the slave address, the sub-address, and the data (if any), and performing the following steps.
1. The host performs the required START condition followed by sending the sequence of bytes.
2. The DLPC900 will hold the SCL line low to indicate it is busy.
3. The host waits for the DLPC900 to release the SCL line.
4. Once the SCL line goes high, the host performs a STOP condition.
5. The host then performs a START condition followed by sending the Read Slave Address (0x35), and
then reads the required number of bytes and concluding with a STOP condition.
An example of the above read command sequence is shown in Table 2, and a waveform diagram of a
host executing this read sequence, is shown in Figure 1 and Figure 2.
Table 2. Read Command Sequence Example(1)
Slave Sub-address Data
Address
34 04
35 03
(1) All values shown are in HEX notation.
Figure 1. I2C Read Command Waveform Diagram
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SDA
SCL
0x35 0x03
START Slave Read Address DataACK ACK STOP
I2C Interface www.ti.com
Figure 2. I2C Read Data Waveform Diagram
1.2.1 Read Command Example with Parameters
Some Read sub-address commands require a parameter(s) to be included in the sequence. For example,
the command in Section 3.6.1 has multiple GPIO to choose from. Therefore, the GPIO selection
parameter must be included in the Read byte sequence in order to retrieve the configuration for the GPIO
chosen. Table 3 shows the two I2C operations, where the first row contains the parameter data 06 which
indicates GPIO 6. The second row is the returned data of 06 03, where 06 was the chosen GPIO 6 and
has a configuration of 03.
Table 3. Read Command with Parameter Sequence Example(1)
Slave Sub-address Data
Address
34 44 06
35 06 03
(1) All values shown are in HEX notation.
1.3 Example I2C Write Command Sequence
To execute a command to set the Input Data Channel Swap value, the host builds a sequence of bytes
containing the slave address, the sub-address, and the data, and performing the following steps.
1. The host performs the required START condition followed by sending the sequence of bytes.
2. The host performs a STOP condition
An example of the above write command sequence is shown in Table 4, and a waveform diagram of a
host executing this write sequence, is shown in Figure 3.
Table 4. Write Command Sequence Example(1)
Slave Sub-address Data
Address
34 84 02
(1) All values shown are in HEX notation.
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Header Bytes
Report ID = 0 Flag Byte Sequence Byte Length LSB
Payload Bytes
USB Command
LSB MSB Data...
R/W Reply Error Reserved Destination
Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 ...N
USB Transaction Sequence
Bit 7 Bit 6 Bit 5 Bit 4:3 Bit 2:0
Length MSB
SDA
SCL
0x34 0x84
START Slave Write Address Sub-addressACK ACK STOP
0x02
Data ACK
www.ti.com USB Interface
Figure 3. I2C Write Command Waveform Diagram
2 USB Interface
The DLPC900 controller also supports the USB 1.1 human interface device (HID) to exchange commands
and data with a host processor. The USB commands are variable length data packets that are sent with
the least significant byte first for each parameter.
2.1 USB Transaction Sequence
The USB 1.1 HID protocol has the structure shown in Figure 4. The host must build a stream of bytes that
consist of the Report ID, Header, and the payload. The following is a description of these three parts.
Report ID: The Report ID is always set to 0 and always the leading byte of all transfers.
Header: The header consists of four bytes.
1) Flag Byte as shown in Figure 4 and described in the Read and Write examples. Section 2.2
2) Sequence Byte. The sequence byte can be a rolling counter. It is used primarily when the host
wants a response from the DLPC900. The DLPC900 will respond with the same sequence byte that
the host sent. The host can then match the sequence byte from the command it sent with the
sequence byte from the DLPC900 response.
3) Length: Two byte length denotes the number of data bytes in the Payload only.
Payload Bytes: The payload bytes consists of the USB command followed by the data that is associated
with the command.
Figure 4. USB HID Protocol
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Header Bytes
Report ID = 0 0x00 0x17 0x4C
Payload Bytes
USB Command
0x12 0x20 0x12 0x83 ««««...
Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 - 64
Multiple USB Transaction Transfers
0x00
Payload Bytes
0x45 0xAE 0xF7 «««««««..0x3B 0x1D 0xC5
Bytes 66 - 83
Report ID = 0
Byte 65
First transfer
Second transfer
USB Interface www.ti.com
During a Write operation, the host transmits the entire transaction sequence to the DLPC900, and the
DLPC900 performs the operation associated with the Write command. During a Read operation, the host
transmits the entire transaction sequence to the DLPC900, and the DLPC900 performs the operation
associated with the Read command. Therefore, both Write and Read transactions are considered "writes"
to the DLPC900 where the host performs an API level "Writefile" to the HID driver. The difference is when
the DLPC900 executes a Read operation, where the DLPC900 places the response into its internal buffer
and waits for the host to perform an API level "Readfile" to the HID driver and only then does the
DLPC900 transmits the response data back to the host.
The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between both the
Write and Read operations; therefore, whenever the host performs a Read operation, it must be followed
by the "Readfile" to the HID driver to get the response otherwise the response data will be overwritten by
the next Write or Read operation.
The HID protocol is limited to 64 byte transfers in both directions. Therefore, commands that are larger
than 64 bytes require multiple transfers. Whenever such a command is used, only the very first transfer
requires the Header and the USB Command. The Report ID is always the leading byte of all transfers.
Figure 5 shows an example of a Write command that contains 76 bytes and requires two transfers. Notice
that the first transfer contains 65 bytes, which is correct. The host hardware level HID driver will extract
the Report ID before transmitting or receiving the data over the USB bus.
Figure 5. USB Multi-Transfer Transaction
2.2 USB Read Transaction Sequence Example
To perform a Read operation on the DLPC900, the host must assemble a sequence of bytes that
corresponds to the command being used. The following Table 5 shows an example on how to read the
curtain color intensity of each color.
Table 5. Read Operation Example(1)
Report ID Sequence
Flag Byte Length(2) USB Command(2)
Byte Byte
00 C0 11 02 00 00 11
(1) All values shown are in HEX notation.
(2) LSB precedes the MSB for each parameter.
1. Report ID byte. Always set to 0.
2. Flag byte. Where:
• Bits 2:0 are set to 0x0 for regular DLPC900 operation.
• Bit 6 is set to 0x1 to indicate the host wants a reply from the device
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• Bit 7 is set to 0x1 to indicate a read transaction
3. Sequence byte: The sequence byte can be a rolling counter. It is used primarily when the host wants a
response from the DLPC900. The DLPC900 will respond with the same sequence byte that the host
sent. The host can then match the sequence byte from the command it sent with the sequence byte
from the DLPC900 response.
4. Length: Two byte length denotes the number of data bytes in the sequence and excludes the number
of bytes in steps 1 through 4. It denotes the total number of bytes sent in steps 5 (command bytes).
5. USB Command: Two byte USB command.
6. Once the host transmits the data over the USB interface, the DLPC900 will respond to the Read
operation by placing the response data in its internal buffer. The host must then perform a HID driver
read operation. Table 6 shows the response data sent back from the DLPC900.
(a) Report ID: Always set to 0.
(b) Flag byte: The same as was sent plus error bit. The host may check the error flag (bit 5) as follows.
(i) 0 = No errors.
(ii) 1 = Command not found or command failed.
(c) Sequence byte: The same as was sent. The host may match the sent sequence byte with the
response sequence byte.
(d) Length: Number of data bytes. The host must assemble the data according to the definition of the
command.
Table 6. Read Response Example(1)
Report ID Sequence
Flag Byte Length(2) Data(2)
Byte Byte
00 C0 11 06 00 FF 01 FF 01 FF 01
(1) All values shown are in HEX notation.
(2) LSB precedes the MSB for each parameter.
2.3 USB Write Transaction Sequence Example
To perform a Write operation on the DLPC900, the host must assemble a sequence of bytes that
corresponds to the command being used. The following Table 7 shows an example on how to set the
curtain color intensity of each color to 511.
Table 7. Write Operation Example(1)
Report ID Flag Sequence Length(2) USB Command(2) Data(2)
Byte Byte Byte
00 00 12 08 00 00 11 FF 01 FF 01 FF 01
(1) All values shown are in HEX notation.
(2) LSB precedes the MSB for each parameter.
1. Report ID byte. Always set to 0.
2. Flag byte. Where :
• Bits 2:0 are set to 0x0 for regular DLPC900 operation.
• Bit 6 is set to 0x0 to indicate the host does not want a reply from the device. This bit is set to 0x1
only if a reply is needed, which is usually not required.
• Bit 7 is set to 0x0 to indicate a write transaction
3. Sequence byte: The sequence byte can be a rolling counter. It is used primarily when the host wants a
response from the DLPC900. Normally during a write operation, the DLPC900 does not respond;
however, the host can continue to increment the sequence byte for the next command operation.
4. Length: Two byte length denotes the number of data bytes in the sequence and excludes the number
of bytes in steps 1 through 4. It denotes the total number of bytes sent in steps 5 (command bytes)
and 6 (data bytes).
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USB Interface www.ti.com
5. USB Command: Two byte USB command.
6. Data: The data appropriate to the command.
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DLPC900 Control Commands
This chapter lists the DLPC900 control commands.
The following sections list the supported control commands of the DLPC900. In the Type column, ‘wr’ type
is writeable field through I2C or USB write transactions. Data can also be read through I2C or USB read
transactions for ‘wr’ type bits. Type ris read-only. Write transactions to read-only fields are ignored.
The Reset column in all of the following command tables is the default value after power up. These values
may be overwritten after power up.
NOTE: Reserved bits and registers. When writing to valid command bit fields, all bits marked as
unused or reserved should be set to 0, unless specified otherwise.
NOTE: Momentary Image Corruption During Command Writes. Certain commands may cause
brief visual artifacts in the display image under some circumstances. Command data values
may always be read without impacting displayed image. To avoid momentary image
corruption due to a command, disable the LEDs prior to the command write, then reenable
the LEDs after all commands have been issued.
NOTE: Writing or reading from undocumented registers is NOT recommended.
1 DLPC900 Status Commands
The DLPC900 has the following set of status commands:
Hardware Status
System Status
Main Status
Retrieve Firmware Version
Read Error Codes
1.1 Hardware Status
The Hardware Status command provides status information on the DLPC900's sequencer, DMD
controller, and initialization.
Command
I2C USB
Read 0x1A0A
0x20
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Table 8. Hardware Status Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Internal Initialization
0 0 = Error d1 r
1 = Successful
0 = No Error
1 d0 r
1 = Incompatible Controller or DMD
DMD Reset Controller Error
0 = No error has occurred
2 d0 r
1 = Multiple overlapping bias or reset operations are accessing the same
DMD block.
Forced Swap Error
3 0 = No error has occurred. d0 r
01 = Forced Swap Error occurred.
0 = No Slave Controller Present
4(1) d0 r
1 = Slave Controller Present and Ready
5 Reserved d0 r
Sequencer Abort Status Flag
6 0 = No error has occurred d0 r
1 = Sequencer has detected an error condition that caused an abort
Sequencer Error
7 0 = No error has occurred. d0 r
1 = Sequencer detected an error.
(1) When the DLPC900 is combined with a DLP6500, this bit will be 0. When two DLPC900 controllers are combined with a
DLP9000, this bit must be 1 for proper operation. If the bit is 0 and the DLPC900 is combined with a DLP9000, indicates a
malfunction in one or both controllers.
NOTE: Any error condition indicates a fault condition and it must be corrected.
1.2 System Status
The System Status command provides DLPC900 status on internal memory tests.
Command
I2C USB
Read 0x1A0B
0x21
Table 9. System Status Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Internal Memory Test
0 0 = Internal Memory Test failed d1 r
01 = Internal Memory Test passed
1:7 Reserved d0 r
1.3 Main Status
The Main Status command provides the status of DMD park and DLPC900 sequencer, frame buffer, and
gamma correction.
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Command
I2C USB
Read 0x1A0C
0x22
Table 10. Main Status Command Definition
BITS BITS DESCRIPTION RESET TYPE
0 0 DMD Park Status d1 r
0 = DMD micromirrors are not parked
1 = DMD micromirrors are parked
1 Sequencer Run Flag d0 r
0 = Sequencer is stopped
1 = Sequencer is running normally
2 Video Frozen Flag d0 r
0 = Video is running (Normal frame change)
1 = Video is frozen (Displaying single frame)
7:3 Reserved d0 r
1.4 Retrieve Firmware Version
This command reads the version information of the DLPC900 firmware.
Command
I2C USB
Read 0x0205
0x11
Table 11. Get Version Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Application software revision:
15:0 Application software patch number
3:0 Will match firmware version. r
23:16 Application software minor revision
31:24 Application software major revision
API software revision:
15:0 API patch number
7:4 d0 r
23:16 API minor revision
31:24 API major revision
Software configuration revision:
15:0 Software configuration patch number
11:8 d0 r
23:16 Software configuration minor revision
31:24 Software configuration major revision
Sequencer configuration revision:
15:0 Sequencer configuration patch number
15:12 d0 r
23:16 Sequencer configuration minor revision
31:24 Sequencer configuration major revision
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1.5 Reading Error Codes and Description
This Commands retrieves the error codes that are generated by the DLPC900.
1.5.1 Read Error Code
This command retrieves the error code number from the DLPC900 of the last executed command.
Command
I2C USB
Read 0x0100
0x32
Table 12. Read Error Code Command Definition
BYTE BITS DESCRIPTION RESET TYPE
0 No error
1 Batch file checksum error
2 Device failure
3 Invalid command number
4 In compatible controller / DMD
5 Command not allowed in current mode
6 Invalid command parameter
7 Item referred by the parameter is not present
8 Out of resource (RAM / Flash)
0 9 Invalid BMP compression type 0 r
10 Pattern bit number out of range
11 Pattern BMP not present in flash
12 Pattern dark time is out of range
13 Signal delay parameter is out of range
14 Pattern exposure time is out of range
15 Pattern number is out of range
16 Invalid pattern definition (errors other than 9-15)
17-254 Not defined
255 Internal Error
1.5.2 Read Error Description
This command retrieves the error descriptive string from the DLPC900 of the last executed command. The
string is composed of character bytes ending with a null termination character.
Command
I2C USB
Read 0x0101
0x33
Table 13. Read Error Description Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Error description for the last executed command.
127:0 All 0 r
0 terminated string of character bytes.
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www.ti.com DLPC900 Firmware Programming Commands
2 DLPC900 Firmware Programming Commands
The Programming commands manage downloading a new firmware image into flash memory. This can be
done over I2C or USB interfaces. The commands in the DLPC900 Programming Commands section are
only valid in program mode except for Enter Program Mode (I2C: 0x30 or USB 0x3001), which exits
normal mode and enters program mode. Once in program mode, the user must issue the proper Exit
Program Mode (I2C: 0x30 or USB 0x0030) command to return to normal mode. While in program mode,
commands outside of this section will not work.
2.1 Read Status
This command indicates if the flash is ready to be programmed and also if a flash operation is in progress.
Command
I2C USB
Read 0x0000
0x23
Table 14. Read Status Command Definition
BYTE BITS DESCRIPTION RESET TYPE
2:0 Reserved
Busy Bit
3 0 = No flash operation in progress
1 = Flash operation in progress
0 d0 r
6:4 Reserved
Programming Mode Bit
7 0 = Does not allow flash programming operations
1 = Allows flash programming operations
2.2 Enter Program Mode
This command tells the controller to enter its programming mode and jump to the boot loader. If the boot
loader receives this command, then the command has no effect.
Command
I2C USB
Write 0x3001
0x30
Table 15. Enter Program Mode Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Program Mode
0
0 0 = Enter Program Mode – Jump to boot loader d0 w
7:1 Reserved
2.2.1 Exit Program Mode
This command tells the controller to exit its programming mode. If the application receives the exit
command, the command has no effect.
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Command
I2C USB
Write 0x0030
0x30
Table 16. Exit Program Mode Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Program Mode
0
0 1 = Exit Program Mode – Reset controller and run application d0 w
7:1 Reserved
2.3 Read Control
This command reads the Flash Manufacturer and Device IDs, as well as the Checksum, after the
Calculate Checksum command is executed.
Command
I2C USB
Read 0x0015
0x15
Table 17. Query Flash IDs Command Definition
BYTE BITS DESCRIPTION RESET TYPE
ID
0 = Returns Checksum
3:0
0 C = Requests Flash Manufacturer ID d0 r
D = Requests Flash Device ID
7:4 Reserved
2.4 Start Address
The Start Address command serves three purposes.
1) Specifies the start address of the flash download write operation. It is the responsibility of the user to
ensure that the start address is on a sector boundary in the current flash device.
2) Specifies the start address where checksum operation begins.
3) Specifies the sector address to be erased. The address should be the start of a sector.
The Flash Data Size command should always follow 1 and 2 above, which defines how many bytes to be
downloaded or how many bytes to include for the checksum operation.
The user must avoid erasing the first 64k bytes of the boot flash as this contains the boot image.
The user must also avoid erasing other sectors that contain firmware that are required for proper
controller operation.
Command
I2C USB
Read 0x0032
0x32
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Table 18. Start Address Command Definition
BYTE BITS DESCRIPTION RESET TYPE
4 byte flash address. Valid Range : 0xF8000000 – 0xFAFFFFFF.
3:0 31:0 x0 w
Byte 0 is LSB, byte 4 is MSB.
2.5 Erase Sector
This is a system write command to erase a sector of flash memory. This command should not be
executed until valid data has been written to the Flash Start Address. Users are responsible for ensuring
that a valid address has been written. The Busy bit will be set in the Boot Loader status byte while the
sector erase is in progress. There is no data associated with this command.
Command
I2C USB
Write 0x0028
0x28
NOTE: TI cautions against erasing the boot sector of the device as this contains key initialization
parameters and the flash programming functionality. Only the sector that contains the start
address will be erased, not all sectors from the start address to the end of the device. Users
must either pre-erase all sectors to be programmed, or erase and program each sector
individually.
2.6 Download Flash Data Size
System write command to specify the size of the following flash download. The data size is sent to tell the
Boot Loader how many bytes to expect to program into the flash device. It is also used for specifying the
checksum range when requesting that operation.
Command
I2C USB
Write 0x0033
0x33
Table 19. Download Data Size Command Definition
BYTE BITS DESCRIPTION RESET TYPE
4 Byte flash size. Valid Range 4 - 0x2FFFFFF.
3:0 32:0 x0 w
Byte 0 is LSB, byte 3 is MSB.
2.7 Download Data
This command contains the flash data to be programmed. The maximum data size which can be sent in
each command is 512 bytes, which corresponds to a data length of 514. The number of bytes downloaded
by consecutive download data commands must match the predefined Flash Data Size for the operation to
be successful.
Command
I2C USB
Write 0x0025
0x25
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Table 20. Download Data Command Definition
BYTE BITS DESCRIPTION RESET TYPE
0 7:0 Length LSB
1 7:0 Length MSB x0 w
513:2 4095:0 Up to 512 Data Bytes
514 7:0 Checksum
2.8 Calculate Checksum
This command calculates the checksum. Executing this command causes the Boot Loader to read the
data in the flash memory and calculate a 4-byte 8-bit checksum. The Busy bit will be set in the Boot
Loader status byte while the checksum computation is in progress. After completion, the 4-byte checksum
can be read back through the Read Control command. The data range to be summed is specified by
writing appropriate data with the Flash Start Address and Flash Data Size commands. There is no data
associated with this command.
Command
I2C USB
Write 0x0026
0x26
2.9 Dual Controller Control
This command stops the given controller from executing any further commands until enabled by the same
command. This command is intended to be used when two DLPC900 controllers are combined with one
DLP9000 DMD, where one controller is the master and the other is the slave.
Command
I2C USB
Write 0x0031
0x31
Table 21. Dual Controller Control Definition
BYTE BITS DESCRIPTION RESET TYPE
1 – Disable Master Controller
0 x0 w
0 – Enable Master Controller
01 – Disable Slave Controller
1 x0 w
0 – Enable Slave Controller
3 Chipset Control Commands
The DLPC900 I2C and USB control commands are accepted in any order, except when special
sequencing is required (for example, setting up the flash). Each control command is validated for sub-
address and parameter errors as it is received. Commands failing validation are ignored. On power up, it
is necessary to wait for DLPC900 to complete its initialization before sending any I2C or USB commands.
3.1 Chipset Configuration Commands
The Chipset and Configuration commands manage software reset, power modes, and image curtain
display.
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3.1.1 Power Mode
The Power Control places the DLPC900 in a standby state and powers down the DMD interface. Standby
mode should only be enabled after all data for the last frame to be displayed has been transferred to the
DLPC900. Standby mode must be disabled prior to sending any new data. After executing this command,
the host may poll the system status using I2C commands: 0x20, x21, and 0x22 or USB commands:
0x1A0A, 0x1A0B, and 0x1A0C to attain status.
Command
I2C USB
Read Write 0x0200
0x07 0x87
Table 22. Power Mode Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Power Mode
0 = Normal operation. The selected external source will be displayed
1:0 d0 wr
1 = Standby mode. Places DLPC900 in standby state and powers down
0the DMD interface
2 = Perform a software reset
7:2 Reserved d0 r
3.1.2 Curtain Color
This register provides image curtain control. When enabled and the input source is set to external video
with no video source connected, a solid color field is displayed on the entire DMD display. The Display
Curtain Control provides an alternate method of masking temporary source corruption from reaching the
display due to on-the-fly reconfiguration. It is also useful for optical test and debug support.
Command
I2C USB
Read Write 0x1100
0x06 0x86
Table 23. Display Curtain Command Definition
BYTE BITS DESCRIPTION RESET TYPE
1:0 9:0 Red color intensity in a scale from 0 to 1023 d0 wr
3:2 9:0 Green color intensity in a scale from 0 to 1023 d0 wr
5:4 9:0 Blue color intensity in a scale from 0 to 1023 d0 wr
3.2 Parallel Interface Configuration
The Parallel Interface Configuration manages the operation of the RGB parallel interface.
3.2.1 Input Data Channel Swap
The Input Data Channel Swap commands configure the specified input data ports and maps the data
subchannels. The DLPC900 interprets Channel A as Green, Channel B as Red, and Channel C as Blue.
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Command
I2C USB
Read Write 0x1A37
0x04 0x84
Table 24. Input Data Channel Swap Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Port Number
0 0 – Port 1 0 w
1 – Port 2
Swap Parallel Interface Data Subchannel:
0 - ABC = ABC, No swapping of data subchannels
1 - ABC = CAB, Data subchannels are right shifted and circularly rotated
0 2 - ABC = BCA, Data subchannels are left shifted and circularly rotated
3:1 3 - ABC = ACB, Data subchannels B and C are swapped d4 wr
4 - ABC = BAC, Data subchannels A and B are swapped
5 - ABC = CBA, Data subchannels A and C are swapped
6 - Reserved
7 - Reserved
7:4 Reserved d0 r
3.3 Input Source Commands
The Input Source Selection determines the input source for the DLPC900 data display.
3.3.1 Port and Clock Configuration
This command selects which port the RGB data is on and which pixel clock, data enable, and syncs to
use. The user must select the correct port and clock configuration according to the PCB layout routing.
Command
I2C USB
Read Write 0x1A03
0x03 0x83
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Table 25. Port and Clock Configuration Command
BYTE BITS DESCRIPTION (1) (2) RESET TYPE
0 - Data Port 1, Single Pixel mode
1 - Data Port 2 , Single Pixel mode
1:0 2 - Data Port 1-2, Dual Pixel mode. Even pixel on port 1, Odd pixel on port 2
3 - Data Port 2-1 Dual Pixel mode. Even pixel on port 2, Odd pixel on port 1
0 - Pixel Clock 1
1 - Pixel Clock 2
3:2
0 2 - Pixel Clock 3 d0 wr
3 - Reserved
0 - Data Enable 1
41 - Data Enable 2
0 - P1 VSync and P1 HSync
51 - P2 VSync and P2 HSync
7:6 Reserved
(1) Single Pixel refers to the parallel data is connected to port 1 or port 2 and the input source pixel clock is less than 175MHz. Both
ports cannot be used simultaneous in single pixel mode.
(2) Dual Pixel refers to the parallel data is connected to port 1 and port 2 and the input source pixel clock is less than 141MHz.
3.3.2 Input Source Configuration
The Input Source Configuration command selects the input source to be displayed by the DLPC900: 30-bit
parallel port, Internal Test Pattern or flash memory. After executing this command, the host may poll the
system status using I2C commands: 0x20, 0x21, and 0x22, or the respective USB commands: 0x1A0A,
0x1A0b, and 0x1A0C.
Command
I2C USB
Read Write 0x1A00
0x00 0x80
Table 26. Input Source Configuration Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Select the input source and interface mode:
0 = Primary parallel interface with 16-bit, 20-bit, 24-bit, or 30-bit RGB or YUV
data formats.
2:0 1 = Internal test pattern generator. d0 wr
2 = Flash. Images are 24-bit single-frame, still images stored in flash that are
uploaded on command.
3 = Solid curtain.
0Parallel Interface bit depth
0 = 30 bits
4:3 1 = 24 bits d1 wr
2 = 20 bits
3 = 16 bits
7:5 Reserved d0 r
3.3.3 Input Pixel Data Format
The Input Pixel Data Format command defines the pixel data format input into the DLPC900.
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Command
I2C USB
Read Write 0x1A02
0x02 0x82
Table 27. Input Pixel Data Format Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Select the pixel data format: Supported Pixel Formats vs Source Type
Parallel Test Pattern Flash Image
3:0 0 - RGB 4:4:4 (30 bit) Yes Yes Yes d0 wr
01 - YCrCb 4:4:4 (30 bit) Yes No No
2 - YCrCb 4:2:2 Yes No Yes
7:6 Reserved d0 r
3.3.4 Internal Test Pattern Select
When the internal test pattern is the selected input, the Internal Test Pattern Select defines the test pattern
displayed on the screen. These test patterns are internally generated; therefore, all image processing is
performed on the test images. The resolution of the Test Pattern will be native to the DLP6500 or the
DLP9000.
Command
I2C USB
Read Write 0x1203
0x0A 0x8A
Table 28. Internal Test Patterns Select Command Definition
BYTE BITS DESCRIPTION RESET TYPE
Internal Test Patterns Select: d8 wr
0 = Solid field
1 = Horizontal ramp
2 = Vertical ramp
3 = Horizontal lines
4 = Diagonal lines
3:0
0 5 = Vertical lines
6 = Grid
7 = Checkerboard
8 = RGB ramp
9 = Color bars
10 = Step bars
7:4 Reserved
3.3.5 Internal Test Patterns Color
When the internal test pattern is the selected input, the Internal Test Patterns Color Control defines the
colors of the test pattern displayed on the screen. These test patterns are internally generated; therefore,
all image processing is performed on the test images. All command registers should be set up as if the
test images are input from an RGB 8:8:8 external source. The foreground color setting affects all test
patterns. The background color setting affects those test patterns that have a foreground and background
component, such as, Horizontal Lines, Diagonal Lines, Vertical Lines, Grid, and Checkerboard.
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