Texas Instruments TPS40090EVM-002 Installation and operating instructions

User’s Guide
1
  
User’s Guide

2
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated

3
DYNAMIC WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 Vdc to100 Vdc.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM.
If there are questions concerning the input range, please contact a TI field representative prior to connecting
the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible
permanent damage to the EVM. Please consult the EVM User’s Guide prior to connecting any load to the EVM
output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 50°C. The EVM
is designed to operate properly with certain components above 50°C as long as the input and output ranges are
maintained. These components include but are not limited to linear regulators, switching transistors, pass
transistors, and current sense resistors. These types of devices can be identified using the EVM schematic
located in the EVM User’s Guide. When placing measurement probes near these devices during operation,
please be aware that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated

SLUU195 − June 2004
4TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
TPS40090 Multi-Phase Buck Converter and TPS2834
Drivers Steps-Down from 12-V to 1.5-V at 100 A
Systems Powe
r
Contents
1 Introduction 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Features 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Schematic 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Component Selection 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Test Setup 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Test Results/Performance Data 15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Layout Considerations 19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 EVM Assembly Drawing and PCB Layout 20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 List of Materials 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1 Introduction
The TPS40090EVM−002 multi-phase dc-to-dc converter utilizes the TPS40090 multi-phase
controller and TPS2834 adaptive driver to step down a 12-V input to 1.5-V at 420 kHz. The
output current can exceed 100 A. The TPS40090 provides fixed-frequency, peak current-mode
control with forced-phase current balancing. Phase currents are sensed by the voltage drop
across the DC resistance (DCR) of inductors. Other features include a single voltage operation,
true differential output voltage sense, user programmable current limit, capacitor-programmable
soft-start and a power good indicator. Device operation is specified in the TPS40090
datasheet[1].
TPS40090EVM-002 can be configured into 2-, 3− or 4-phase operation. For 2-phase operation,
populate R65 and R66 to tie PWM2 and PWM4 up to internal 5-V and leave components in
related phases unpopulated. For 3-phase operation, tie PWM4 to BP5 through R66 only. For
4-phase operation, leave both R65 and R66 unpopulated.
In this user’s guide, all the tests are conducted under 4 phase operation.

SLUU195 − June 2004
5
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
2 Features
Table 1. TPS40090EVM−002 Performance Summary
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Input voltage range 10.5 12.0 14.0
V
Output voltage set point 1.477 1.508 1.540 V
Output current range VIN = 12 V 0 100 120 A
Line regulation(1) IOUT rising from 10 A to 100 A,
10.5 V ≤VIN ≤14 V ±0.1%
Load regulation IOUT rising from 10 A to 100 A ±0.3%
Load transient response voltage
IOUT rising from 10 A to 100 A −160
mVPK
Load transient response voltage
change IOUT falling from 100 A to 10 A 200 mVPK
Load transient response recovery
IOUT rising from 10 A to 100 A < 10
s
Load transient response recovery
time IOUT falling from 100 A to 10 A < 15 µs
Loop bandwidth IOUT = 100 A, IOUT = 10 A 89 kHz
Phase margin IOUT = 100 A 40 °
Input ripple voltage 80 200
mVPK
Output ripple voltage 15 25 mVPK
Output rise time ms
Operating frequency 370 418 454 kHz
Full load efficiency VIN = 12 V, VOUT = 1.5 V,
IOUT = 100 A 84.3%
Current sharing tolerance VIN = 12 V, VOUT = 1.5 V,
IOUT = 100 A ±5% ±10%
3 Schematic
+
12V +
Phase Programming
R65 R66
4−phase open open
3−phase open 1k
2−phase 1k 1k
Figure 1. TPS40090EVM−002 Schematic Part 1 − TPS40090 Controller and Pre-Bias Circuit

SLUU195 − June 2004
6TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
TRANS_EN
Figure 2. TPS40090EVM−002 Schematic Part 2 − Driver Circuit and Load Transient Generator

SLUU195 − June 2004
7
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
+ +
+
1.5V/100A
+ +
+ + +
Figure 3. TPS40090EVM−002 Schematic Part 3 − Power Stage
4 Component Selection
4.1 Frequency of Operation
The clock oscillator frequency for the TPS40090 is programmed with a single resistor from RT
(pin 16) to signal ground. Equation (1) from the datasheet allows selection of the RTresistor in
kΩfor a given switching frequency in kHz.
RT+R12 +KPH ǒ39.2 103 f*1.024
PH *7Ǔ(kW)
where
•KPH is the coefficient that depends on the number of active phases
•fPH is the single phase frequency, in kHz
•for 2-phase and 3-phase configurations KPH=1.333
•for 4-phase KPH=1.0 is a single phase frequency, kHz.
The RTresistor value is returned by the last expression in kΩ. For 420 kHz, RTis calculated as
65.8 kΩ and a resistor with a 64.9-kΩ standard value is used.
(1)

SLUU195 − June 2004
8TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
4.2 Inductance Value
The output inductor value for each phase can be calculated from the volt-second during off time,
shown in equation (2).
L+VOUT
f IRIPPLE ǒ1*VOUT
VIN(max)Ǔ
where
•IRIPPLE is usually chosen to be between 10% and 40% of maximum phase current IPH(max).
With IRIPPLE = 20% of IPH(max), there is a ripple current of 5 A, and the inductance value is found
to be 0.63 µH. Using SPM12550−R62M300 inductors from TDK, each had inductance of 0.6µH
and resistance of 1.75-mΩ.
In multi-phase high current buck converter design, due to the ripple cancellation factor from
interleaving, the inductor value could be smaller than that in a single phase operation. But from
conduction loss point of view, the inductor value tends to be big to reduce the ripple current, thus
losses.
4.3 Input Capacitor Selection
The bulk input capacitor selection is based on the input voltage ripple requirements. Due to the
interleaving of multi phase, the input RMS current is reduced. The input ripple current RMS
value over load current is calculated in equation (3).
DIIN(nom) ǒNPH,D
Ǔ+
ȧ
ȱ
ȲǒD*kǒNPH,D
Ǔ
NPH Ǔ ǒkǒNPH,D
Ǔ)1
NPH *DǓȧ
ȳ
ȴ)ǒNPH
12 D2Ǔ ƪVOUT (1*D)
L f ǒIOUTǓƫ2
ȧ
ȱ
ȲǒkǒNPH,D
Ǔ)1Ǔ2 ǒD*kǒNPH,D
Ǔ
NPH Ǔ3
)kǒNPH,D
Ǔ2 ǒkǒNPH,D
Ǔ)1
NPH *DǓ3
ȧ
ȳ
ȴ
where
•kǒNPH,D
Ǔ+floor ǒNPH DǓ
•floor(x) is the function to return the greatest integer less than NPH ×D
•NPH is the number of active phases
Figure 4 shows the input ripple current RMS value over the load current versus duty cycle with
different number of active phases.
(2)
(3)

SLUU195 − June 2004
9
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
0
0.1
0.2
0.5
0.6
0.4
0.3
0 10 20304050 60708090100
Duty Cycle − %
IRMS_CIN(nom)−Normalized RMS Input − A
NPH = 1
NPH = 2
NPH = 3
NPH = 4
NPH = 6
Figure 4. Input Ripple Current RMS Value Overload Current
The maximum input ripple RMS current can be estimated as shown in (4).
I^IOUT DIIN(nom) ǒ4, DminǓ+3.18 A
It is also important to consider a minimum capacitance value which limits the voltage ripple to a
specified value if all the current is supplied by the onboard capacitor. For a typical ripple voltage
of 150 mV the maximum ESR is calculated in (5) as:
ESR +DV
DI+150 mV
3.18 A +47 mW
Two 68-µF, 20-V Oscon capacitors (20SVP68M) from Sanyo are placed on the input side of the
board. The ESR is 40 mΩfor each capacitor.
4.4 Output Ripple Cancellation and Capacitor Selection
Due to the interleaving of channels, the total output ripple current is smaller than the ripple
current from a single phase. The ripple cancellation factor is expressed in equation (6).
DIOUT ǒNPH,DǓ+ǒNPH
P
i+1Ťi*NPH DŤǓ
ƪNPH*1
P
i+1ǒŤi*NPH DŤ)1Ǔƫ
kǒNPH,DǓ+if ǒNPH v1, DIOUT(D), DIOUT ǒNPH,D
ǓǓ
(4)
(5)
(6)

SLUU195 − June 2004
10 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
where
•D is the duty cycle for a single phase
•NPH is the number of active phases
•K (NPH) is the intermediate function for calculation
In this case, NPH=4 and Dmin=0.107 which yields k=0.573.
The actual output ripple is calculated in equation (7)
IRIPPLE +VOUT
L f KǒNPH,D
Ǔ+1.5 V
0.6mH 420 kHz 0.573 +3.41 A
0
0.2
0.6
0.4
0.8
1.0
0 10 20304050 60708090100
Duty Cycle − %
IRMS_Cout(nom) − Normalized RMS Input − A
NPH = 1
NPH = 2
NPH = 3
NPH = 6
NPH = 4
Figure 5. Output Ripple Current Cancellation
Selection of the output capacitor is based on many application variables, including function, cost,
size, and availability. There are three ways to calculate the output capacitance.
1. The minimum allowable output capacitance is determined by the amount of inductor ripple
current and the allowable output ripple, as given in equation (8).
COUT(min) +IRIPPLE
8 f VRIPPLE +3.41 A
8 420 kHz 10 mV +101 mF
In this design, COUT(min) is 101-µF with VRIPPLE=10 mV. However, this affects only the
capacitive component of the ripple voltage, and the final value of capacitance is generally
influenced by ESR and transient considerations.
2. ESR limitation. (To limit the ripple voltage to 10 mV, the capacitor ESR should be less than
the value calculated in equation (9)).
RCt+ VRIPPLE
IRIPPLE +10 mV
3.41 A +2.93 mW
(7)
(8)
(9)

SLUU195 − June 2004
11
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
3. Transient consideration. An additional consideration in the selection of the output inductor
and capacitance value can be derived from examining the transient voltage overshoot
which can be initiated with a load step from full load to no load. By equating the inductive
energy with the capacitive energy the equation (10) can be derived.
COUT +L I2
V2+
LEQ ǒǒIOHǓ2*ǒIOLǓ2Ǔ
ǒVOUT2Ǔ2*ǒVOUT1Ǔ2+
0.6mH
4 (100 A)2
ǒ(1.75 V)2*(1.5 V)2Ǔ+1846 mF
where
•IOH is full load
•IOL is no load
•VOUT2 is the the allowed transient voltage rise
•VOUT1 is the initial voltage
In this 100-A design the capacitance required for limiting the transient is significantly larger than
the capacitance required to keep the ripple acceptably low. Eight 220-µF POSCAP capacitors
are in parallel with four 22-µF ceramic capacitors. The ESR of each POSCAP is 15mΩ.
4.5 MOSFET Selection
There are different requirements for switching FET(s) and rectifier FET(s) in the high-ratio step
down application. The duty cycle is around 12%. So the rectifier FET(s) is on for most of the
cycle. The conduction loss is dominant. Low-RDS(on) FET(s) are preferred. Also due to the dV/dt
turn on of the rectifier FET(s) and cross conduction, choose a rectifier FET with Qgs > Qgd.
When the switch node is falling, the Qgd can pull the gate of the lower FET below GND, which
upsets the driver. Two Si7880DP from Siliconix are in parallel for the rectifier FET. The RDS(on) of
this FET is 3 mΩand Qgs=18nC, and Qgd=10.5nC.
The switching FET switches at high voltage and high current, the switching loss is dominant.
One single Si7860DP is selected for its low total gate charge.
Both types of FET(s) are offered in the Powerpak SO−8 package.
The PCB is layed out for two FETs in parallel, for both switching FET(s) and rectifier FET(s), to
give the feasibility to modify the board for different applications.
4.6 Current Sensing
TPS40090 supports both resistor current sensing and DCR current sensing approach. DCRs of
the output inductors are used in this design as the current sensing components. The DCR
current sensing circuit is shown in Figure 5. The idea is to parallel a R-C network to the inductor.
If the two time constants are same (L/DCR=R ×C), then VC=VDCR. Extra circuit, shown in (b), is
used to compensate the positive temperature coefficient of copper specific resistance, which is
0.385%/°C. See detail explanation in the datasheet.
(10)

SLUU195 − June 2004
12 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
With the chosen inductor described in Inductance Value, (section 4.2, of this document) the
following values are used.
•R=19.6 kΩ
•C=10 nF
•RNTC=100 kΩ
•R1=124 kΩ
•R2=22.6 kΩ
UDG−03136
R
LDCR
C
R
LDCR
C
R2
R1
VOUT
VC
VIN
VDCR VIN
RTHE
RNTC
Figure 6. DCR Current Sensing Circuit with Copper Temperature Compensation
4.7 Overcurrent Limit Protection
The overcurrent function monitors the voltage level separately on each current sense input and
compares it to the voltage on ILIM pin set by the divider from the controller’s reference.
If the threshold of VILIM/2.7 is exceeded, the PWM cycle on the respected phase is terminated.
Voltage level on the ILIM pin is determined by (11).
VILIM +2.7 IPH(max) RCS;I
PH(max) +IOUT )ǒVIN *VOUTǓ VOUT
2 LOUT fSW VIN
where
•IPH(max) is the maximum allowable value of the phase current
•RCS is the value of the current sense resistor
(11)

SLUU195 − June 2004
13
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
4.8 Compensation Components
The TPS40090 uses peak current mode control. Type II network is used here, which is
implemented to provide one zero and two poles. The first pole is placed at the origin to improve
DC regulation.
The ESR zero of the power stage is:
fESRZ +1
2p RC COUT +354 kHz
The zero is placed near 3.96 kHz to produce a reasonable time constant.
fZ+1
2p R11 C11
The second pole is placed at ESR zero (354 kHz).
fP1 +1
2p R11 ǒǒC11 C12Ǔ
ǒC11)C12ǓǓ
The resulting values selected for this design are:
•R11 = 40.2 kΩ
•C11 = 1000 pF
•C12 = 10 pF
(12)
(13)
(14)

SLUU195 − June 2004
14 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
5 Test Setup
The HPA072 has the following input/output connections: 12-V input J1 (VIN) and J2 (GND),
1.5-V output J9 (VOUT) and J10 (GND). A diagram showing the connection points is shown in
Figure 5. A power supply capable of supplying 18 A should be connected to VIN and GND
through a pair of 10 AWG wires. The 1.5-V load should be connected respectively to J9 and J10
through pairs of 0 AWG wires. Wire lengths should be minimized to reduce losses in the wires.
A 5-inch fan with 200-cfm air flow is recommended to operate this board at full load.
TPS40090EVM−002
Board
J1
J2
J9
J10
Oscilloscope
CH1
J8
Electronic
Load
Fluke 45
12 V/ 20 A
Power
Supply
UDG−04063
VOUT DC
Figure 7. Connections for the Test

SLUU195 − June 2004
15
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
6 Test Results and Performance Data
6.1 Efficiency and Power Loss
Figure 8 shows the efficiency as the load varies from 10 A to over 100 A. The efficiency at full
load is about 84.3%.
Figure 7 shows the total loss versus the load current, which is approximately 28.3W at 100 A.
0
65 20
75
70
80
85
90
40 60 80 100 120
IOUT − Output Current − A
Percent Efficiency − %
OVERALL EFFICIENCY
vs
OUTPUT CURRENT
Figure 8.
VIN = 12 V
fSW = 420 kHz
0
20
30
40
5
15
25
35
10
0 20 40 60 80 100 120
IOUT − Output Current − A
PLOSS − Power Loss − W
TOTAL POWER LOSS
vs
OUTPUT CURRENT
Figure 9.
VIN = 12 V
fSW = 420 kHz

SLUU195 − June 2004
16 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
6.2 Closed-Loop Performance
The TPS40090 uses peak current-mode control. Figure 10 shows the bode plots at 100 A of
load current, where no droop function is implemented. The crossover frequency is at 89 kHz with
phase margin of 40°.
100
0
−40 1 k 10 k 100 k 1 M
80
60
40
20
−20
180
45
135
90
0
−45
−135
−180
−90
GAIN AND PHASE
vs
OSCILLATOR FREQUENCY
PHASE
GAIN
fOSC − Oscillator Frequency − kHz
Gain − dB
Phase − 5
VIN = 12 V
VOUT = 1.5 V
IOUT = 10 A
Figure 10. Bode Plot
6.3 Output Ripple and Noise
Figure 11 shows typical output noise where VIN=12 V, and IOUT=100A. The output ripple is less
than 10 mV.
IOUT = 100 A
t − Time − 500 ns / div
Output Voltage Ripple
(10 mV/div)
Figure 11. Output Noise

SLUU195 − June 2004
17
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
6.4 Transient Response
The on-board load transient circuit enables to check the step load transient response on the
same board. Simply by putting a jumper to connect Pin1 and 2 of J3, a 90-A step load is created
by three 50-mΩresistors placed on the board. The slew rates of the transient are 200 A/µs for
the load step-down and 160 A/µs for the load step-up.
The transient response is shown in Figure 6 as the load is stepped from 10 to 100 A. The output
deviation is approximately 200 mV and the settling time is within 15 µs.
Load Step = 90 A
t − Time − 20 µs / div
Something Voltage
(10 mV/div)
Something Voltage
(10 mV/div)
Figure 12. Transient Response

SLUU195 − June 2004
18 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
6.5 Start up with Pre-Biased Output
In synchronous buck converter, the bottom FET discharges the pre-biased output during
start-up. To avoid this, a comparator U9 and surround components are used to pull the SYNC
pin of the drivers low, which keeps the bottom FET off during startup. So the output can rise
smoothly. After the SS pin comes up, SYNC is pulled up high and enable the bottom FET’s
driving signal. The converter goes back to normal synchronization mode. This function can be
enabled by shorting J11 on the board.
Figure 8 shows the start-up waveform with pre−biased output with J11 short and open
respectively. In Figure 12, there are two glitches of SYNC waveform. The first one is cause by
P5V from TPS40090. When TPS40090 is enabled, P5V comes up first. SYNC is connected to
P5V through a divider. The second one happens when the driver is ready and turns on the
bottom FET when PWM signal is low. So the pre-biased output is pulled low which causes the
SYNC signal high to turn off the bottom FET. Then output voltage goes back and rises up
smoothly.
Figure 13. J11 Short Circuit
VOUT
(2 V/div)
t − Time − 1 ms / div
VSYNC
(2 V/div)
VSS
(5 V/div)
VEN
(2 V/div)
Figure 14. J11 Open Circuit
t − Time − 2.5 ms / div
VOUT
(2 V/div)
VSYNC
(5 V/div)
VSS
(5 V/div)
VEN
(2 V/div)

SLUU195 − June 2004
19
TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
7 Layout Considerations
The PCB layout plays a critical role in the performance in a high frequency switching power
supply design. Following the suggestions listed below will help to improve the performance and
expedite the design.
•To take full advantage of the ripple cancellation factor from interleaving, place the input
capacitors before the junction where the input voltage is distributed to each phase. Place the
output capacitors after the junction where all the inductors are connected;
•Place the external drivers right next to the FETs and use at least 25 mil trace for gate drive
signal to improve noise immunity
•Place some ceramic capacitors in the input of each channel to filter the current spikes
•Place the NTC resistor right next to its related inductor for better thermal coupling
•2 oz. or thicker copper is recommended to reduce the trace impedance
•Place enough vias along pads of the power components to increase thermal conduction
•Keep the current sensing traces as short as possible to avoid excessive noise pick up
•Place the output inductors as symmetric as possible in relation to the output connectors to
obtain similar voltage drop from the trace impedance

SLUU195 − June 2004
20 TPS40090 Multi-Phase Buck Converter and TPS2834 Drivers Steps-Down from 12-V to 1.5-V at 100 A
8 EVM Assembly Drawing and PCB Layout
Figure 15. Top Side Component Assembly
Figure 16. Bottom Assembly