Ublox LEXI-R422 Quick setup guide

UBX-23007449 - R02
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LEXI-R422
Ultra-small LTE-M / NB-IoT / EGPRS module
System integration manual
Abstract
This document describes the features and the integration of the ultra-small LEXI-R422 cellular
modules. These modules are a complete, cost efficient, performance optimized, multi-mode and
multi-band LTE-M / NB-IoT / EGPRS solution in the compact LEXI form factor.

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Document information
Title
LEXI-R422
Subtitle
Ultra-small LTE-M / NB-IoT / EGPRS module
Document type
System integration manual
Document number
UBX-23007449
Revision and date
R02
06-Oct-2023
Disclosure restriction
C1-Public
Product status
Corresponding content status
Functional sample
Draft
For functional testing. Revised and supplementary data will be published later.
In development /
Prototype
Objective specification
Target values. Revised and supplementary data will be published later.
Engineering sample
Advance information
Data based on early testing. Revised and supplementary data will be published later.
Initial production
Early production information
Data from product verification. Revised and supplementary data may be published later.
Mass production /
End of life
Production information
Document contains the final product specification.
This document applies to the following products:
Product name
Type number
Firmware version
Notification reference
Product status
LEXI-R422
LEXI-R422-01B-00
Modem: 01.25
Application: A01.06
UBXDOC-686885345-1805
Engineering sample
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document.
Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the
express written permission of u-blox.
The information contained herein is provided “as is” and u-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents,
visit www.u-blox.com.
Copyright © u-blox AG.

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Contents
Document information................................................................................................................................2
Contents ..........................................................................................................................................................3
1System description...............................................................................................................................6
1.1 Overview........................................................................................................................................................6
1.2 Architecture .................................................................................................................................................8
1.3 Pin-out ...........................................................................................................................................................9
1.4 Operating modes...................................................................................................................................... 12
1.5 Supply interfaces ..................................................................................................................................... 15
1.5.1 Module supply input (VCC) ............................................................................................................ 15
1.5.2 Generic digital interfaces supply output (V_INT)...................................................................... 21
1.6 System function interfaces ................................................................................................................... 22
1.6.1 Module power-on.............................................................................................................................. 22
1.6.2 Module power-off............................................................................................................................. 23
1.6.3 Module reset ..................................................................................................................................... 25
1.7 Antenna interfaces.................................................................................................................................. 26
1.7.1 Cellular antenna RF interface (ANT)............................................................................................ 26
1.7.2 Antenna detection interface (ANT_DET).................................................................................... 27
1.8 SIM interface............................................................................................................................................. 27
1.8.1 SIM interface .................................................................................................................................... 27
1.8.2 SIM detection interface.................................................................................................................. 27
1.9 Data communication interfaces ........................................................................................................... 27
1.9.1 UART interfaces............................................................................................................................... 28
1.9.2 USB interface.................................................................................................................................... 29
1.9.3 I2C interface...................................................................................................................................... 29
1.10General purpose input / output ............................................................................................................. 30
1.11Cellular antenna dynamic tuner interface .......................................................................................... 30
1.12Reserved pins (RSVD) ............................................................................................................................. 31
2Design-in................................................................................................................................................ 32
2.1 Overview..................................................................................................................................................... 32
2.2 Supply interfaces ..................................................................................................................................... 33
2.2.1 Module supply (VCC)....................................................................................................................... 33
2.2.2 Generic digital interfaces supply output (V_INT)...................................................................... 47
2.3 System functions interfaces ................................................................................................................. 48
2.3.1 Module PWR_CTRL input............................................................................................................... 48
2.4 Antenna interfaces.................................................................................................................................. 49
2.4.1 Cellular antenna RF interface (ANT)............................................................................................ 49
2.4.2 Cellular and GNSS RF coexistence............................................................................................... 59
2.4.3 Antenna detection interface (ANT_DET).................................................................................... 61
2.4.4 Cellular antenna dynamic tuner interface .................................................................................. 63
2.5 SIM interface............................................................................................................................................. 65

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2.5.1 Guidelines for SIM circuit design .................................................................................................. 65
2.5.2 Guidelines for SIM layout design .................................................................................................. 69
2.6 Data communication interfaces ........................................................................................................... 70
2.6.1 UART interfaces............................................................................................................................... 70
2.6.2 USB interface.................................................................................................................................... 75
2.6.3 I2C interface...................................................................................................................................... 78
2.7 General purpose input / output ............................................................................................................. 80
2.7.1 Guidelines for GPIO circuit design ................................................................................................ 80
2.7.2 Guidelines for general purpose input/output layout design ................................................... 80
2.8 Reserved pins (RSVD) ............................................................................................................................. 81
2.9 Module placement ................................................................................................................................... 81
2.10Module footprint and paste mask ........................................................................................................ 82
2.11Thermal guidelines .................................................................................................................................. 83
2.12Schematic for LEXI-R422 modules integration................................................................................. 84
2.13Design-in checklist................................................................................................................................... 85
2.13.1 Schematic checklist ........................................................................................................................ 85
2.13.2 Layout checklist............................................................................................................................... 85
2.13.3 Antenna checklist............................................................................................................................ 86
3Handling and soldering ..................................................................................................................... 87
3.1 Packaging, shipping, storage and moisture preconditioning ......................................................... 87
3.2 Handling ..................................................................................................................................................... 87
3.3 Soldering .................................................................................................................................................... 88
3.3.1 Soldering paste ................................................................................................................................ 88
3.3.2 Reflow soldering............................................................................................................................... 88
3.3.3 Optical inspection............................................................................................................................ 89
3.3.4 Cleaning ............................................................................................................................................. 89
3.3.5 Repeated reflow soldering ............................................................................................................. 90
3.3.6 Wave soldering ................................................................................................................................. 90
3.3.7 Hand soldering ................................................................................................................................. 90
3.3.8 Rework................................................................................................................................................ 90
3.3.9 Conformal coating ........................................................................................................................... 90
3.3.10 Casting............................................................................................................................................... 90
3.3.11 Grounding metal covers ................................................................................................................. 91
3.3.12 Use of ultrasonic processes .......................................................................................................... 91
4Approvals............................................................................................................................................... 92
4.1 Product certification approval overview.............................................................................................. 92
4.2 US Federal Communications Commission notice............................................................................. 93
4.2.1 Integration instructions for host product manufacturers...................................................... 93
4.3 Innovation, Science, Economic Development Canada notice ......................................................... 95
4.3.1 Declaration of Conformity.............................................................................................................. 95
4.3.2 Modifications.................................................................................................................................... 96
4.4 European Conformance CE mark ......................................................................................................... 97

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4.5 UK Conformity Assessed (UKCA) ......................................................................................................... 98
5Product testing.................................................................................................................................... 99
5.1 Validation testing and qualification..................................................................................................... 99
5.2 Production testing ................................................................................................................................. 100
5.2.1 u-blox in-line production tests .................................................................................................... 100
5.2.2 Production test parameters for OEM manufacturers ........................................................... 100
Appendix .....................................................................................................................................................102
AMigration from SARA-R42 series modules..............................................................................102
BGlossary ...............................................................................................................................................104
Related documentation .........................................................................................................................107
Revision history........................................................................................................................................107
Contact........................................................................................................................................................108

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1System description
1.1 Overview
The LEXI-R422 modules are a multi-band LTE-M / NB-IoT / EGPRS multi-mode solution in the
ultra-small LEXI LGA form factor (16.0 x 16.0 mm, 133-pin), allowing an easy integration into compact
designs.
LEXI-R422 modules provide software-based multi-band configurability enabling international
multi-regional coverage in LTE-M / NB-IoT and EGPRS radio access technologies.
LEXI-R422 modules offer data communications over an extended operating temperature range
of -40 °C to +85 °C, with low power consumption, and with coverage enhancement for deeper range
into buildings and basements (and underground with NB-IoT).
Measuring just 16x16 mm, LEXI-R422 modules are ideal for size-constrained devices like people and
animal wearables, small asset trackers, portable healthcare systems and other small IoT applications.
With many interface options and an integrated IP stack, LEXI-R422 modules are the optimal choice
for LPWA applications with low to medium data throughput rates, as well as devices that require long
battery lifetimes, such as used in smart metering, smart lighting, telematics, asset tracking, remote
monitoring, alarm panels, and connected healthcare.
Furthermore, the LEXI-R422 modules support a comprehensive set of 3GPP Release 14 features for
LTE Cat M1 and Cat NB2 that are relevant for IoT applications.
Customers can future-proof their solutions by means of Over-The-Air firmware updates, thanks to
the uFOTA client/server solution that utilizes LWM2M, a light and compact protocol ideal for IoT.
Model
Region
RAT
Positioning
u-blox
services
Interfaces
Features
Grade
LTE category
LTE FDD bands
(E)GPRS 4-band
Integrated GNSS receiver
Dedicated GNSS antenna interface
External GNSS control via modem
MQTT Anywhere, MQTT Flex
AssistNow
CellLocate®
UARTs
USB (for FW update and diagnostics)
I2C
SIM
GPIOs
Digital audio (I2S)
Secure boot, updates, and production
Antenna dynamic tuning
Ultra-low consumption in PSM / eDRX
Embedded TCP/UDP stack
Embedded HTTPS, FTPS
Embedded TLS, DTLS
FW update via serial (FOAT)
u-blox FW update Over the Air (uFOTA) (uFOTA)
LwM2M with dynamically loaded objects
Embedded MQTT, MQTT-SN
Embedded CoAP
Last gasp
Jamming detection
Antenna and SIM detection
Standard
Professional
Automotive
LEXI-R422
Multi
Region
M1
NB2
*
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
* = LTE bands 1, 2, 3, 4, 5, 8, 12, 13, 18, 19, 20, 25, 26, 28, 66, 85
Table 1: LEXI-R422 main features summary

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Table 2 summarizes cellular radio access technologies characteristics and features of the modules.
Item
LEXI-R422
Protocol stack
3GPP Release 14
RAT
LTE Cat M1 Half-Duplex
LTE Cat NB2 Half-Duplex
2G GPRS / EGPRS TDMA
LTE FDD bands
Band 1 (2100 MHz)
Band 2 (1900 MHz)
Band 3 (1800 MHz)
Band 4 (1700 MHz)
Band 5 (850 MHz)
Band 8 (900 MHz)
Band 12 (700 MHz)
Band 13 (750 MHz)
Band 18 (850 MHz)
Band 19 (850 MHz)
Band 20 (800 MHz)
Band 25 (1900 MHz)
Band 26 (850 MHz)
Band 28 (700 MHz)
Band 66 (1700 MHz)
Band 85 (700 MHz)
2G bands
GSM 850 MHz
E-GSM 900 MHz
DCS 1800 MHz
PCS 1900 MHz
Power class
LTE category M1 / NB2:
Class 3 (23 dBm)
2G GMSK:
Class 4 (33 dBm) in 850/900 MHz
Class 1 (30 dBm) in 1800/1900 MHz
2G 8-PSK:
Class E2 (27 dBm) in 850/900 MHz
Class E2 (26 dBm) in 1800/1900 MHz
Data rate
LTE category M1:
up to 1119 kbit/s UL
up to 588 kbit/s DL
LTE category NB2:
up to 158.5 kbit/s UL
up to 127 kbit/s DL
GPRS multi-slot class 331:
up to 85.6 kb/s UL
up to 107 kb/s DL
EGPRS multi-slot class 331:
up to 236.8 kb/s UL
up to 296 kb/s DL
Table 2: LEXI-R422 modules cellular characteristics summary
1
GPRS/EGPRS multi-slot cass 33 implies a maximum of 5 slots in Down-Link and 4 slots in Up-Link with 6 slots in total.

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1.2 Architecture
Figure 1 summarizes the internal architecture of LEXI-R422 modules.
V_INT
ANT
VCC (Supply)
USB
I2C
SIM card detection
SIM
UARTs
PWR_CTRL
Antenna tuner
Antenna detection
PAs
RF
transceiver
19.2 MHz
Power
Management
BaseBand
Processor
GPIOs
Filters
Filters
Memory
Switch
Figure 1: LEXI-R422 modules’ simplified block diagram
Below is a detailed description of LEXI-R422 modules sections shown in figure above.
Cellular RF section
The cellular RF section is composed of the following main elements:
•RF switch connecting the antenna port (ANT) to the suitable RF Tx / Rx paths
•Power Amplifiers (PA) amplifying the Tx signal modulated and pre-amplified by the RF transceiver
•RF filters along the Tx and Rx signal paths providing RF filtering
•RF transceiver, performing modulation, up-conversion and pre-amplification of baseband signals
for transmission, and performing down-conversion and demodulation of RF signals for reception
•19.2 MHz crystal oscillator generating the reference clock signal for the RF transceiver and the
baseband system, when the related system is in active mode or connected mode
Baseband and power management section
The baseband and power management section, is composed of the following main elements:
•On-chip modem processor, vector signal processor, with dedicated hardware assistance for signal
processing and system timing
•On-chip modem processor, with interfaces control functions
•On-chip voltage regulators to derive all the internal or external (V_SIM, V_INT) supply voltages
from the module supply input VCC
•Dedicated flash memory IC
•Calibrated low frequency RC oscillator to provide the clock reference in the low power idle mode,
which can be enabled using the +UPSV AT command, and in the PSM / eDRX deep-sleep mode,
which can be enabled using the +CPSMS / +CEDRXS / +UPSMVER AT commands

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1.3 Pin-out
Table 3 lists the pin-out of the LEXI-R422 modules, with pins grouped by function.
Function
Name
No
ID
I/O
Description
Remarks
Power
VCC
40-42
A12-14
I
Module supply
input
VCC supply circuit affects the RF performance and
compliance of the device integrating the module
with applicable required certification schemes.
See section 1.5.1 for functional description /
requirements.
See section 2.2.1 for external circuit design-in.
GND
1,3,50,52,
53,56-61,
64-70,
73-79,
82-88,
91-97,
100-106,
109-115,
116-124,
125-133
B1,D1,A4,A2,
C3,C7-11,C13,
E6-11,E13,
F6-11,F13,
G6-11,G13,
H6-11,H13,
J6-11,J13,
K6-11,K13,
L3,L5-11,L13,
N3,N5-11,N13
N/A
Ground
GND pins are internally connected each other.
External ground connection affects the RF and
thermal performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
V_INT
43
A11
O
Generic digital
interfaces supply
output
V_INT = 1.8 V (typical) generated by internal
regulator when the module is switched on, outside
the low power PSM / eDRX deep-sleep mode.
See section 1.5.2 for functional description.
See section 2.2.2 for external circuit design-in.
Provide test point for diagnostic purposes.
System
PWR_CTRL
27
P15
I
Power-on /
power-off /
reset input
Internal pull-up resistor.
See section 1.6.1, 1.6.2 and 1.6.3 for functional
description.
See section 2.3.1 for external circuit design-in.
Provide test point for diagnostic purposes.
Antenna
ANT
51
A3
I/O
Cellular antenna
50 nominal characteristic impedance.
Antenna circuit affects the RF performance and
application device compliance with required
certification schemes.
See section 1.7.1 for functional description and
requirements.
See section 2.4 for external circuit design-in.
ANT_DET
49
A5
I
Antenna
detection
ADC for antenna presence detection function.
See section 1.7.2 for functional description.
See section 2.4.3 for external circuit design-in.
SIM
VSIM
33
H15
O
SIM supply
output
Supply output for external SIM / UICC.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO
32
J15
I/O
SIM data
Data input/output for external SIM / UICC.
Internal pull-up to VSIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
31
K15
O
SIM clock
Clock output for external SIM / UICC
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
30
L15
O
SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.

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Function
Name
No
ID
I/O
Description
Remarks
UART
RXD
4
E1
O
UART data
output
Primary UART circuit 104 (RxD) in ITU-T V.24,
for AT commands, data, Mux, FOAT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
TXD
5
F1
I
UART data input
Primary UART circuit 103 (TxD) in ITU-T V.24,
for AT commands, data, Mux, FOAT.
Internal active pull-up to V_INT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
CTS
6
G1
O
UART clear to
send output
Primary UART circuit 106 (CTS) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RTS
7
H1
I
UART request to
send input
Primary UART circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DSR
11
M1
O /
I
UART data set
ready output /
AUX UART
request to send
input
Primary UART circuit 107 (DSR) in ITU-T V.24,
configurable as auxiliary UART RTS input.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RI
10
L1
O /
O
UART ring
indicator output /
AUX UART clear
to send output
Primary UART circuit 125 (RI) in ITU-T V.24,
configurable as auxiliary UART CTS output.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DTR
9
K1
I /
I
UART data
terminal ready
input /
AUX UART data
input
Primary UART circuit 108/2 (DTR) in ITU-T V.24,
configurable as auxiliary UART TxD input.
Internal active pull-up to V_INT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DCD
8
J1
O /
O
UART data carrier
detect output /
AUX UART data
output
Primary UART circuit 109 (DCD) in ITU-T V.24,
configurable as auxiliary UART RxD output.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB
USB_5V0
22
R10
I
USB detect input
VBUS sense input pin to enable the USB interface.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
Provide test point for FW update and diagnostic.
USB_3V3
19
R7
I
USB supply input
VBUS supply input pin to supply the USB interface.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
Provide test point for FW update and diagnostic.
USB_D-
20
R8
I/O
USB Data Line D-
USB available only for FW update and diagnostic.
90 nominal differential impedance.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
Provide test point for FW update and diagnostic.
USB_D+
21
R9
I/O
USB Data Line D+
USB available only for FW update and diagnostic.
90 nominal differential impedance.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
Provide test point for FW update and diagnostic.

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Function
Name
No
ID
I/O
Description
Remarks
I2C
SCL
12
N1
O
I2C bus clock line
Fixed open drain, to communicate with I2C devices.
Internal pull-up to V_INT: no need external pull-up.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
SDA
13
P1
I/O
I2C bus data line
Fixed open drain, to communicate with I2C devices.
Internal pull-up to V_INT: no need external pull-up.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
GPIO
GPIO1
14
R2
I/O
GPIO
Pin with alternatively configurable functions.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO2
15
R3
I/O
GPIO
Pin with alternatively configurable functions.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO3
16
R4
I/O
GPIO
Pin with alternatively configurable functions.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO4
17
R5
I/O
GPIO
Pin with alternatively configurable functions.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO5
18
R6
I/O
GPIO
Pin with alternatively configurable functions.
See section 1.10 for functional description.
See section 2.7 for external circuit design-in.
GPIO6
29
M15
I/O
GPIO
Pin with alternatively configurable functions.
See sections 1.8.2 / 1.10 for functional description.
See sections 2.5 / 2.7 for external circuit design-in.
Antenna
tuning
RFCTRL1
45
A9
O
RF GPIO for
antenna tuner
Optional output for antenna dynamic tuning.
See section 1.10 / 1.11 for functional description.
See section 2.4.4 for external circuit design-in.
RFCTRL2
44
A10
O
RF GPIO for
antenna tuner
Optional output for antenna dynamic tuning.
See section 1.10 / 1.11 for functional description.
See section 2.4.4 for external circuit design-in.
Reserved
RSVD
2,23-26,
28,34,35,
36-38,
39,46,47,
48,54,55,
62,63,71,
72,80,81,
89,90,98,
107,108
C1,R11-14,
N15,G15,F15,
E15,D15,C15,
B15,A8,A7,
A6,C5,C6,
E3,E5,F3,
F5,G3,G5,
H3,H5,J3,
K3,K5
N/A
Reserved pin
Leave unconnected.
See sections 1.12 and 2.8.
RSVD
99
J5
N/A
Reserved pin
Provide test point for diagnostic purposes.
See sections 1.12 and 2.8.
Table 3: LEXI-R422 modules pin definition, grouped by function

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1.4 Operating modes
LEXI-R422 modules have several operating modes. The operating modes are defined in Table 4 and
described in detail in Table 5, providing general guidelines for operation.
General status
Operating mode
Definition
Power-down
Not-powered mode
VCC supply not present or below operating range: module is switched off.
Power-off mode
VCC supply within operating range and module is switched off.
Normal Operation
Deep-sleep mode
Only the RTC runs. The processor and other parts of the module are switched off.
Idle mode
Module processor runs at the minimum frequency to save power consumption.
Active mode
Module processor runs at normal operating frequency to enable related functions.
Connected mode
RF Tx/Rx enabled with processor running at related operating frequency.
Table 4: LEXI-R422 modules operating modes definition
Mode
Description
Transition between operating modes
Not-powered
Module is switched off.
Application interfaces are not accessible.
When VCC supply is removed, the modules enter not-powered
mode.
When in not-powered mode, the module can enter power-off
mode applying VCC supply (see 1.6.1).
Power-off
Module is switched off: normal shutdown by
an appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
The modules enter power-off mode from active mode when the
host processor implements a clean switch-off procedure, by
sending the +CPWROFF AT command or by using the
PWR_CTRL pin (see 1.6.2).
When in power-off mode, the modules can be switched on by the
host processor using the PWR_CTRL input pin (see 1.6.1).
When in power-off mode, the modules enter not-powered mode
by removing VCC supply.
Deep-sleep
Module is in RTC-only mode: only the
internal Real Time Clock is active.
The RF section and the application
interfaces are temporarily disabled and
switched off: the module is temporarily not
ready to communicate with an external
device by means of the application
interfaces as configured to reduce the
current consumption to the minimum
possible (see section 1.5.1.4).
The modules automatically switch from the active mode to the
ultra-low power deep-sleep mode whenever possible,
upon expiration of the T3324 active timer set by the network
(entering the Power Saving Mode defined in 3GPP Rel.13,
depending on the configuration set by +CPSMS AT command),
upon expiration of the 6 s AT inactivity timer (depending on the
configuration set by the +UPSV AT command),
in-between eDRX cycles when not listening to paging (depending
on the configuration set by the +UPSMVER AT command),
if no other concurrent activities are executed.
When the module is in the ultra-low power deep-sleep mode,
it automatically switches on to the active mode upon expiration
of the T3412 periodic TAU timer set by the network according to
the Power Saving Mode defined in 3GPP Rel.13,
it automatically switches on in-between eDRX cycles when
listening to paging according to the timing set by the network,
or it can be switched on to the active mode by the host
processor using the PWR_CTRL input pin (see 1.6.1).
For further details, see the application development guide [3]
and the AT commands manual [2].

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Mode
Description
Transition between operating modes
Idle
Module is switched on with application
interfaces temporarily disabled: the module
is temporarily not ready to communicate
with an external device by means of the
application interfaces as configured to
reduce the current consumption (see
section 1.5.1.5).
The modules automatically switch from the active mode to low
power idle mode whenever possible, depending on concurrent
activities executed by the module, upon expiration of the
6 seconds AT inactivity timer (with AT+UPSV=4 setting), or
upon DTR set to OFF (with AT+UPSV=3 setting), if low power
configuration is enabled (see the AT commands manual [2],
+UPSV AT command).
When in low power idle mode, the module switches to the active
mode upon data reception over UART serial interface (with
AT+UPSV=4 setting, and in this case the first character
received in low power idle mode wakes up the system, it is not
recognized as valid communication character, and the
recognition of the subsequent characters occurs only after the
complete system wake-up), or upon DTR set to ON (with
AT+UPSV=3 setting).
Active
Module is switched on with application
interfaces enabled or not suspended: the
module is ready to communicate with an
external device by means of the application
interfaces, with related necessary current
consumption (see section 1.5.1.6).
The modules enter active mode from power-off mode when the
host processor implements a clean switch-on procedure by
using the PWR_CTRL pin (see 1.6.1).
The modules enter active mode from the ultra-low power
deep-sleep mode upon expiration of the T3412 periodic TAU
timer set by the network, to receive the paging in-between eDRX
cycles according to the timing set by the network, or if the host
processor wakes up the module using the PWR_CTRL input pin
(see 1.6.1).
The modules enter power-off mode from active mode when the
host processor implements a switch-off procedure (see 1.6.2).
The modules automatically switch from active to ultra-low
power deep-sleep mode whenever possible, upon expiration of
the T3324 active timer set by the network (depending on
+CPSMS AT command setting), upon expiration of the 6 s AT
inactivity timer (depending on the +UPSV AT command setting),
in-between eDRX cycles when not listening to paging (depending
on the +UPSMVER AT command setting), if no other concurrent
activities are executed.
The module switches from active to connected mode when a RF
Tx/Rx data connection is initiated or when RF Tx/Rx activity is
required due to a connection previously initiated.
The module switches from connected to active mode when a RF
Tx/Rx data connection is terminated or suspended.
Connected
RF Tx/Rx data connection is in progress,
with related necessary current consumption
(see sections 1.5.1.2 and 1.5.1.3).
The module is prepared to accept data
signals from an external device.
When a data connection is initiated, the module enters
connected mode from active mode.
Connected mode is suspended if Tx/Rx data is not in progress.
In such cases the module automatically switches from
connected to active mode and then, depending on the +UPSV,
+CPSMS and +UPSMVER AT commands settings, the module
automatically switches to the low power idle mode and/or to the
ultra-low power deep-sleep mode whenever possible.
Vice-versa, the module wakes up from low power idle mode or
from ultra-low power deep-sleep mode to active mode and then
connected mode if RF Tx/Rx activity is necessary.
When a data connection is terminated, the module returns to
the active mode.
Table 5: LEXI-R422 modules operating modes description

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The initial operating mode of LEXI-R422 modules is the one with VCC supply not present or below the
operating range: the modules are switched off in not-powered mode.
Once a valid VCC supply is applied to the LEXI-R422 modules, they remain switched off in the
power-off mode. Then the proper toggling of the PWR_CTRL input line is necessary to trigger the
switch-on routine of the modules that subsequently enter the active mode.
LEXI-R422 modules are ready to operate when in active mode: the available communication interfaces
are completely functional and the module can accept and respond to AT commands, entering
connected mode upon cellular RF signal reception / transmission.
The external GNSS can be concurrently enabled by the dedicated +UGPS AT command.
LEXI-R422 modules switch from active mode to the low power idle mode whenever possible, if the low
power configuration is enabled by the dedicated +UPSV AT command. The low power idle mode can
last for different time periods according to the specific +UPSV AT command setting, according to the
DRX / eDRX setting, and according to the concurrent activities executed by the module.
LEXI-R422 modules enter the User Equipment (UE) power saving mode (PSM) defined in 3GPP Rel.13
whenever possible, if PSM is enabled by the +CPSMS / +UCPSMS AT commands, and according to the
+UMNOPROF AT command settings. The PSM can last for different time periods according to the
T3412 periodic TAU timer set by the network. Then, the modules enter the ultra-low power deep-sleep
mode whenever possible, if no other concurrent activities are executed by the module.
Modules may automatically enter the ultra-low power deep-sleep mode in-between eDRX cycles,
whenever possible, if the functionality is enabled using the +UPSMVER AT command.
Once the modules enter the ultra-low power deep-sleep mode, the available communication interfaces
are not functional: a wake-up event, consisting in proper toggling of the PWR_CTRL input input line
or the expiration of the timer set by the network, is necessary to trigger the wake-up routine of the
modules that subsequently enter back into the active mode.
LEXI-R422 modules can be gracefully switched off by the dedicated +CPWROFF AT command, or by
proper toggling of the PWR_CTRL input.
Figure 2 describes the transition between the different operating modes.
Remove VCC
Switch ON:
•PWR_CTRL
Not powered
Power off
Switch OFF:
•AT+CPWROFF
•PWR_CTRL
Apply VCC
If PSM mode is enabled (AT+CPSMS=1),
if AT inactivity timer and T3324 are expired, if no
other concurrent activity is executed
•Upon expiration of the Periodic UpdateTimer
•Using PWR_CTRL pin
Incoming/outgoing data, or
other dedicated networkcommunication
No RF Tx/Rx in progress,
communication dropped
ActiveConnected Deep Sleep
If low power idle mode is enabled (AT+UPSV≠0),
if AT inactivity timer is expired,
if there is none concurrent activity
Idle
Data received over UART (if AT+UPSV=4),
DTR assert to ON (if AT+UPSV=3),
Other concurrent activity
Figure 2: LEXI-R422 modules operating modes transitions

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1.5 Supply interfaces
1.5.1 Module supply input (VCC)
The modules must be supplied via the three VCC pins that represent the module power supply input.
Voltage must be stable, because during operation, the current drawn by the LEXI-R422 modules
through the VCC pins can vary by several orders of magnitude, depending on the operating mode and
state (as described in sections 1.5.1.2, 1.5.1.3, 1.5.1.4 and 1.5.1.6).
It is important that the supply source is able to withstand both the maximum pulse current occurring
during a transmit burst at maximum power level and the average current consumption occurring
during Tx / Rx call at maximum RF power level (see the LEXI-R422 data sheet [1]).
LEXI-R422 modules, supporting 2G radio access technology, provide separate supply inputs over the
three VCC pins:
•VCC pins A13 and A14 represent the supply input for the internal RF power amplifier, demanding
most of the total current drawn of the module when RF transmission is enabled during a call
•VCC pin A12 represents the supply input for the internal baseband power management unit,
demanding minor part of the total current drawn of the module when RF transmission is enabled
during a call
Figure 3 provides a simplified block diagram of LEXI-R422 modules internal VCC supply routing.
A14
VCC
A13
VCC
A12
VCC
LEXI-R422
Power
Management
Unit
Memory
Baseband
Processor
Transceiver
Power
Amplifier
Figure 3: Block diagram of LEXI-R422 modules internal VCC supply routing

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1.5.1.1 VCC supply requirements
Table 6 summarizes the requirements for the VCC modules supply. See section 2.2.1 for suggestions
to correctly design a VCC supply circuit compliant with the requirements listed in Table 6.
⚠The supply circuit affects the RF compliance of the device integrating LEXI-R422 modules with
applicable required certification schemes as well as antenna circuit design. RF performance is
optimized by fulfilling the requirements summarized in the Table 6.
Item
Requirement
Remark
VCC nominal voltage
Within VCC normal operating range:
3.2 V / 4.5 V
Operating within 3GPP / ETSI specifications: RF
performance is optimized when VCC PA voltage is
inside the normal operating range limits.
VCC voltage during
normal operation
Within VCC extended operating range:
3.0 V / 4.5 V
Operating with possible slight deviation in RF
performance outside normal operating range.
VCC voltage must be above the extended operating
range minimum limit to switch-on the module and to
avoid possible switch-off of the module.
Operation above VCC extended operating range is not
recommended and may affect device reliability.
VCC average current
Support with adequate margin the highest
averaged VCC current consumption value in
connected mode conditions specified in the
LEXI-R422 data sheet [1]
The maximum average current consumption can be
greater than the specified value according to the
actual antenna mismatching, temperature and
supply voltage.
Section 1.5.1.2 describes current consumption
profiles in connected mode.
VCC peak current
Support with adequate margin the highest peak
VCC current consumption value in Tx connected
mode conditions specified in the LEXI-R422 data
sheet [1]
The maximum peak Tx current consumption can be
greater than the specified value according to the
actual antenna mismatching, temperature and
supply voltage.
Sections 1.5.1.2 and 1.5.1.3 describe current
consumption profiles in connected mode.
VCC voltage drop
during Tx slots
Lower than 400 mV
VCC voltage drop directly affects the RF compliance
with applicable certification schemes.
Figure 6 describes VCC voltage drop during 2G Tx
slots.
VCC voltage ripple
during Tx
Noise in the supply pins must be minimized
High supply voltage ripple values during RF
transmissions in connected mode directly affect the
RF compliance with the applicable certification
schemes.
VCC under/over-
shoot at start/end
of Tx slots
Absent or at least minimized
VCC under/over-shoot directly affects the RF
compliance with applicable certification schemes.
Figure 6 describes VCC voltage under/over-shoot.
Table 6: VCC modules supply requirements

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1.5.1.2 VCC current consumption in LTE connected mode
During an LTE connection, the LEXI-R422 modules transmit and receive in half duplex mode.
The current consumption depends on output RF power, which is always regulated by the network (the
current base station) sending power control commands to the module. These power control
commands are logically divided into a slot of 0.5 ms (time length of one Resource Block), thus the rate
of power change can reach a maximum rate of 2 kHz.
Figure 4 shows an example of LEXI-R422 modules current consumption profile versus time in
connected mode: transmission is enabled for one sub-frame (1 ms) according to LTE Category M1
half-duplex connected mode.
Detailed current consumption values can be found in the LEXI-R422 data sheet [1].
Time
[ms]
Current [mA]
0
300
200
100
500
400
Current consumptionvalue
depends on TX power and
actual antenna load
1Slot
1Resource Block
(0.5 ms) 1LTE Radio Frame
(10 ms)
1Slot
1Resource Block
(0.5 ms) 1LTE Radio Frame
(10 ms)
Figure 4: VCC current consumption profile versus time during LTE Cat M1 half-duplex connection
1.5.1.3 VCC current consumption in 2G connected mode
When a 2G call is established, the VCC consumption is determined by the current consumption profile
typical of the 2G transmitting and receiving bursts.
The current consumption peak during a transmission slot is strictly dependent on the transmitted
power, which is regulated by the network. The transmitted power in the transmit slot is also the more
relevant factor for determining the average current consumption.
If the module is transmitting in 2G single-slot mode in the 850 or 900 MHz bands at the maximum RF
power control level (approximately 2 W or 33 dBm in the Tx slot/burst), then the current consumption
can reach a high peak / pulse (see the LEXI-R422 data sheet [1])for 576.9 µs (width of the transmit
slot/burst) with a periodicity of 4.615 ms (width of 1 frame = 8 slots/burst), that is, with a 1/8 duty
cycle according to GSM TDMA (Time Division Multiple Access).
If the module is transmitting in 2G single-slot mode in the 1800 or 1900 MHz bands, the current
consumption figures are much lower than during transmission in the low bands, due to the 3GPP
transmitter output power specifications.
During a 2G call, current consumption is not significantly high while receiving or in monitor bursts, and
it is low in the bursts unused to transmit / receive.

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Figure 5 shows an example of the module current consumption profile versus time in 2G single-slot.
Time
[ms]
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1frame = 8 slots)
Current [A]
200 mA
60-120 mA
1900 mA
Peak current depends
on TX power and
actual antenna load
GSM frame
4.615 ms
(1frame = 8 slots)
1.5
1.0
0.5
0.0
2.0
60-120 mA 10 -40 mA
Figure 5: VCC current consumption profile versus time during a GSM call (1 TX slot, 1 RX slot)
Figure 6 illustrates the VCC voltage profile versus time during a 2G single-slot call, according to the
related VCC current consumption profile described in Figure 5.
Time
undershoot
overshoot
ripple
drop
Voltage
3.8 V
(typ)
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1frame = 8 slots)
GSM frame
4.615 ms
(1frame = 8 slots)
Figure 6: VCC voltage profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)
When a GPRS connection is established, more than one slot can be used to transmit and/or more than
one slot can be used to receive. The transmitted power depends on network conditions, which set the
peak current consumption. But according to GPRS specifications, the maximum transmitted RF
power is reduced if more than one slot is used to transmit, so the maximum peak of current is not as
high as it can be in the case of a GSM call.
If the module transmits in GPRS multi-slot class 12, in 850 or 900 MHz bands, at maximum RF power
level, the consumption can reach a quite a high peak but lower than the one achievable in 2G
single-slot mode. This happens for 2.308 ms (width of the 4 Tx slots/bursts) in the case of multi-slot
class 12, with a periodicity of 4.615 ms (width of 1 frame = 8 slots/bursts), so with a 1/2 duty cycle,
according to GSM TDMA.
If the module is in GPRS connected mode in the 1800 or 1900 MHz bands, consumption figures are
lower than in the 850 or 900 MHz band because of the 3GPP Tx power specifications.

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Figure 7 illustrates the current consumption profiles in GPRS connected mode, in 850 or 900 MHz
bands, with 4 slots used to transmit and 1 slot used to receive, as for the GPRS multi-slot class 12.
Time
[ms]
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1frame = 8 slots)
Current [A]
60-120mA
GSM frame
4.615 ms
(1frame = 8 slots)
1.5
1.0
0.5
0.0
60-120mA
10 -40mA
200mA
Peak current depends
on TX power and
actual antenna load
1600 mA
Figure 7: VCC current consumption profile versus time during a GPRS multi-slot class 12 connection (4 TX slots, 1 RX slot)
In case of EGPRS (i.e. EDGE) connections, the VCC current consumption profile is similar to that
during GPRS connections: the current consumption profile in GPRS multi-slot class 12 connected
mode illustrated in Figure 7 is representative for the EDGE multi-slot class 12 connected mode.
1.5.1.4 VCC current consumption in ultra-low power deep-sleep mode
The UE power saving mode (PSM) defined in 3GPP Rel.13 is by default disabled, but can be enabled by
AT+CPSMS command (see the AT commands manual [2] and the application development guide [3]).
When PSM is enabled, the module automatically enters the PSM and the ultra-low power deep-sleep
mode whenever possible.
LEXI-R422 modules may automatically enter the ultra-low power deep-sleep mode in-between eDRX
cycles, whenever possible, if the functionality is enabled by the +UPSMVER AT command, see the AT
commands manual [2] and the application development guide [3].
In ultra-low power deep-sleep mode, the current consumption is reduced down to a steady value in the
µA range: only the RTC runs with internal reference clock frequency.
See detailed current consumption values in the LEXI-R422 data sheet [1].
☞Due to RTC running during PSM mode, the Cal-RC turns on the crystal every ~10 s to calibrate the
RC oscillator, as a consequence, a very low spike in current consumption will be observed.
Figure 8 shows VCC current consumption profile in ultra-low power deep-sleep mode, with PSM
enabled (AT+CPSMS ≠0). The module is registered to the network and is in ultra-low power
deep-sleep mode, with no concurrent activities on. It does not periodically wake up for paging block
reception, but wakes up upon the expiration of the periodic update timer set by the network, or due to
proper toggling of the PWR_CTRL input line.
DEEP SLEEP MODE
Time [h]
Current [mA]
0
100
Figure 8: Example of VCC current consumption profile in ultra-low power deep-sleep mode with PSM (AT+CPSMS≠0)

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1.5.1.5 VCC current consumption in low power idle mode
The low power idle mode configuration is by default disabled, but it can be enabled using the +UPSV
AT command (see the AT commands manual [2]).
When low power idle mode is enabled, the module automatically enters the low power mode whenever
possible, but it must periodically monitor the paging channel of the current base station (paging block
reception), in accordance to the 2G / LTE system requirements, even if connected mode is not enabled
by the application. When the module monitors the paging channel, it wakes up to the active mode to
enable the reception of the paging block. In between, the module switches to low power mode. This is
known as discontinuous reception (DRX) or extended discontinuous reception (eDRX).
Figure 9 illustrates an example of the module current consumption profile when low power mode
configuration is enabled. The module is registered to the network. It automatically enters the low
power idle mode, and periodically wakes up to active mode to monitor the paging channel for the
paging block reception in discontinuous reception (DRX) mode.
See detailed current consumption values in the LEXI-R422 data sheet [1].
IDLE MODE ACTIVE MODE IDLE MODE
Active Mode
Enabled
Idle Mode
Enabled
Time [s]
Current [mA]
Time [ms]
Current [mA]
RX
Enabled
0
100
0
100
Paging period
Figure 9: Example of VCC current consumption profile with low power mode enabled (AT+UPSV≠0)