Ublox LISA-U2 Series Quick setup guide

UBX-13001118 - R27
C1-Public www.u-blox.com
LISA-U2 series
3.75G HSPA / HSPA+ cellular modules
System integration manual
Abstract
This document describes the features and the system integration of LISA-U2 series HSPA+ cellular
modules. These modules are complete and cost efficient 3.75G solutions offering up to six-band
HSDPA/HSUPA and quad-band GSM/EGPRS voice and/or data transmission technology in a
compact form factor.

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Document information
Title
LISA-U2 series
Subtitle
3.75G HSPA / HSPA+ cellular modules
Document type
System integration manual
Document number
UBX-13001118
Revision and date
R27
17-May-2021
Disclosure restriction
C1-Public
This document applies to the following products:
Product name
Type number
Modem version
Application version
PCN reference
Product status
LISA-U200
LISA-U200-01S-00
22.40
UBX-TN-12040
Obsolete
LISA-U200-01S-01
22.40
A01.00
UBX-14005764
Obsolete
LISA-U200-01S-02
22.40
A01.02
UBX-17048820
End of life
LISA-U200-01S-03
22.40
A01.03
UBX-18055867
Mass production
LISA-U200-02S-01
22.90
A01.01
UBX-14005768
Obsolete
LISA-U200-02S-02
22.90
A01.03
UBX-17048820
End of life
LISA-U200-03S-00
23.41
A01.01
UBX-15020745
Obsolete
LISA-U200-03S-01
23.41
A01.04
UBX-17048820
Obsolete
LISA-U200-03S-02
23.41
A01.05
UBX-18055867
Mass production
LISA-U200-04B-00
23.41
A01.11
UBX-19026176
Initial production
LISA-U200-52S-01
22.86
A01.01
UBX-14005768
Obsolete
LISA-U200-52S-02
22.86
A01.03
UBX-17048820
Obsolete
LISA-U200-52S-03
22.86
A01.04
UBX-18055867
Mass production
LISA-U200-62S-01
22.90
A01.01
UBX-14005768
Obsolete
LISA-U200-62S-02
22.90
A01.02
UBX-16017712
Obsolete
LISA-U200-62S-03
22.90
A01.03
UBX-17048820
Obsolete
LISA-U200-62S-04
22.90
A01.04
UBX-18055867
Mass Production
LISA-U200 FOTA
LISA-U200-83S-00
23.41
A01.01
UBX-15020745
Obsolete
LISA-U201
LISA-U201-03S-00
23.41
A01.01
UBX-15020745
End of life
LISA-U201-03S-01
23.41
A01.04
UBX-17048820
Mass production
LISA-U201-03A-00
23.41
A01.01
UBX-16010501
End of life
LISA-U201-03A-01
23.41
A01.02
UBX-17010533
End of life
LISA-U201-03A-02
23.41
A01.04
UBX-17046899
Mass production
LISA-U201-04B-00
23.41
A01.11
UBX-19026176
Mass production
LISA-U201 FOTA
LISA-U201-83S-00
23.41
A01.02
UBX-16004570
Obsolete
LISA-U201-83S-01
23.41
A01.04
UBX-17048820
Mass production
LISA-U230
LISA-U230-01S-01
22.40
A01.00
UBX-TN-12040
Obsolete
LISA-U230-01S-02
22.40
A01.02
UBX-17048820
Obsolete
LISA-U230-01S-03
22.40
A01.03
UBX-21004152
End of life

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Product name
Type number
Modem version
Application version
PCN reference
Product status
LISA-U260
LISA-U260-01S-02
22.61
A01.02
UBX-TN-12061
Obsolete
LISA-U260-01S-03
22.61
A01.05
UBX-17048820
End of life
LISA-U260-02S-02
22.90
A01.02
UBX-14042086
End of life
LISA-U260-02S-03
22.90
A01.04
UBX-17048820
End of life
LISA-U270
LISA-U270-01S-02
22.61
A01.02
UBX-14042086
Obsolete
LISA-U270-02S-02
22.90
A01.02
UBX-14042086
End of life
LISA-U270-02S-03
22.90
A01.04
UBX-17048820
End of life
LISA-U270-62S-04
22.93
A01.02
UBX-14042086
Obsolete
LISA-U270-62S-05
22.93
A01.04
UBX-15029938
Obsolete
LISA-U270-62S-06
22.93
A01.05
UBX-16009934
Obsolete
LISA-U270-62S-07
22.93
A01.07
UBX-17048820
End of life
LISA-U270-63S-00
22.93
A01.06
UBX-16010383
Obsolete
LISA-U270-63S-01
22.93
A01.07
UBX-17048820
End of life
LISA-U270-63S-02
22.93
A01.08
UBX-18055867
Mass production
LISA-U270-68S-00
22.93
A01.03
UBX-15019240
Obsolete
LISA-U270-68S-01
22.93
A01.07
UBX-17048820
End of life
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document.
Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the
express written permission of u-blox.
The information contained herein is provided “as is” and u-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents,
visit www.u-blox.com.
Copyright © u-blox AG.

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Contents
Document information................................................................................................................................2
Contents ..........................................................................................................................................................4
1System description...............................................................................................................................7
1.1 Overview........................................................................................................................................................7
1.2 Architecture ................................................................................................................................................. 9
1.2.1 Functional blocks................................................................................................................................9
1.3 Pin-out .........................................................................................................................................................11
1.4 Operating modes.......................................................................................................................................15
1.5 Power management .................................................................................................................................17
1.5.1 Power supply circuit overview ........................................................................................................17
1.5.2 Module supply (VCC)........................................................................................................................18
1.5.3 Current consumption profiles ........................................................................................................28
1.5.4 RTC Supply (V_BCKP) ......................................................................................................................33
1.5.5 Interface supply (V_INT)..................................................................................................................36
1.6 System functions......................................................................................................................................37
1.6.1 Module power-on ..............................................................................................................................37
1.6.2 Module power-off..............................................................................................................................41
1.6.3 Module reset ......................................................................................................................................43
1.7 RF connection ............................................................................................................................................45
1.8 (U)SIM interface ........................................................................................................................................46
1.8.1 (U)SIM application circuits .............................................................................................................47
1.9 Serial communication ..............................................................................................................................53
1.9.1 Serial interfaces configuration ......................................................................................................54
1.9.2 Asynchronous serial interface (UART) .........................................................................................55
1.9.3 USB interface.....................................................................................................................................74
1.9.4 SPI interface ......................................................................................................................................79
1.9.5 MUX protocol (3GPP TS 27.010) ...................................................................................................84
1.10DDC (I2C) interface ...................................................................................................................................86
1.10.1 Overview .............................................................................................................................................86
1.10.2 DDC application circuits ..................................................................................................................86
1.11Audio Interface ..........................................................................................................................................92
1.11.1 I2S interface - PCM mode ...............................................................................................................94
1.11.2 I2S interface - Normal I2S mode....................................................................................................94
1.11.3 I2S interface application circuits...................................................................................................95
1.11.4 Voiceband processing system .......................................................................................................98
1.12General Purpose Input/Output (GPIO) ..................................................................................................99
1.13Reserved pins (RSVD) ........................................................................................................................... 106
1.14Schematic for LISA-U2 module integration ..................................................................................... 107
1.15Approvals................................................................................................................................................. 108
1.15.1 European Conformance CE mark ............................................................................................... 109
1.15.2 US Federal Communications Commission notice .................................................................. 110
1.15.3 Innovation, Science, Economic Development Canada notice............................................... 111
1.15.4 Australian Regulatory Conformity ............................................................................................ 113

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1.15.5 ICASA Certification ....................................................................................................................... 114
1.15.6 KC Certification.............................................................................................................................. 114
1.15.7 ANATEL Certification ................................................................................................................... 115
1.15.8 CCC Certification ........................................................................................................................... 115
1.15.9 GITEKI Certification....................................................................................................................... 116
2Design-In..............................................................................................................................................117
2.1 Design-in checklist................................................................................................................................. 117
2.1.1 Schematic checklist...................................................................................................................... 117
2.1.2 Layout checklist............................................................................................................................. 118
2.1.3 Antenna checklist.......................................................................................................................... 118
2.2 Design Guidelines for Layout............................................................................................................... 119
2.2.1 Layout guidelines per pin function............................................................................................. 119
2.2.2 Footprint and paste mask ........................................................................................................... 128
2.2.3 Placement ....................................................................................................................................... 129
2.3 Thermal guidelines ................................................................................................................................ 130
2.4 Antenna guidelines ................................................................................................................................ 132
2.4.1 Antenna termination..................................................................................................................... 134
2.4.2 Antenna radiation.......................................................................................................................... 135
2.4.3 Examples of antennas .................................................................................................................. 136
2.4.4 Antenna detection functionality ................................................................................................ 138
2.5 ESD guidelines ........................................................................................................................................ 139
2.5.1 ESD immunity test overview ....................................................................................................... 139
2.5.2 ESD immunity test of u-blox LISA-U2 series reference designs ......................................... 140
2.5.3 ESD application circuits ............................................................................................................... 141
3Features description .......................................................................................................................144
3.1 Network indication................................................................................................................................. 144
3.2 Antenna detection ................................................................................................................................. 144
3.3 Jamming Detection............................................................................................................................... 144
3.4 TCP/IP and UDP/IP ................................................................................................................................. 145
3.4.1 Multiple PDP contexts and sockets ........................................................................................... 145
3.5 FTP............................................................................................................................................................ 145
3.6 HTTP......................................................................................................................................................... 146
3.7 SSL/TLS................................................................................................................................................... 146
3.8 Dual stack IPv4/IPv6.............................................................................................................................. 148
3.9 AssistNow clients and GNSS integration ......................................................................................... 148
3.10Hybrid positioning and CellLocate®.................................................................................................... 148
3.10.1 Positioning through cellular information: CellLocate®........................................................... 148
3.10.2 Hybrid positioning.......................................................................................................................... 150
3.11Control Plane Aiding / Location Services (LCS) ............................................................................... 151
3.12Firmware update Over AT (FOAT) ...................................................................................................... 151
3.12.1 Overview .......................................................................................................................................... 151
3.12.2 FOAT procedure ............................................................................................................................. 151
3.13Firmware update Over the Air (FOTA) ............................................................................................... 151
3.14Last gasp ................................................................................................................................................. 152
3.15Smart radio coverage manager........................................................................................................... 152

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3.16In-Band modem (eCall / ERA-GLONASS) .......................................................................................... 152
3.17SIM Access Profile (SAP)...................................................................................................................... 153
3.18Smart Temperature Management..................................................................................................... 154
3.18.1 Smart Temperature Supervisor (STS) ...................................................................................... 154
3.18.2 Threshold definitions .................................................................................................................... 156
3.19Bearer Independent Protocol............................................................................................................... 157
3.20Multi-Level Precedence and Pre-emption Service .......................................................................... 157
3.21Network Friendly Mode ......................................................................................................................... 157
3.22Power saving ........................................................................................................................................... 158
4Handling and soldering ...................................................................................................................159
4.1 Packaging, shipping, storage and moisture preconditioning ....................................................... 159
4.2 Soldering .................................................................................................................................................. 159
4.2.1 Soldering paste .............................................................................................................................. 159
4.2.2 Reflow soldering............................................................................................................................. 159
4.2.3 Optical inspection.......................................................................................................................... 161
4.2.4 Cleaning ........................................................................................................................................... 161
4.2.5 Repeated reflow soldering ........................................................................................................... 161
4.2.6 Wave soldering ............................................................................................................................... 161
4.2.7 Hand soldering ............................................................................................................................... 161
4.2.8 Rework ............................................................................................................................................. 162
4.2.9 Conformal coating ......................................................................................................................... 162
4.2.10 Casting............................................................................................................................................. 162
4.2.11 Grounding metal covers ............................................................................................................... 162
4.2.12 Use of ultrasonic processes ........................................................................................................ 162
5Product testing .................................................................................................................................163
5.1 u-blox in-series production test .......................................................................................................... 163
5.2 Test parameters for OEM manufacturer.......................................................................................... 164
5.2.1 ‘Go/No go’ tests for integrated devices..................................................................................... 164
5.2.2 Functional tests providing RF operation .................................................................................. 164
Appendix .....................................................................................................................................................167
AMigration from LISA-U1 to LISA-U2 series .............................................................................167
A.1 Checklist for migration ......................................................................................................................... 167
A.2 Software migration................................................................................................................................ 168
A.2.1 Software migration from LISA-U1 series to LISA-U2 series modules................................ 168
A.3 Hardware migration............................................................................................................................... 168
A.3.1 Hardware migration from LISA-U1 series to LISA-U2 series modules............................... 168
A.3.2 Pin-out comparison LISA-U1 series vs. LISA-U2 series......................................................... 170
A.3.3 Layout comparison LISA-U1 series vs. LISA-U2 series ......................................................... 178
Related documentation .........................................................................................................................181
Revision history........................................................................................................................................182
Contact........................................................................................................................................................183

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1System description
1.1 Overview
LISA-U2 cellular modules integrate full-feature 3G UMTS/HSxPA and 2G GSM/GPRS/EDGE protocol
stack with Assisted GPS support. These SMT modules come in the compact LISA form factor,
featuring Leadless Chip Carrier (LCC) packaging technology.
3G UMTS/HSDPA/HSUPA Characteristics
2G GSM/GPRS/EDGE Characteristics
Class A User Equipment1
Class B Mobile Station2
UMTS Terrestrial Radio Access (UTRA) Frequency Division
Duplex (FDD)
3GPP Release 7 (HSPA+)
Rx Diversity for LISA-U230
GSM EDGE Radio Access (GERA)
3GPP Release 7
Rx Diversity for LISA-U230
2-band support for LISA-U260:
•Band II (1900 MHz), Band V (850 MHz)
2-band support for LISA-U270:
•Band I (2100 MHz), Band VIII (900 MHz)
5-band support for LISA-U201:
•Band I (2100 MHz), Band II (1900 MHz), Band V (850 MHz),
Band VI (800 MHz), Band VIII (900 MHz)
6-band support for LISA-U200 and LISA-U230:
•Band I (2100 MHz), Band II (1900 MHz), Band IV (1700 MHz),
Band V (850 MHz), Band VI (800 MHz), Band VIII (900 MHz)
4-band support
•GSM 850 MHz, E-GSM 900 MHz,
DCS 1800 MHz, PCS 1900 MHz
WCDMA/HSDPA/HSUPA Power Class
•Power Class 3 (24 dBm) for WCDMA/HSDPA/HSUPA mode
GSM/GPRS Power Class
•Power Class 4 (33 dBm) for GSM/E-GSM bands
•Power Class 1 (30 dBm) for DCS/PCS bands
EDGE Power Class
•Power Class E2 (27 dBm) for GSM/E-GSM bands
•Power Class E2 (26 dBm) for DCS/PCS bands
PS (Packet Switched) Data Rate
•HSUPA category 6, up to 5.76 Mbit/s UL
•HSDPA category 8 up to 7.2 Mbit/s DL for LISA-U200,
LISA-U201, LISA-U260 and LISA-U270
•HSDPA category 14 up to 21.1 Mbit/s DL for LISA-U230
•WCDMA PS data up to 384 kbit/s DL/UL
PS (Packet Switched) Data Rate
•GPRS multislot class 123, coding scheme CS1-CS4,
up to 85.6 kbit/s DL/UL
•EDGE multislot class 123, coding scheme MCS1-MCS9,
up to 236.8 kbit/s DL/UL
CS (Circuit Switched) Data Rate
•WCDMA CS data up to 64 kbit/s DL/UL
CS (Circuit Switched) Data Rate
•GSM CS data up to 9.6 kbit/s DL/UL
supported in transparent/non transparent mode
Table 1: LISA-U2 series UMTS/HSDPA/HSUPA and GSM/GPRS/EDGE characteristics
Operation modes I to III are supported on GSM/GPRS networks, while allowing users to define their
preferred service from GSM to GPRS. Paging messages for GSM calls may be monitored (optional)
during GPRS data transfer in non-coordinating NOM II-III.
1
Device can work simultaneously in Packet Switch and Circuit Switch mode: voice calls are possible while the data connection
is active without any interruption in service.
2
Device can be attached to both GPRS and GSM services (i.e. Packet Switch and Circuit Switch mode) using one service at a
time. If for example during data transmission an incoming call occurs, the data connection is suspended to allow the voice
communication. Once the voice call has terminated, the data service is resumed.
3
GPRS/EDGE multislot class 12 implies maximum of 4 slots in DL (reception), 4 slots in UL (transmission) with 5 slots in total

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3G Transmission and Receiving: LISA-U2 modules implement 3G High-Speed Uplink Packet Access
(HSUPA) category 6. LISA-U200, LISA-U201, LISA-U260 and LISA-U270 modules implement 3G High
Speed Downlink Packet Access (HSDPA) category 8. LISA-U230 modules implement the 3G HSDPA
category 14. The HSUPA and HSDPA categories determine the maximum speed at which data can be
respectively transmitted and received. Higher categories allow faster data transfer rates, as indicated
in Table 1.
The 3G network automatically performs adaptive coding and modulation using a choice of forward
error correction code rate and choice of modulation type, to achieve the highest possible data rate
and data transmission robustness according to the quality of the radio channel.
2G Transmission and Receiving: LISA-U2 series modules implement GPRS/EGPRS multislot class 12.
GPRS and EGPRS multislot classes determine the maximum number of timeslots available for upload
and download and thus the speed at which data can be transmitted and received. Higher classes
typically allow faster data transfer rates, as indicated in Table 1.
The 2G network automatically configures the number of timeslots used for reception or transmission
(voice calls take precedence over GPRS/EGPRS traffic) and channel encoding (from Coding Scheme 1
up to Modulation and Coding Scheme 9), performing link adaptation to achieve the highest possible
data rate. Table 2 summarizes the interfaces and features provided by LISA-U2 modules.
Model
UMTS
Bands
Interfaces
Audio
Functions
Grade
HSUPA [Mbit/s]
HSDPA [Mbit/s]
UMTS/HSPA [MHz]
GSM/GPRS/EDGE 4-band
UART
SPI
USB
DDC (I2C)
GPIO
Analog audio
Digital audio
Network indication
Antenna detection
Jamming detection
Embedded TCP/UDP
Embedded FTP, HTTP
Embedded SSL/TLS
GNSS via modem
AssistNow software
CellLocate®
FOTA
FW update via serial
eCall / ERA-GLONASS
Rx diversity
Standard
Professional
Automotive
LISA-U200
5.76
7.2
800/850/900
1700/1900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•4
•
•5
•
LISA-U200
FOTA
5.76
7.2
800/850/900
1700/1900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•
•
•
•
LISA-U201
5.76
7.2
800/850/900
1900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•6
•
•
•
LISA-U201
FOTA
5.76
7.2
800/850/900
1900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•
•
•
•
LISA-U230
5.76
21.1
800/850/900
1700/1900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•
•
•
LISA-U260
5.76
7.2
850/1900
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•
•5
•
LISA-U270
5.76
7.2
900/2100
•
1
1
1
1
14
2
•
•
•
•
•
•
•
•
•
•
•5
•
LISA-U200-52S module product version is approved by SKT Korean network operator.
LISA-U200-62S module product version is approved by NTT DoCoMo Japanese network operator
LISA-U270-62S, -63S and -68S modules product versions are approved and locked for SoftBank Japanese network operator.
Table 2: LISA-U2 series summary of interfaces and features
4
Not supported by the “01”, “02”, “03”, “52” and “62” product version
5
Not supported by the ”01” product version
6
Not supported by the “03” product version

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1.2 Architecture
Wireless
Base-band
Processor
Memory
Power Management Unit
26 MHz
32.768
kHz
ANT
Switch & Multi band & mode PA
DDC (for GNSS)
(U)SIM card
UART
SPI
USB
GPIO(s)
Power on
External reset
V_BCKP (RTC)
Vcc (supply)
V_INT (I/O)
Digital audio (I2S)
RF
SWITCH
RF
Transceiver
Duplexers
& Filters
ANT_DIV
RF
SWITCH
Filter
Bank
PA
PM
U
Transceiver
PMU
Figure 1: LISA-U2 series block diagram (for available options see Table 2)
1.2.1 Functional blocks
LISA-U2 modules consist of the following internal functional blocks: RF section, Baseband and Power
Management Unit section.
LISA-U2 series RF section
A shielding box contains the RF high-power signal circuitry, including:
•Multimode Single Chain Power Amplifier Module used for 3G HSPA/WCDMA and 2G EDGE/GSM
operations
•Power Management Unit with integrated DC/DC converter for the Power Amplifier Module
The RF antenna pad (ANT) is directly connected to the main antenna switch, which dispatches the RF
signals according to the active mode. For time-duplex 2G operation, the incoming signal at the active
receiver (RX) slot is applied by the main antenna switch to the duplexer SAW filter bank for out-of-
band rejection and then sent to the appropriate receiver port of the RF transceiver. During the
allocated Transmitter (TX) slots, the low level signal coming from the RF transceiver is enhanced by
the power amplifier and then directed to the antenna pad through the main antenna switch. The 3G
transmitter and receiver are active at the same time due to frequency-domain duplex operation. The
switch integrated in the main antenna switch connects the antenna port to the duplexer SAW filter
bank which separates the TX and RX signal paths. The duplexer itself provides front-end RF filtering
for RX band selection while combining the amplified TX signal coming from the power amplifier.
A separated shielding box contains all the other analog RF components, including:
•Antenna switch and duplexer SAW filter bank for main paths
•Antenna switch and SAW filter bank for diversity receiver
•Up to six-band HSPA/WCDMA and quad-band EDGE/GPRS/GSM transceiver

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•Power management unit with integrated DC/DC converter for the power amplifier module
•Voltage-controlled temperature compensated 26 MHz crystal oscillator (VC-TCXO)
While operating in 3G mode, the RF transceiver performs direct up-conversion and down-conversion
of the baseband I/Q signals, with the RF voltage controlled gain amplifier being used to set the uplink
TX power. In the downlink path, the integrated LNA enhances the RX sensitivity while discrete inter-
stage SAW filters additionally improve the rejection of out-of-band blockers. An internal
programmable gain amplifier optimizes the signal levels before delivering to the analog I/Q to
baseband for further digital processing.
For 2G operations, a constant gain direct conversion receiver with integrated LNAs and highly linear
RF quadrature demodulator are used to provide the same I/Q signals to the baseband as well. In
transmission mode, the up-conversion is implemented by means of a digital sigma-delta transmitter
or polar modulator depending on the modulation to be transmitted.
The RF antenna pad for the diversity receiver (ANT_DIV) available on LISA-U230 modules is directly
connected to the antenna switch for the diversity receiver, which dispatches the incoming RF signals
to the dedicated SAW filter bank for out-of-band rejection and then to the diversity receiver port of
the RF transceiver.
In all the modes, a fractional-N sigma-delta RF synthesizer and an on-chip 3.296-4.340 GHz voltage-
controlled oscillator are used to generate the local oscillator signal. The frequency reference to RF
oscillators is provided by the 26 MHz VC-TCXO. The same signal is buffered to the baseband as a host
reference for clock generation circuits while operating in active mode.
LISA-U2 series modulation techniques
Modulation techniques related to radio technologies supported by LISA-U2 modules, are listed as
follows:
•GSM →GMSK
•GPRS →GMSK
•EDGE →GMSK / 8-PSK
•WCDMA →QPSK
•HSDPA →QPSK / 16-QAM
•HSUPA →QPSK / 16-QAM
LISA-U2 series Baseband and Power Management Unit section
Another shielding box of the LISA-U2 modules includes all the digital circuitry and the power supplies,
basically the following functional blocks:
•Cellular baseband processor, a mixed signal ASIC which integrates:
oMicroprocessor for controller functions, 2G & 3G upper layer software
oDSP core for 2G Layer 1 and audio processing
o3G coprocessor and HW accelerator for 3G layer 1 control software and routines
oDedicated HW for interfaces management
•Memory system in a Multi-Chip Package (MCP) integrating two devices:
oNOR flash non-volatile memory
oDDR SRAM volatile memory
•Power Management Unit (PMU), used to derive all the system supply voltages from the module
supply VCC
•32.768 kHz crystal, connected to the Real Time Clock (RTC) oscillator to provide the clock
reference in idle or power-off modes

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1.3 Pin-out
Table 3 details the pin-out of the LISA-U2 modules, with pins grouped by function.
Function
Pin
Module
No
I/O
Description
Remarks
Power
VCC
All
61, 62, 63
I
Module supply
input
Clean and stable supply is required: low ripple
and low voltage drop must be guaranteed.
Voltage provided must be always above the
minimum limit of the operating range.
Consider that there are large current spikes in
connected mode, when a GSM call is enabled.
VCC pins are internally connected, but all the
available pads must be connected to the
external supply in order to minimize power
loss due to series resistance.
See section 1.5.2
GND
All
1, 3, 6, 7,
8, 17, 25,
28, 29, 30,
31, 32, 33,
34, 35, 36,
37, 38, 60,
64, 65, 66,
67, 69, 70,
71, 72, 73,
75, 76
N/A
Ground
GND pins are internally connected but a good
(low impedance) external ground connection
can improve RF performance: all GND pins
must be externally connected to ground.
V_BCKP
All
2
I/O
Real Time Clock
supply
input/output
V_BCKP = 1.8 V (typical) generated by the
module when VCC supply voltage is within
valid operating range.
See section 1.5.4
V_INT
All
4
O
Digital Interfaces
supply output
V_INT = 1.8V (typical) generated by the
module when it is switched-on and the
RESET_N (external reset input pin) is not
forced to the low level.
See section 1.5.5
VSIM
All
50
O
SIM supply output
VSIM = 1.80 V typical or 2.90 V typical
generated by the module according to the SIM
card type.
See section 1.8
RF
ANT
All
68
I/O
RF input/output
for main Tx/Rx
antenna
50 nominal impedance.
See section 1.7, section 2.4 and section
2.2.1.1
ANT_DIV
LISA-U230
74
I
RF input for Rx
diversity antenna
50 Ωnominal impedance
See section 1.7, section 2.4 and section
2.2.1.1
SIM
SIM_IO
All
48
I/O
SIM data
Internal 4.7 kpull-up to VSIM.
Must meet SIM specifications.
See section 1.8
SIM_CLK
All
47
O
SIM clock
Must meet SIM specifications.
See section 1.8
SIM_RST
All
49
O
SIM reset
Must meet SIM specifications.
See section 1.8

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Function
Pin
Module
No
I/O
Description
Remarks
SPI
SPI_MISO
All
57
O
SPI Data Line
Output
Module Output: module runs as SPI local device.
Shift data on rising clock edge (CPHA=1).
Latch data on falling clock edge (CPHA=1).
Idle high.
See section 1.9.4
SPI_MOSI
All
56
I
SPI Data Line
Input
Module Input: module runs as SPI local device.
Shift data on rising clock edge (CPHA=1).
Latch data on falling clock edge (CPHA=1).
Idle high.
Internal active pull-up to V_INT (1.8 V) enabled.
See section 1.9.4
SPI_SCLK
All
55
I
SPI Serial Clock
Input
Module Input: module runs as SPI local device.
Idle low (CPOL=0).
Internal active pull-down to GND enabled.
See section 1.9.4
SPI_SRDY
All
58
O
SPI local device
ready output
Module Output: module runs as SPI local device.
Idle low.
See section 1.9.4
SPI_MRDY
All
59
I
SPI host ready
input
Module Input: module runs as SPI local device.
Idle low.
Internal active pull- down to GND enabled.
See section 1.9.4
DDC
SCL
All
45
O
I2C bus clock line
Fixed open drain. External pull-up required.
See section 1.10
SDA
All
46
I/O
I2C bus data line
Fixed open drain. External pull-up required.
See section 1.10
UART
RxD
All
16
O
UART data output
Circuit 104 (RxD) in ITU-T V.24.
Provide access to the pin for FW update and
debugging if the USB interface is connected
to the application processor.
See section 1.9.2
TxD
All
15
I
UART data input
Circuit 103 (TxD) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for FW update and
debugging if the USB interface is connected
to the application processor.
See section 1.9.2
CTS
All
14
O
UART clear to
send output
Circuit 106 (CTS) in ITU-T V.24.
Provide access to the pin for debugging if the
USB interface is connected to the application
processor.
See section 1.9.2
RTS
All
13
I
UART ready to
send input
Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for debugging if the
USB interface is connected to the application
processor.
See section 1.9.2
DSR
All
9
O
UART data set
ready output
Circuit 107 (DSR) in ITU-T V.24.
See section 1.9.2
RI
All
10
O
UART ring
indicator output
Circuit 125 (RI) in ITU-T V.24.
See section 1.9.2
DTR
All
12
I
UART data
terminal ready
input
Circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
See section 1.9.2
DCD
All
11
O
UART data carrier
detect output
Circuit 109 (DCD) in ITU-T V.24.
See section 1.9.2

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Function
Pin
Module
No
I/O
Description
Remarks
GPIO
GPIO1
All
20
I/O
GPIO
See section 1.12
GPIO2
All
21
I/O
GPIO
See section 1.12
GPIO3
All
23
I/O
GPIO
See section 1.12
GPIO4
All
24
I/O
GPIO
See section 1.12
GPIO5
All
51
I/O
GPIO
See section 1.12
GPIO6
All
39
I/O
GPIO
See section 1.12
GPIO7
All
40
I/O
GPIO
See section 1.12
GPIO8
All
53
I/O
GPIO
See section 1.12
GPIO9
All
54
I/O
GPIO
See section 1.12
GPIO10
All
55
I/O
GPIO
See section 1.12
GPIO11
All
56
I/O
GPIO
See section 1.12
GPIO12
All
57
I/O
GPIO
See section 1.12
GPIO13
All
58
I/O
GPIO
See section 1.12
GPIO14
All
59
I/O
GPIO
See section 1.12
USB
VUSB_DET
All
18
I
USB detect input
Input for VBUS (5 V typical) USB supply sense
to enable USB interface.
Provide access to the pin for FW update and
debugging if the USB interface is not
connected to the application processor.
See section 1.9.3
USB_D-
All
26
I/O
USB Data Line D-
90 Ωnominal differential impedance (Z0)
30 Ω nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external
series resistors as required by USB 2.0
specifications [7] are part of the USB pad
driver and need not be provided externally.
Provide access to the pin for FW update and
debugging if the USB interface is not
connected to the application processor.
See section 1.9.3
USB_D+
All
27
I/O
USB Data Line D+
90 Ωnominal differential impedance (Z0)
30 Ω nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and external
series resistors as required by the USB 2.0
specifications [7] are part of the USB pad
driver and need not be provided externally.
Provide access to the pin for FW update and
debugging if the USB interface is not
connected to the application processor.
See section 1.9.3
System
PWR_ON
All
19
I
Power-on input
PWR_ON pin has high input impedance.
Do not keep floating in noisy environment:
external pull-up required.
See section 1.6.1
RESET_N
All
22
I
External reset
input
Internal 10 kΩpull-up to V_BCKP.
See section 1.6.3

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Function
Pin
Module
No
I/O
Description
Remarks
Digital
Audio
I2S_CLK
All
43
I/O
First I2S clock
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S_RXD
All
44
I
First I2S receive
data
Internal active pull-down to GND enabled.
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S_TXD
All
42
O
First I2S transmit
data
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S_WA
All
41
I/O
First I2S word
alignment
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S1_CLK
All
53
I/O
Second I2S clock
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S1_RXD
All
39
I
Second I2S
receive data
Internal active pull-down to GND enabled.
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S1_TXD
All
40
O
Second I2S
transmit data
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
I2S1_WA
All
54
I/O
Second I2S word
alignment
Check device specifications to ensure
compatibility with module supported modes.
See section 1.11.
CODEC_CLK
All
52
O
Clock output
Digital clock output for external audio codec
See section 1.11.
Reserved
RSVD
All
5
N/A
RESERVED pin
This pin must be connected to ground
See section 1.13
RSVD
LISA-U200
LISA-U201
LISA-U260
LISA-U270
74
N/A
RESERVED pin
Do not connect
See section 1.13
Table 3: LISA-U2 modules pin definition, grouped by function

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1.4 Operating modes
LISA-U2 series modules have several operating modes. The operating modes are defined in Table 4
and described in details in Table 5, providing general guidelines for operation.
General Status
Operating Mode
Definition
Power-down
Not-Powered Mode
VCC supply not present or below operating range: module is switched off.
Power-Off Mode
VCC supply within operating range and module is switched off.
Normal Operation
Idle mode
Module processor core runs with 32 kHz as the reference oscillator.
Active mode
Module processor core runs with 26 MHz as the reference oscillator.
Connected mode
Voice or data call enabled and processor core runs with 26 MHz as the
reference oscillator.
Table 4: Module operating modes definition
Operating mode
Description
Transition between operating modes
Not-powered
Module is switched off.
Application interfaces are not
accessible.
Internal RTC timer operates only if a
valid voltage is applied to V_BCKP
pin.
When VCC supply is removed, the module enters not-powered mode.
When in not-powered mode, the module cannot be switched on by a
low pulse on PWR_ON input, by a rising edge on RESET_N input, or by
a preset RTC alarm.
When in not-powered mode, the module can be switched on by
applying VCC supply (see 1.6.1) so that the module switches from
not-powered to active mode.
Power-off
Module is switched off: normal
shutdown by an appropriate power-
off event (see 1.6.2).
Application interfaces are not
accessible.
Only the internal RTC timer in
operation.
When the module is switched off by an appropriate power-off event
(see 1.6.2), the module enters power-off mode from active mode.
When in power-off mode, the module can be switched on by a low
pulse on PWR_ON input, by a rising edge on RESET_N input, or by a
preset RTC alarm (see 1.6.1): module switches from power-off to
active mode.
When VCC supply is removed, the module switches from power-off
mode to not-powered mode.
Idle
Application interfaces are disabled:
the module does not accept data
signals from an external device
connected to the module.
The module automatically enters idle
mode whenever possible if power
saving is enabled by AT+UPSV (see
u-blox AT commands manual [2]),
reducing current consumption (see
1.5.3.3).
If HW flow control is enabled (default
setting) and AT+UPSV=1 or
AT+UPSV=3 has been set, the UART
CTS line indicates when the UART is
enabled (see 1.9.2.2, 1.9.2.3).
If HW flow control is disabled by
AT&K0, the UART CTS line is fixed to
ON state (see 1.9.2.2).
Power saving configuration is not
enabled by default: it can be enabled
by AT+UPSV (see the u-blox AT
commands manual [2]).
The module automatically switches from active mode to idle mode
whenever possible if power saving is enabled (see 1.5.3.3, 1.9.2.3,
1.9.3.2, 1.9.4.2 and the u-blox AT commands manual [2], AT+UPSV).
The module wakes up from idle mode to active mode for these events:
Automatic periodic monitoring of the paging channel for the paging
block reception according to network conditions (see 1.5.3.3, 1.9.2.3)
Automatic periodic enable of the UART interface to receive and send
data, if AT+UPSV=1 has been set (see 1.9.2.3)
RTC alarm occurs (see the u-blox AT commands manual [2],
AT+CALA)
Data received on UART interface, if HW flow control has been
disabled by AT&K0 and AT+UPSV=1 has been set (see 1.9.2.3)
RTS input set ON by the DTE if HW flow control has been disabled by
AT&K0 and AT+UPSV=2 has been set (see 1.9.2.3)
DTR input set ON by DTE if AT+UPSV=3 has been set (see 1.9.2.3)
USB detection, applying 5 V (typical) to VUSB_DET input (see 1.9.3)
The connected USB host forces a remote wakeup of the module as a
USB device (see 1.9.3)
The connected SPI host indicates by the SPI_MRDY input signal that
it is ready for transmission or reception (see 1.9.4)
The connected u-blox GNSS receiver indicates by the GPIO3 pin that
it is ready to send data (see 1.10, 1.12)

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Operating mode
Description
Transition between operating modes
Active
The module is ready to accept data
signals from an external device
unless power saving configuration is
enabled by AT+UPSV (see sections
1.9.2.3, 1.9.3.2, 1.9.4.2 and the u-
blox AT commands manual [2]).
When the module is switched on by an appropriate power-on event
(see 1.6.1), the module enters active mode from not-powered or
power-off mode.
If power saving configuration is enabled by the AT+UPSV command,
the module automatically switches from active to idle mode whenever
possible and the module wakes up from idle to active mode in the
events listed above (see the idle to active transition description).
When a voice call or a data call is initiated, the module switches from
active mode to connected mode.
Connected
A voice call or a data call is in
progress.
When a voice or a data call is
enabled, the application interfaces
are kept enabled and the module is
prepared to accept data from an
external device unless power saving
configuration is enabled by
AT+UPSV (see 1.9.2.3, 1.9.3.2,
1.9.4.2 and the u-blox AT commands
manual [2]).
When a voice call or a data call is initiated, the module enters
connected mode from active mode.
If power saving configuration is enabled by the AT+UPSV command,
the module automatically switches from connected to idle mode
whenever possible in case of PSD data call with internal context
activation, and then it wakes up from idle to connected mode in the
events listed above (see the idle to active transition description).
When a voice call or a data call is terminated, the module returns to
active mode.
Table 5: Module operating modes description
Figure 2 describes the transition between the different operating modes.
Switch ON:
•Apply VCC
If power saving is
enabled and there is no
activity for a defined
time interval
Any wake up event
described in the module
operating modes summary
table above
Incoming/outgoing call or
other dedicated device
network communication
Call terminated,
communication
dropped
Remove VCC
Switch ON:
•PWR_ON
•RESET_N
•RTC Alarm
Not
powered
Power off
ActiveConnected Idle
Switch OFF:
•AT+CPWROFF
•PWR_ON
Figure 2: Operating modes transition

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1.5 Power management
1.5.1 Power supply circuit overview
LISA-U2 series modules feature a power management concept optimized for the most efficient use
of the supplied power. This is achieved by hardware design that uses a power efficient circuit topology
(Figure 3), and by power management software that controls the module’s power saving mode.
Baseband
Processor
2G/3G
Power Amplifier(s)
Switching
Step-Down
5 x 10 µF
61
VCC
62
VCC
63
VCC
50
VSIM
2
V_BCKP
4
V_INT
Linear
LDO
Linear
LDO
Switching
Step-Down
Linear
LDO
Linear
LDO
Linear
LDO
I/O
EBU
CORE
Analog
SIM
RTC
NOR
Flash
DDR
SRAM
RF Transceiver
Memory
Power Management Unit
22 µF220 nF 220 nF
2G/3G PA
PMU
Transceiver
PMU
Figure 3: LISA-U2 series power management simplified block diagram

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The pins with supply functions are listed in Table 6, Table 12 and Table 15.
LISA-U2 series modules must be supplied via the VCC pins. There is only one main power supply input,
available on the three VCC pins that must be all connected to the external power supply.
The VCC pins are directly connected to the RF power amplifiers and to the integrated Power
Management Unit (PMU) within the module: all supply voltages needed by the module are generated
from the VCC supply by integrated voltage regulators.
V_BCKP is the Real Time Clock (RTC) supply. When the VCC voltage is within the valid operating
range, the internal PMU supplies the Real Time Clock and the same supply voltage will be available to
the V_BCKP pin. If the VCC voltage is under the minimum operating limit (for example, during not
powered mode), the Real Time Clock can be externally supplied via the V_BCKP pin (see section 1.5.4).
When a 1.8 V or a 3 V SIM card type is connected, LISA-U2 series modules automatically supply the
SIM card via the VSIM pin. Activation and deactivation of the SIM interface with automatic voltage
switch from 1.8 to 3 V is implemented, in accordance with the ISO-IEC 7816-3 specifications.
The same voltage domain used internally to supply the digital interfaces is also available on the V_INT
pin, to allow more economical and efficient integration of the LISA-U2 series modules in the final
application.
The integrated Power Management Unit also provides the control state machine for system start-up
and system reset control.
1.5.2 Module supply (VCC)
The LISA-U2 series modules must be supplied through the VCC pins by a DC power supply. Voltages
must be stable: during operation, the current drawn from VCC can vary by some orders of magnitude,
especially due to surging consumption profile of the GSM system (described in the section 1.5.3). It is
important that the system power supply circuit is able to support peak power (see the LISA-U2 series
data sheet [1] for the detailed specifications).
Name
Description
Remarks
VCC
Module power supply input
VCC pins are internally connected, but all the available
pads must be connected to the external supply in order
to minimize the power loss due to series resistance.
Clean and stable supply is required: low ripple and low
voltage drop must be guaranteed.
Voltage provided must always be above the minimum
limit of the operating range.
Consider that during a GSM call there are large current
spikes in connected mode.
GND
Ground
GND pins are internally connected but a good (low
impedance) external ground can improve RF
performance: all available pads must be connected to
ground.
Table 6: Module supply pins
☞VCC pins ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-A114F). Higher
protection levels can be required if the line is externally accessible on the application board. Higher
protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG
varistor array) on the line connected to this pin, close to accessible points.
The voltage provided to the VCC pins must be within the normal operating range limits as specified in
the LISA-U2 series data sheet [1]. Complete functionality of the module is only guaranteed within the
specified minimum and maximum VCC voltage normal operating range.

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☞The module cannot be switched on if the VCC voltage value is below the specified normal operating
range minimum limit. Ensure that the input voltage at VCC pins is above the minimum limit of the
normal operating range for more than 3 seconds after the start of the module switch-on sequence.
When LISA-U2 series modules are in operation, the voltage provided to VCC pins can exceed the
normal operating range limits but must be within the extended operating range limits specified in the
LISA-U2 series data sheet [1]. Occasional deviations from the ETSI specifications may occur when
the input voltage at the VCC pins is outside the normal operating range and is within the extended
operating range.
☞LISA-U2 series modules switch off when the VCC voltage value drops below the specified extended
operating range minimum limit: ensure that the input voltage at the VCC pins never drops below
the minimum limit of the extended operating range when the module is switched on, not even
during a GSM transmit burst, where the current consumption can rise up to maximum peaks of
2.5 A in case of a mismatched antenna load.
⚠Operation above the normal operating range maximum limit is not recommended and extended
exposure beyond it may affect device reliability.
⚠Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module:
if necessary, voltage spikes beyond the VCC absolute maximum ratings must be restricted to
values within the specified limits by using appropriate protection.
☞When designing the power supply for the application, pay specific attention to power losses and
transients. The DC power supply must be able to provide a voltage profile to the VCC pins with the
following characteristics:
oVoltage drop during transmit slots must be lower than 400 mV
oNo undershoot or overshoot at the start and at the end of transmit slots
oVoltage ripple during transmit slots must be minimized:
less than 70 mVpp if fripple ≤200 kHz
less than 10 mVpp if 200 kHz < fripple ≤400 kHz
less than 2 mVpp if fripple > 400 kHz
Time
undershoot
overshoot
ripple
ripple
drop
Voltage
3.8 V
(typ)
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1frame = 8 slots)
GSM frame
4.615 ms
(1frame = 8 slots)
Figure 4: Description of the VCC voltage profile versus time during a GSM call
☞Any degradation in power supply performance (due to losses, noise or transients) will directly
affect the RF performance of the module since the single external DC power source indirectly
supplies all the digital and analog interfaces, and also directly supplies the RF power amplifier (PA).

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☞The voltage at the VCC pins must ramp from 2.5 V to 3.2 V within 1 ms. This VCC slope allows a
proper switch-on of the module when the voltage rises to the VCC normal operating range from a
voltage of less than 2.25 V. If the external supply circuit cannot raise the VCC voltage from 2.5 V
to 3.2 V within 1 ms, the RESET_N pin should be kept low during VCC rising edge, so that the
module will switch on releasing the RESET_N pin when the VCC voltage stabilizes at its nominal
value within the normal operating range.
1.5.2.1 VCC application circuits
LISA-U2 series modules must be supplied through the VCC pins by a clean DC power supply, which
can be selected according to the application requirements (see Figure 5) between the different
possible supply sources types, the most common ones of which are the following:
•Switching regulator
•Low Drop-Out (LDO) linear regulator
•Rechargeable Lithium-ion (Li-Ion) or Lithium-ion polymer (Li-Pol) battery
•Primary (disposable) battery
Main Supply
Available?
Battery
Li-Ion 3.7 V
Linear LDO
Regulator
Main Supply
Voltage > 5V?
Switching Step-Down
Regulator
No, portable device
No, less than 5 V
Yes, greater than 5 V
Yes, always available
Figure 5: VCC supply concept selection
The switching step-down regulator is the typical choice when the available primary supply source has
a nominal voltage much higher (e.g. greater than 5 V) than the LISA-U2 series module’s operating
supply voltage. The use of switching step-down provides the best power efficiency for the overall
application and minimizes the current drawn from the main supply source.
The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low
voltage (e.g. less than 5 V). In this case, the typical 90% efficiency of the switching regulator will
diminish the benefit of voltage step-down and no true advantage will be gained in input current
savings. On the opposite side, linear regulators are not recommended for high voltage step-down as
they will dissipate a considerable amount of energy in thermal power.
If LISA-U2 series modules are deployed in a mobile unit where no permanent primary supply source is
available, then a battery will be required to provide VCC. A standard 3-cell Li-Ion or Li-Pol battery pack
directly connected to VCC is the usual choice for battery-powered devices. During charging, batteries
with Ni-MH chemistry typically reach a maximum voltage that is above the maximum rating for VCC,
and should therefore be avoided.
The use of a primary (not rechargeable) battery is uncommon, since most of the cells available are
seldom capable of delivering the burst peak current for a GSM call due to high internal resistance.
Keep in mind that the use of batteries requires the implementation of a suitable charger circuit (not
included in LISA-U2 series modules). The charger circuit should be designed in order to prevent over-
voltage on VCC beyond the upper limit of the absolute maximum rating.