Xycom AHIP6+ User manual

i
AHIP6+
Advanced High
Integration Platform
with Pentium II® Processor
P/N 133172-001B
Ó
ÓÓ
Ó1998 XYCOM, INC. Printed in the United States of America

ii
Revision Description Date
A Manual Released 11/98
B BIOS Updated 4/00
Trademark Information
Brand or product names are registered trademarks of their respective owners.
Windows is a registered trademark of Microsoft Corp. in the United States and other countries.
Copyright Information
This document is copyrighted by Xycom Incorporated (Xycom) and shall not be reproduced or copied without ex-
pressed written authorization from Xycom.
The information contained within this document is subject to change without notice. Xycom does not guarantee the
accuracy of the information and makes no commitment toward keeping it up to date.
Xycom
750 North Maple Road
Saline, MI 48176–1292
734 - 429-4971 (phone)
734 - 429-1010 (fax)

iii
Table of Contents
Chapter 1 Introduction.............................................................................................................................1-1
Product Overview ...................................................................................................................................1-1
Module Features.....................................................................................................................................1-1
Architecture.............................................................................................................................................1-2
PCI Local Bus Interface..........................................................................................................................1-3
XGA Graphics Controller...................................................................................................................1-3
Fast IDE controller.............................................................................................................................1-3
Expansion Options .................................................................................................................................1-4
On-board Memory...................................................................................................................................1-4
DRAM ................................................................................................................................................1-4
Flash BIOS ........................................................................................................................................1-4
Non-volatile SRAM ............................................................................................................................1-4
DiskOnChip 2000 ..............................................................................................................................1-5
Serial and Parallel Ports .........................................................................................................................1-5
Keyboard Interface .................................................................................................................................1-5
Hard and Floppy Drives..........................................................................................................................1-5
Environmental Specifications .................................................................................................................1-6
Hardware Specifications.........................................................................................................................1-7
Chapter 2 – Installation............................................................................................................................2-1
Configuration Options.............................................................................................................................2-2
Jumpers ..................................................................................................................................................2-2
System Interrupts....................................................................................................................................2-3
DMA Mapping .........................................................................................................................................2-4
Memory Map...........................................................................................................................................2-4
I/O Map ...................................................................................................................................................2-5
Registers.................................................................................................................................................2-7
Register 231h – CPU LED Port ..............................................................................................................2-7
Register 233h – Flash BIOS Control ......................................................................................................2-7
Register 234h - I/O Port Location ...........................................................................................................2-8
I/O Range Select ...............................................................................................................................2-8
Offset Registers......................................................................................................................................2-9
Offset 0 Page Register for Programming (Port Address)..................................................................2-9
Offset 1 Page Register for Programming (Port Address +1)...........................................................2-10
Connectors ...........................................................................................................................................2-10
Parallel Port Connector (PARCOM2) ...................................................................................................2-10
Serial Port Connectors .........................................................................................................................2-10
COM1 Connector (COM1)...............................................................................................................2-10
COM2 Connector (PARCOM2) .......................................................................................................2-10
PS/2 Keyboard/Mouse Connector (KBMS1) ...................................................................................2-11
Internal Keyboard Connector (KYBD1) ...........................................................................................2-11
VGA (Video) Connector (VGA1)...........................................................................................................2-11
Floppy Drive Connector (FDD1 and FDD2) .........................................................................................2-11
Internal Mouse Connector (MS2) .........................................................................................................2-11
Internal LED Connector (LEDMSC1)....................................................................................................2-11
LED In_Keypad Connector...................................................................................................................2-11
FPGA Program Connector (J15) ..........................................................................................................2-12
ISA/IDE Backplane Connector (ATIDE1) .............................................................................................2-12
IDE Connector (HDD1) .........................................................................................................................2-12
PCI Backplane Connector (PCIMG1) ...................................................................................................2-12

iv
Power Connector (PWR1) ....................................................................................................................2-12
Touch Control Connector (TCTRL1) ....................................................................................................2-12
Touch Connector (TCH1) .....................................................................................................................2-12
Flat Panel Connector (FPNL1 and FPNL2)..........................................................................................2-12
Backlight Inverter Connector (DCINV1) ...............................................................................................2-13
Chapter 3 –BIOS Setup Menus ..............................................................................................................3-1
Moving through the Menus .....................................................................................................................3-1
BIOS Main Setup Menu..........................................................................................................................3-2
IDE Submenu .........................................................................................................................................3-3
Cache Submenu.....................................................................................................................................3-4
Advanced Menu......................................................................................................................................3-5
I/O Device Configuration Submenu ........................................................................................................3-7
Advanced Chipset Control Submenu .....................................................................................................3-8
On-board Socket Site Submenu.............................................................................................................3-9
Flat Panel Submenu .............................................................................................................................3-13
Security Menu.......................................................................................................................................3-14
Power Menu..........................................................................................................................................3-15
Device Monitoring Submenu ................................................................................................................3-16
Boot ......................................................................................................................................................3-17
Exit Menu..............................................................................................................................................3-18
BIOS Compatibility................................................................................................................................3-18
Appendix A - DRAM Installation ............................................................................................................ A-1
Appendix B –Video Modes ....................................................................................................................B-1
Introduction ............................................................................................................................................ B-1
Video Modes.......................................................................................................................................... B-1
Standard Modes .................................................................................................................................... B-1
Extended Modes.................................................................................................................................... B-2
Windows 3.1 .......................................................................................................................................... B-3
Windows ‘95 .......................................................................................................................................... B-4
Appendix C –Pinouts ............................................................................................................................. C-1
VGA Connector (VGA1) ........................................................................................................................ C-1
COM1 Connector RS-232/RS-485 (COM1_4) ...................................................................................... C-2
LPT1/COM2 RS-232 Connector (PARCOM2) ...................................................................................... C-2
FPGA Program Connector (J15) ........................................................................................................... C-4
DCIN1 Power Connector (PWR1) ......................................................................................................... C-4
Touch Control Connector (TCTRL1) ..................................................................................................... C-5
Touch Connector (TCH1) ...................................................................................................................... C-6
Internal Mouse Connector (MS2) .......................................................................................................... C-6
Internal LED Connector (LEDMSC1)..................................................................................................... C-7
LED In_Keypad Connector (LEDKB1) .................................................................................................. C-7
Flat Panel Connector (FPNL1 and FPNL2)........................................................................................... C-8
Backlight Inverter Connector (DCINV1) ................................................................................................ C-8
Internal Keyboard Connector (KYBD1) ................................................................................................. C-9
PS/2 Keyboard/Mouse Connector (KBMS1) ......................................................................................... C-9
Internal Floppy Connector (FDD1) ........................................................................................................ C-9
External Floppy Connector (FDD2) ..................................................................................................... C-10
IDE Connector (HDD1) ........................................................................................................................ C-11
ISA/IDE Backplane Connector (ATIDE1) ............................................................................................C-12
PCI Backplane Connector (PCIMG1) .................................................................................................. C-14
Keypad connector (KEYPAD1)............................................................................................................ C-16
USB Connector.................................................................................................................................... C-16

Chapter 1 Introduction
Product Overview
The Xycom Advanced High-Integration Platform (AHIP6+) board is designed ex-
pressly for use in Xycom’s line of flat panel industrial personal computers. The
AHIP6+ is optimized in design, layout, and features for use with flat panel computer
systems. This integrated design approach allows Xycom industrial PC/ATs to incor-
porate “Big PC” features in an extremely compact package. These “Big PC” features
include “industry first” PCI/ISA expansion, Pentium CPU, full-size hard disk, status
LEDs, infrared port, and integrated touchscreen.
Module Features
·Supports
·100 MHz front side bus (350 MHz and above)
·Intel Celeron® processor
·Pentium® II or Pentium III® processors
·32 MB - 256 MB DRAM DIMMs
·PCI local bus XGA graphics with 2 MB integrated SDRAM
·Up to 1024x768\256 colors non-interlaced
·640x480x256K, 800x600x64K, 1024x768x256 color TFT panels
·PCI fast IDE controller
·Two 16550-compatible serial ports
·COM 1 is RS-232, or RS-485
·COM 2 is RS-232 port, or Infrared (IR or IrDA), or Touchscreen
·Centronics-compatible parallel port
·PCI and PC/AT™expansion
·Floppy Controller (only one floppy supported)
·internal FFC connector
·external connector
·Touchscreen interface (COM 2 or PS/2 mouse port)
·PS/2 keyboard port
·Real time clock and battery
·Disk on a chip supported (DOC 2000)

1-2
·32Kx8 and 128Kx8 non- volatile RAM supported
·LED interface
·Designed specifically for Xycom industrial PC/ATs.
Architecture
Figure Chapter 1 -1. AHIP6+ Block diagram

1-3
PCI Local Bus Interface
The Pentium design uses the 440BX chip set. The 440BX integrates a high perform-
ance interface from PCI to IDE. This interface is capable of accelerated data transfers.
The 440BX chipset provides an accelerated PCI-to-ISA interface that includes
·A high-performance enhanced IDE controller
·PCI and ISA master/slave interfaces
·Plug-and-play port for on-board devices
The chipset also provides many common I/O functions found in ISA-based PC sys-
tems, including
·Seven-channel DMA controller
·Two 82C59 interrupt controllers
·8254 timer/counter
·Control logic for NMI generation
XGA Graphics Controller
The PCI bus controller supports CRT displays and flat panel displays with 2 MB
video memory. The controller also supports resolutions of 640x480, 800x600, and
1024x768 with 64K colors.
Fast IDE controller
The high-speed local bus IDE controller supports programmed I/O (PIO) modes 0-4.
It also provides 4x32-bit read-ahead buffer and 4x32-bit write-post buffer support to
enhance IDE performance.

1-4
Note
The IDE controller supports enhanced PIO modes, which reduce the cy-
cle times for 16-bit data transfers to the hard drive. Check with your
drive manual to see if the drive you are using supports these modes. The
higher the PIO mode, the shorter the cycle time.
Select the PIO modes in the BIOS setup (refer to Chapter 3). The auto-
configure classifies the drive connected if the drive supports the auto ID
command. If you experience problems, change the PIO to standard.
Expansion Options
The AHIP6+ offers expansion when used in conjunction with a Xycom Plug-in Ex-
pansion Backplane. This gives the user a total of six full length slots:
·Four dedicated ISA slots
·One dedicated PCI slot
·One slot that can be either ISA or PCI
On-board Memory
DRAM
The AHIP6+ has two 168-pin DIMM memory sites, providing up to 256 MB of
SDRAM (with up to 512 MB capability in the future). The memory site is populated
by 100 MHz synchroneous DRAM.
Flash BIOS
The AHIP6+ board uses a Flash BIOS. Flash is used for system BIOS and video BIOS.
Non-volatile SRAM
The AHIP6+ hardware supports non-volatile SRAM. Contact Xycom at 1-800-AT-
XYCOM ( 1-800-289-9266) for additional information about this feature.
The SRAM comes in a module type package and contains a built-in battery and bat-
tery backup circuitry. The battery life is approximately seven years in the absence of
VCC. The SRAM supports 32Kx8 and 128Kx8 memory sizes. The RAM comes in a
32 pin dip (0.6 inches wide) standard format.
SRAM can be located at: CC000, D0000, or D8000.

1-5
DiskOnChip 2000
The DiskOnChip 2000 is a single-chip Flash disk in a standard 32-pin DIP format.
It requires an 8 Kbyte window to view as an extension BIOS. During boot up, the
DiskOnChip loads its software in the PC’s memory and installs itself as an addi-
tional drive.
Serial and Parallel Ports
PC/AT peripherals include two high-speed, RS-232C, 16550-compatible serial ports
and one bi-directional Centronics-compatible parallel port:
·COM 1 of the serial ports accepts either RS-232 or RS-485 connections.
·COM 2 is RS-232 (stacked DB 25) with parallel port.
The COM2 port can be used for one of three options:
·Serial port out the 25 pin DB connector
·Touchscreen controller interface
·Infrared (IrDA) interface
The BIOS setup is used to configure the port as a serial port or IrDA port. This port
can be used as both a serial interface and an IR interface, by allowing software to
control the connection.
If the touchscreen controller is jumpered to use COM2, the 25-pin DB connector
must not be used to interface to a device. These lines are combined internally. The
BIOS setup menu for COM2 must be set to standard operation to use the touchscreen
controller on COM2.
Keyboard Interface
The keyboard interface uses a standard PS/2-style connector. A polyswitch protects
the +5 V. This device opens if the +5 V is shorted to GND. Once you remove the
shorting condition, the polyswitch allows current flow to resume.
Hard and Floppy Drives
The floppy interface supports one floppy drive. The AHIP6+ can interface to a floppy
via the on-board floppy connector or the external floppy connector.
In order to connect a floppy drive to the external connector after power up, the floppy
drive must be setup for a 1.44 MB drive and the floppy drive test must be disabled. If
this is not done the system generates a floppy drive error during the POST (Power On
Self Test).
The enhanced IDE (EIDE) interface supports up to 2 hard drives. Hard drive inter-
face is via the Xycom plug-in backplane or the on-board IDE controller.

1-6
Caution
The higher the PIO mode, the shorter the cycle time. As the IDE cable
length increases, this reduced cycle time can lead to erratic operation.
The total IDE cable length must not exceed 18 inches. If two IDE drives
are connected, they must not be more than six inches apart.
Environmental Specifications
Table Chapter 1 -1. Environmental Specifications
Characteristic Specification
Temperature
Operating
Non-operating
0° to 55° C (32° to 140° F)
-40° to 85°C (-40° to 185°F)
Humidity
Operating
Non-operating
20% to 80% RH noncondensing
20% to 80% RH noncondensing
Altitude
Operating
Nonoperating
Sea level to 10,000 feet (3048 m)
Sea level to 50,000 feet (15240 m)
Vibration a (9465 system b)
Operating
Nonoperating
5 to 55Hz
0.006” peak to peak displacement
56-2000 Hz
1.0g maximum acceleration
5-55 Hz
0.006” peak to peak displacement
56-2000 Hz
2.5 g maximum acceleration
Shock a (9465 system b)
Operating
Nonoperating
15g peak acceleration, 11 msec duration
30g peak acceleration, 11 msec duration
aThese values are with solid state hard drives and NOT rotating media drives
bConsistent with system level specifications. See your system manual if you have a system other than
the 9465.

1-7
Hardware Specifications
Table Chapter 1 -2. Hardware Specifications
Characteristic Specification
Power Specifications
+12V
-12V
+5V
Typical Maximum
90mA 112.5mA
30mA 37.5mA
CPU speed 266 MHz, 333 MHz, 350 MHz, and 400 MHZ
PCI Super VGA Graphics Controller 640x480, 800x600, and 1024x768, 64K colors maximum resolution
2 MB video DRAM
Serial Ports (2) COM1 is RS-232 or RS-485
COM2 is RS-232, or IR, or Touchscreen
Both 16550 compatible
Parallel Interface Centronics compatible
On-board memory Up to 256 MB; 100 MHz SDRAM

2-1
Chapter 2 – Installation
This chapter provides information on configuring the AHIP6+ Processor Module.
Pinouts for the connectors are located in Appendix C.
Figure 2-1 illustrates the jumper and connector locations on the AHIP6+.
Figure 2-1. AHIP6+ Jumper and Connector Locations
A
A
AB
B
BAB
AB
A
B
AB
J1 J2 J3
J18
J5 J6
J7
J8
MS2
J14 J15 J16 J17
DCINV1
TCTRL1
PARCOM2
COM1_4
KBMS1
USB1
VGA1
FDD1
FDD2
KYBD1
PRBT1
LEDMSC1
PWR1
HDD1
FPNL1
FPNL2
PBPR1
FAN2
FAN1
P3
KEYPAD1TCH1
LEDKB1
P1
P2
ATIDE1 PCIMG1
COM2
RS-232
(top)
PARAL LE L
(bottom)
CONNS.
COM1
RS-485
(top)
RS-232
(bottom)
CONNS.
EXTERNAL
MOUSE
(top)
KEYBOARD
(bottom)
CONNS.
USB
CONN.
EXTERNAL
FLOPPY
CONN.
INTERNAL
FLOPPY
CONN.
INTERNAL
KEYBOARD
CONN.
LED
CONN.
FLAT-
PANEL
CONN.
PROGH8
KEYPAD
CONN.
TOUCH
CONN.
TOUCH
CONTROL
CONN.
BACKLIGHT
INVERTER
CONN.
CPU
CONN.
CPU
CPU
FAN
CONN.
IDE
CONN.
SYSTEM
FAN
CONN.
POWER
CONN.
PC1
BACKPLANE
CONN.
ISA / IDE
BACKPLANE
CONN.
VIDEO
CONN.
LED IN
KEYPAD
CONN.
INTERNAL
MOUSE
CONN.
FPGA
PROGRAM
CONN.
DIMM
CONNS.

AHIP6+ Manual
2-2
Configuration Options
Jumpers
The following tables list AHIP6+ jumpers, their default positions and their functions.
The jumpers marked “Access”are placed at the top of the board for easy customer
access.
Table 2- 1. AHIP6+ Jumpers
Jumper Position Function
J1 A
B
Push button reset switch DISABLED (Access)
Push button reset switch ENABLED
J2 A
B
CMOS OK (Access)
Clear CMOS
J3 A
B
Flat panel selected (Access)
CRT selected
J4 A
B
Normal
Program the H8
J5 A
B
normal flash boot
recovery flash boot
J7 A
B
Boot flash enabled
Boot ROM enabled
J18 A
B
VGA ENABLED
VGA DISABLED
Jumpers J14-J17 are used to select the internal CPU frequency multiplier and are
used in conjunction with J6, the host bus frequency select jumper. The configuration
of these five jumpers must match the frequency combination of the particular proces-
sor used according to the following table:
Table 2- 2. Processor Frequency Combinations
A20M* IGNNE* LINT1 LINT0 100/66*
CPU Freq. MHz FSB Freq. MHz J14 J15 J16 J17 J6
233 66 IN OUT IN OUT A
266 66 OUT IN IN IN A
300 66 OUT IN IN OUT A
333 66 OUT OUT IN IN A
350 100 IN OUT IN OUT B
400 100 IN OUT IN IN B
450 100 OUT IN IN OUT B

Chapter 2 – Installation
2-3
System Interrupts
The following table describes the interrupts used on the AHIP6+.
Table 2- 3. System Interrupts
Interrupt Function
IRQ0 System Timer
IRQ1 Keyboard
IRQ2 Cascade
IRQ3 Serial Port*
IRQ4 Serial Port*
IRQ5 Parallel Port*
IRQ6 Floppy Controller
IRQ7 Parallel Port*
IRQ8 Real Time Clock
IRQ9 Unused
IRQ10 Serial Port*
IRQ11 Serial Port*
IRQ12 Mouse Port
IRQ13 Math Co
IRQ14 Fixed Disk
IRQ15 Unused
* BIOS setup controlled
The BIOS setup menu controls the interrupts for the serial and the parallel port.
The two Serial ports on the AHIP6+ board can be mapped to any two of the follow-
ing interrupts: 3, 4, 10, & 11 (defaults are interrupts 3 and 4). One parallel port can be
mapped to IRQ5 or IRQ7. The BIOS setup menu is used to control the location and
interrupts for the serial and parallel ports.
Note
The BIOS controls the mapping of the PCI interrupts to AT-bus inter-
rupts. This means if a PCI device is plugged into a slot and needs an in-
terrupt, one of the AT-bus interrupts must be mapped to the PCI inter-
rupt.

AHIP6+ Manual
2-4
DMA Mapping
Table 2- 4. DMA Channels
DMA Function
DMA0 Unused (Could be used for EPP/ECP parallel port option)
DMA1 Unused
DMA2 Floppy Controller
DMA3 Unused (Could be used for EPP/ECP parallel port option)
DMA5 Unused
DMA6 Unused
DMA7 Unused
DMA channels 0-3 are 8-bit and DMA channels 5-7 are 16-bit. When the ECP op-
tion is enabled, one of the 8-bit DMA channels is used.
Memory Map
The following table shows the AHIP6+ memory map. The I/O designation refers to
memory viewed as part of the AT bus.
Table 2- 5. Memory Map
Address Range (HEX) Size Device
FFFE0000 - FFFFFFFF 128K SYSTEM BIOS
end of DRAM - FFFDFFFF xxxK I/O Memory
00100000 - end of DRAM xxxK DRAM*
000F0000 - 000FFFFF 64K SYSTEM BIOS
000E0000 - 000EFFFF 64K SYSTEM BIOS
000D0000 - 000DFFFF 64K AT bus I/O
000C0000 - 000CBFFF 48K VGA BIOS
000A0000 - 000BFFFF 128K VGA DRAM MEMORY
00000000 - 0009FFFF 640K DRAM
*See Intel 430BX data sheet for a description of optional settings for assigning mem-
ory holes or gaps within memory map area.

Chapter 2 –Installation
2-5
I/O Map
The I/O map for the AHIP6+ in Table 2- 6 contains all the I/O ports of the IBM AT
architecture with some additions.
Table 2- 6. I/O Map
Hex Range Device
000-01F DMA controller 1, 8237A-5 equivalent
020-021 Interrupt controller 1, 8259 equivalent
022-024 Available
025-02F Interrupt controller 1, 8259 equivalent (see Note 3)
040-05F Timer, 8254-2 equivalent
060-06F 8742 equivalent (keyboard)
070-07F Real Time Clock bit 7 NMI mask (see Note 3)
080-091 DMA page register (see Note 3)
092 Reset/ Fast Gate A20
93-9F DMA page register (see Note 3)
0A0-0BF Interrupt controller 2, 8259 equivalent (see Note 3)
0C0-0DF DMA controller 2, 8237A-5 equivalent (see Note 3)
0F0 N/A
0F1 N/A
0F2-0F3 N/A
0F4 IDE ID port
0F5-0F7 N/A
0F8 IDE Index port
0F9-0FB N/A
0FC IDE Data port
0FD-0FF N/A
100 Available
102 C&T Global enable register
103-179 Available
180-181 SRAM control register (May be remapped based on I/O port 234h)
182-1EF Available
1F0-1F7 IDE Controller (AT Drive)
1F8-22F Available
231 Xycom LED port
233 Xycom Flash control register
234 Xycom IO port control register
278-27F Parallel Port 2 (see Note 1)
280-2F7 Available
2F8-2FF Serial Port 2 (see Note 1)
300-36F Available
370-377 Alt. Floppy Disk Controller (see Note 1)
378-37F Parallel Port 1 (see Note 1)
380-3AF Available

AHIP6+ Manual
2-6
Hex Range Device
3B0-3BB mono mode video
3BC-3BF reserved for parallel port
3C0-3CF VGA registers (see Note 2)
3D0-3DF CHIPS flat panel & color mode registers
3E0-3EF Available
3F0-3F7 Primary Floppy disk controller
3F8-3FF Serial port 1 (see Note 1)
CF8 PCI configuration address register (see Note 4)
CFC PCI configuration data register (see Note 4)
Note 1
Since serial and parallel port addresses can be changed or the port may
be disabled, these addresses can be used for some applications and not
for others.
Note 2
Reference the C&T69000 advance data book for detailed information.
Note 3
Reference the Intel 430BX chip set data book for detailed information.
Note 4
Reference the following for PCI configuration: PCI local bus specifica-
tion rev 2.1, Intel 430BX chip set data book, and C&T69000 data book.

Chapter 2 –Installation
2-7
Registers
The AHIP6+ contains five I/O ports: 231h, 233h, 234h, and a user-definable port
(port 180/1h, 2E0/1h, 3E0/1h, or 300/1h). These ports are compatible with AHIP4+
and AHIP 6+.
Register 231h – CPU LED Port
Register 231h controls the LEDs and signals shown in the following table.
Table 2- 7. Register 231h - CPU LED Port
Bit LED/Signal Result R/W
0 Reserved 0 R
1 Reserved 0 R
2 Reserved 0 R
3 Reserved 0 R
4 Reserved 0 R
5* ENFLASHWR 1 = Enables Flash write R/W
6 VGA_EN 1 = Enables on-board VGA R
7 CLRCMS 1 = CMOS okay
0 = Clear CMOS
R
*Note: This bit must be 1 to make FLASH visible @D0000h when booting from
AT bus. This bit also enables the FLASH @C0000h when booting to FLASH.
Register 233h – Flash BIOS Control
Register 233h controls the signals shown in the following table.
Table 2- 8. Register 233h - Flash BIOS Control Register
Bit Signal Result R/W
0 FLA15 Flash address 15 - page control bit R/W
1 FLA16 Flash address 16- page control bit R/W
2 FLA17 Flash address 17 - page control bit R/W
3 FLA18 Flash address 18 - page control bit R/W
4 FPSEL0 Flat panel select bit 0 R
5 FPSEL1 Flat panel select bit 1 R
6 FPSEL2 Flat panel select bit 2 R
7 FPSEL3 Flat panel select bit 3 R

AHIP6+ Manual
2-8
Register 234h - I/O Port Location
Register 234h controls the I/O port location register shown in the following table.
Table 2- 9. Register 234h - I/O Port Location Register
Bit Signal Result R/W
0 Reserved 0 R
1 Reserved 0 R
2 Reserved 0 R
3 Reserved 0 R
4 I/O range select I/O range select bit 0 R
5 I/O range select I/O range select bit 1 R
6 I/O port bit 0 I/O port bit 0 R/W
7 I/O port bit 1 I/O port bit 1 R/W
Bits 0-3 are reserved for the temperature sensor. Bits 4 and 5 are reserved for setting
the memory location for the SRAM.
I/O Range Select
The following are ranges defined by register 234h.
Table 2- 10. I/O Range Selection
I/O range selection Range
00 no range
01 CC000-CFFFF
10 D0000-D7FFF
11 D8000-DFFFF