ADLINK Technology SMARC MODULE LEC-EL Owner's manual

LEC-EL L
11/08/2021

ADLINK Technology Inc. LEC-EL Product specification
Page 2 copyright © 2021 ADLINK Technology Inc.
Preface
Disclaimer
Information in this document is provided in connection with ADLINK products. No license, express or implied, by estoppel or otherwise, to any intellectual property
rights is granted by this document. Except as provided in ADLINK´s Terms and Conditions of Sale for such products,
ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or implied warranty, relating to sale and/or use of ADLINK products including liability or
warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright
or other intellectual property right. If you intend to use ADLINK products in or as medical devices, you are solely responsible for all required regulatory compliance,
including, without limitation, Title 21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, if any.
ADLINK may make changes to specifications and product descriptions at any time, without notice.
Environmental Responsibility
ADLINK is committed to fulfil its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous
Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have
enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible.
When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Trademarks
Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.
© Copyright 2017 ADLINK Technology, Incorporated
This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical,
electronic, or other means in any form without prior written permission of the manufacturer.

LEC-EL Product specification SGET SMARC Rev 2.1
Page 3 copyright © 2021 ADLINK Technology Inc.
Safety Instructions
For user safety, please read and follow all Instructions, WARNINGs, CAUTIONs, and NOTEs marked in this manual and on the associated equipment before
handling/operating the equipment.
•Read these safety instructions carefully.
•Keep this manual for future reference.
•Read the specifications section of this manual for detailed information on the operating environment of this equipment.
•Turn off power and unplug any power cords/cables when installing/mounting or un-installing/removing equipment.
•To avoid electrical shock and/or damage to equipment:
•Keep equipment away from water or liquid sources;
•Keep equipment away from high heat or high humidity;
•Keep equipment properly ventilated (do not block or cover ventilation openings);
•Make sure to use recommended voltage and power source settings;
•Always install and operate equipment near an easily accessible electrical socket outlet;
•Secure the power cord (do not place any object on/over the power cord);
•Only install/attach and operate equipment on stable surfaces and/or recommended mountings;
•If the equipment will not be used for long periods of time, turn off the power source and unplug the equipment.
Conventions
The following conventions may be used throughout this manual, denoting special levels of information
Note: This information adds clarity or specifics to text and illustrations.
Caution: This information indicates the possibility of minor physical injury, component damage, data loss, and/or program corruption.
Warning: This information warns of possible serious physical injury, component damage, data loss, and/or program corruption.

ADLINK Technology Inc. LEC-EL Product specification
Page 4 copyright © 2021 ADLINK Technology Inc.
Revision History
Revision
Description
Date (dd/mm/yyyy)
Author
0.6
Preliminary engineering version
15/03/2021
hp
0.9
Preliminary engineering version updated
25/10/2021
hp
1.0
Release version
21/11/2021
hp

LEC-EL Product specification SGET SMARC Rev 2.1
Page 5 copyright © 2021 ADLINK Technology Inc.
Table of Contents
Introduction........................................................................................................................................................................................................................................................................................................................ 8
1.1 The SMARC Formfactor .........................................................................................................................................................................................................................................................................................................................8
2. Specifications............................................................................................................................................................................................................................................................................................................... 9
2.1 Core System................................................................................................................................................................................................................................................................................................................................................9
2.2 Video..............................................................................................................................................................................................................................................................................................................................................................9
2.3 Audio .......................................................................................................................................................................................................................................................................................................................................................... 10
2.4 Dual Ethernet........................................................................................................................................................................................................................................................................................................................................... 10
2.5 Extension busses.................................................................................................................................................................................................................................................................................................................................... 10
2.6 System Storage ...................................................................................................................................................................................................................................................................................................................................... 11
2.7 SEMA® Board Management Controller ...................................................................................................................................................................................................................................................................................... 12
2.8 Debug Header ........................................................................................................................................................................................................................................................................................................................................ 12
2.9 BIOS............................................................................................................................................................................................................................................................................................................................................................. 12
2.10 Power.......................................................................................................................................................................................................................................................................................................................................................... 12
2.11 Mechanical and Environmental ....................................................................................................................................................................................................................................................................................................... 13
3. Block Diagram ...........................................................................................................................................................................................................................................................................................................14
4. Pinout and Signal Descriptions ............................................................................................................................................................................................................................................................................ 1
4.1 Pin Summary ..............................................................................................................................................................................................................................................................................................................................................1
4.2 Signal Terminology Descriptions.......................................................................................................................................................................................................................................................................................................1
4.3 Signal Description by function............................................................................................................................................................................................................................................................................................................2
4.3.1 The First Display Interface ........................................................................................................................................................................................................................................................................................................2
4.3.2 Second & Third Display Interface .........................................................................................................................................................................................................................................................................................5
4.3.3 MIPI Camera support .................................................................................................................................................................................................................................................................................................................3
4.3.4 HDA (Audio)...................................................................................................................................................................................................................................................................................................................................3
4.3.5 USB ports.........................................................................................................................................................................................................................................................................................................................................4
4.3.6 PCIe Ports........................................................................................................................................................................................................................................................................................................................................2
4.3.7 SATA Gen 3 Ports.........................................................................................................................................................................................................................................................................................................................4
4.3.8 LAN ports ........................................................................................................................................................................................................................................................................................................................................5
4.3.9 SDIO...................................................................................................................................................................................................................................................................................................................................................7
4.3.10 SPI & ESPI........................................................................................................................................................................................................................................................................................................................................8
4.3.11 SPI0 ....................................................................................................................................................................................................................................................................................................................................................8
4.3.12 ESPI ....................................................................................................................................................................................................................................................................................................................................................9
4.4 General Purpose I2C............................................................................................................................................................................................................................................................................................................................. 10
4.4.1 GPIO................................................................................................................................................................................................................................................................................................................................................ 11
4.4.2 UART............................................................................................................................................................................................................................................................................................................................................... 12

ADLINK Technology Inc. LEC-EL Product specification
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4.4.3 CAN bus........................................................................................................................................................................................................................................................................................................................................ 13
4.4.4 Miscellaneous............................................................................................................................................................................................................................................................................................................................. 13
4.4.5 Power and System Management ....................................................................................................................................................................................................................................................................................... 14
4.4.6 Boot Select................................................................................................................................................................................................................................................................................................................................... 16
4.4.7 Power ............................................................................................................................................................................................................................................................................................................................................. 17
4.5 SMARC pin to controller mapping................................................................................................................................................................................................................................................................................................. 18
5. Software Support .....................................................................................................................................................................................................................................................................................................29
5.1.1 Yocto .............................................................................................................................................................................................................................................................................................................................................. 29
5.1.2 Ubuntu........................................................................................................................................................................................................................................................................................................................................... 29
5.1.3 Windows....................................................................................................................................................................................................................................................................................................................................... 29
6. Mechanical..................................................................................................................................................................................................................................................................................................................30
7. Thermal Solutions....................................................................................................................................................................................................................................................................................................31

LEC-EL Product specification SGET SMARC Rev 2.1
Page 7 copyright © 2021 ADLINK Technology Inc.
List of Figures
Figure 1 –Module function diagram......................................................................................................................................................................................................................................14
Figure 2 –Module top/botom side pin numbering .................................................................................................................................................................................................................1

ADLINK Technology Inc. LEC-EL Product specification
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Introduction
Warning: this is an EA (early available) engineering manual, meaning contents might not properly reflect the actual or final version of this product
1.1 The SMARC Formfactor
The SMARC (“Smart Mobility ARChitecture”) is a versatile small form factor computer on Module definition targeting applications that require low power, low costs,
and high performance. The Modules will typically use ARM SOCs similar or the same as those used in many familiar devices such as tablet computers and smart phones.
Alternative low power SOCs and CPUs, such as tablet oriented X86 devices and other RISC CPUs may be used as well. The Module power envelope is typically under
6W.
Two Module sizes are defined: 82 mm x 50 mm and 82 mm x 80 mm.
The Module PCBs have 314 edge fingers that mate with a low profile 314 pin 0.5 mm pitch right angle connector (the connector is sometimes identified as a 321 pin
connector, but 7 pins are lost to the key).
The Modules are used as building blocks for portable and stationary embedded systems. The core CPU and support circuits, including DRAM, boot flash, power
sequencing, CPU power supplies, GBE and a single channel LVDS display transmitter are concentrated on the Module. The Modules are used with application specific
Carrier Boards that implement other features such as audio CODECs, touch controllers, wireless devices, etc. The modular approach allows scalability, fast time to
market and upgradability while still maintaining low costs, low power and small physical size.
SMARC module and carrier specifications are available online at: https://www.sget.org/standards/smarc.html

LEC-EL Product specification SGET SMARC Rev 2.1
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2. Specifications
2.1 Core System
SoC
Intel®Elkhart Lake series Atom® 6th generation
x6211E, x6413E, x6425E, x6200FE, x6414RE, x6425RE standard embedded and industrial grade parts
L2 Cache
1.5 MB I2 Cache, 4MB LLC Cache
Memory
2 / 4 / 8 / 16 GB LPDDR4 at 4266 MT/s memory down type with IBECC
2.2 Video
LEC-EL standard display support consists of 4K capable HDMI 2.0a, 4K DP++ and single/dual channel 24-bit LVDS.
The LVDS output is derived from an eDP to LVDS bridge. As build option the bridge can be removed .
GPU Core:
Intel Gen11LP UHD Graphics
HDMI
HDMI 2.0a supporting resolution up to 4K (4096 x 2160 at 60 Hz)
LVDS
LVDS single/dual channel 24-bit at max. 1920x 1200 over eDP to LVDS bridge
optional MIPI DSI
DSI 4 lanes at max. 1080p@60fps display output (build option multiplexed with LVDS signal)

ADLINK Technology Inc. LEC-EL Product specification
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2.3 Audio
HDA audio interface
audio Codec located on carrier
2.4 Dual Ethernet
Primary LAN (GbE0) GPY
SOC embedded RGMII Ethernet Controller with optional IEEE-1588 PTP (Precision Time Protocol)
Supports 2.5Gb data transfer rates, both full-duplex and half-duplex "
Secondary LAN (GbE1) GPY
SOC embedded RGMII Ethernet Controller with optional IEEE-1588 PTP (Precision Time Protocol)
Supports 2.5Gb data transfer rates, both full-duplex and half-duplex "
2.5 Extension busses
PCIe
Four PCI Express GEN3 x1 interfaces
USB
2x USB 3.0 | 4x USB 2.0
UART
Four UART interface SER0,2 (Tx/Rx/CTS/RTS) and SER1, SER3 (Tx/Rx)
7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or none)
Programmable baud rates up to 4 Mbps.

LEC-EL Product specification SGET SMARC Rev 2.1
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CAN bus
Two CAN2.0B only or mixed CAN2.0B and CAN FB mode, data bit rate up to 8 Mbps
SPI
1 x SPI 1x eSPI
HDA / I2S
1x High-Definition Audio (HDA) as default or 1x I2S as option
I2C
Four I2C interfaces
- Support for 7-bit and 10-bit address mode
- Software programmable clock frequency of 100 kbit/s in Standard-mode,
400 kbit/s in the Fast-mode or 1 Mbit/s in Fast-mode Plus
GPIO
14x GPIO with interrupt (13 usable because of shared HDA_RST# )
2.6 System Storage
SDIO
1x SDIO (4-bit) compatible up to version 3.0.
eMMC
soldered on module 8, 16, 32, 64, 128 GB (build option) either standard or -40+85C temp range
Compatible with eMMC specification 4.51 and higher

ADLINK Technology Inc. LEC-EL Product specification
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2.7 SEMA® Board Management Controller
Voltage/current monitoring, boot configuration, logistics and forensic
information, flat panel control, watchdog timer
2.8 Debug Header
30-pin multipurpose flat cable connector for use with optional DB-30 debug module Provides JTAG, BMC access; UART, power test points; diagnostic LEDs, Power,
Reset, Boot configuration
2.9 BIOS
Single BIOS chip, UEFI BIOS
2.10 Power
Supply Voltage
5V +/- 5%
Power sequencing
Basically, VDD_IN is the first power domain to be turned on by the carrier circuit during power-up. Other circuit components on the carrier, which are galvanically
coupled to the module, shall not be supplied to avoid feedback. From the moment VDD_IN is stable - recognizable by VIN_PWR_BAD# deasserted - the module takes
over control of the power sequencing. As soon as the module reaches the next system state standby, CARRIER_PWR_ON signals the carrier to switch on all its standby
voltages. No feedback is provided to allow the carrier to signal Power OK to the modules power state machine. When the state Runtime is reached, the module de-
asserts CARRIER_STBY#. The carrier then switches on the remaining rails.

LEC-EL Product specification SGET SMARC Rev 2.1
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2.11 Mechanical and Environmental
Form Factor
SGET SMARC Specifications v2.1
Dimension
SMARC small size module, 82mm x 50mm
Operating Temperature
Standard: 0°C to +60°C
Rugged: -40°C to +85°C (optional)
Humidity
5-90% RH operating, non-condensing
5-95% RH storage (and operating with conformal coating)
Shock and Vibration
IEC 60068-2-64 and IEC-60068-2-27, MIL-STD-202 F, Method 213B, Table 213-I,
Condition A and Method 214A, Table 214-I, Condition D

ADLINK Technology Inc. LEC-EL Product specification
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3. Block Diagram
BMC/EC
IT5121
4K HDMI /DP
4K DP++ /HDMI
LVDS/DSI/eDP
USB 0,1,4,5
USB 2,3
SATA Gen3
LAN0
LAN1
PCIe A, B, C, D
CAN0
CAN1
14x GPIO
SMB
SDIO
SER 2/3
eSPI
SER 0/1
BOOT Select
SPI
4x I2C
SDIO
HDA/I2S
Power Management
(Elkhart Lake)
Intel Atom® 6th Gen.
USB 2.0 HOST
USB 3.0 HOST
SATA0
DDI2
DDI1
DDI0
GPIO INT
SMB
eSPI
4x PCIex1Gen3
SGMII0
LPDDR4
x32
eMCC
16/32/64GB
CAN
CAN
FSPI
I2C
SDIO
HDA/I2S
PM
NXP PTN3460
DSI option
LPDDR4
x32
LPDDR4
x32
LPDDR4
x32
TPM 2.0
Crypto
ATECC608
SPI
I2C
GPY211
GPY211 SGMII1
SX1509
INT
SDIO
HSUART
SPI BIOS SPI
Figure 1 –Module function diagram

LEC-EL Product specification SGET SMARC Rev 2.1
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4. Pinout and Signal Descriptions
4.1 Pin Summary
The below tables are a comprehensible list of all signal pins on the MXM 3 connector in the standard specification SMARC 2.1.
TOP Side
P1 P74 P75
Key
P156
BOTTOM Side
S156 S76 S75
Key
S1
Figure 2 –Module top/botom side pin numbering

LEC-EL Product specification SGET SMARC Rev 2.1
Page 1 copyright © 2021 ADLINK Technology Inc.
4.2 Signal Terminology Descriptions
Meaning of the terms used for signal description tables
Term
Description
I
Input to the module
O
Output from the module
O OD
Open drain output from the module
I OD
Open drain input to the module, with mandatory PU (pull up) on module
OD
Open drain
I/O
Bi-directional Input/Output
PU
PU (pull-up) resistor on module
PD
PD (pull-down) resistor on module
VDD_IN
Main power source from carrier to module
CMOS
Logic input or output
GBE MDI
Differential analog signaling for Gigabit Media Dependent Interface
LVDS DP
Low Voltage Differential Signal for DisplayPort interface
LVDS D-PHY
Low Voltage Differential Signal for MIPI CSI-2 cameras and DSI displays
LVDS M-PHY
Low Voltage Differential Signal for MIPI CSI-3 cameras
LVDS LCD
Low Voltage Differential Signal for LCD displays
LVDS PCIE
Low Voltage Differential Signal for PCIe
LVDS SATA
Low Voltage Differential Signal for SATA
TMDS HDMI
Transition Minimized Differential Signal for HDMI displays
USB
DC coupled differential signaling for traditional (non-Superspeed) USB signals
USB SS
Differential signal for SuperSpeed USB signals
USB VBUS 5V
5V tolerant input for USB VBUS detection
3.3V
3.3V Power Domain: Active while CARRIER_PWRON is high and CARRIER_SBY# is NOT active (i.e. both signals are high)
1.8V
1.8V Power Domain: Active while CARRIER_PWRON is high and CARRIER_SBY# is NOT active (i.e. both signals are high)
3.3Vsb
3.3V Power Domain: Active while CARRIER_PWRON is high (regardless of CARRIER_SBY#)
1.8Vsb
1.8V Power Domain: Active while CARRIER_PWRON is high (regardless of CARRIER_SBY#)

ADLINK Technology Inc. LEC-EL Product specification
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4.3 Signal Description by function
4.3.1 The First Display Interface
The first display interface is a group of 30-pins that is split into a channel 0 and channel 1. The SMARC specification allows to support either dual channel LVDS ports,
2 separate single channel LVDS ports, 2 MIPI DSI ports of 4 lanes each or 2 eDP ports 4 lanes each. A mix of different display type such as DSI and eDP is also permitted.
Below tables show which display ports are supported on this particular module
Pin #
LVDS Name
MIPI DSI Name
eDP Name
Pin #
LVDS Name
MIPI DSI Name
eDP Name
S125
S126
S128
S129
S131
S132
S137
S138
LVDS0_0+
LVDS0_0-
LVDS0_1+
LVDS0_1 -
LVDS0_2+
LVDS0_2-
LVDS0_3+
LVDS0_3-
DSI0_D0+
DSI0_D0-
DSI0_D1+
DSI0_D1-
DSI0_D2+
DSI0_D2-
DSI0_D3+
DSI0_D3-
eDP0_TX0+
eDP0_TX0-
eDP0_TX1+
eDP0_TX1-
eDP0_TX2+
eDP0_TX2-
eDP0_TX3+
eDP0_TX3-
S111
S112
S114
S115
S117
S118
S120
S121
LVDS1_0+
LVDS1_0-
LVDS1_1+
LVDS1_1 -
LVDS1_2+
LVDS1_2-
LVDS1_3+
LVDS1_3-
DSI1_D0+
DSI1_D0-
DSI1_D1+
DSI1_D1-
DSI1_D2+
DSI1_D2-
DSI1_D3+
DSI1_D3-
eDP1_TX0+
eDP1_TX0-
eDP1_TX1+
eDP1_TX1-
eDP1_TX2+
eDP1_TX2-
eDP1_TX3+
eDP1_TX3-
S134
S135
LVDS0_CK+
LVDS0_CK-
DSI0_CLK+
DSI0_CLK-
eDP0_AUX+
eDP0_AUX-
S108
S109
LVDS1_CK+
LVDS1_CK-
DSI1_CLK+
DSI1_CLK-
eDP1_AUX+
eDP1_AUX-
S133
LCD0_VDD_EN
LCD0_VDD_EN
LCD0_VDD_EN
S116
LCD1_VDD_EN
LCD1_VDD_EN
LCD1_VDD_EN
S127
LCD0_BKLT_EN
LCD0_BKLT_EN
LCD0_BKLT_EN
S107
LCD1_BKLT_EN
LCD1_BKLT_EN
LCD1_BKLT_EN
S141
LCD0_BKLT_PWM
LCD0_BKLT_PWM
LCD0_BKLT_PWM
S122
LCD1_BKLT_PWM
LCD1_BKLT_PWM
LCD1_BKLT_PWM
S144
DSI0_TE
eDP0_HPD
S113
DSI1_TE
eDP1_HPD
S139
I2C_LCD_CK
I2C_LCD_CK
I2C_LCD_CK
S140
I2C_LCD_DAT
I2C_LCD_DAT
I2C_LCD_DAT
Note : LVDS0/LVDS1 are standard supported through a eDP to LVDS bridge on the module
Note : eDP can be used by build option, disabling the LVDS0/LVDS1 ports

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4.3.1.1 LVDS0/LVDS1 mode
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
LVDS0_0+
LVDS0_0-
LVDS0_1+
LVDS0_1 -
LVDS0_2+
LVDS0_2-
LVDS0_3+
LVDS0_3-
S125
S126
S128
S129
S131
S132
S137
S138
Primary LVDS Channel Differential
Pair Data Lines
O LVDS
Runtime
100 ohm differential termination across the differential
pairs at the endpoint of the signal path, usually on the
display assembly.
LVDS0_CK+
LVDS0_CK-
S134
S135
Primary LVDS Channel Differential
Pair Clock Lines
O LVDS
Runtime
100 ohm differential termination across the differential
pair at the endpoint of the signal path, usually on the
display assembly.
LCD0_VDD_EN
S133
Primary LVDS Channel Power Enable
O
CMOS
1.8V
Runtime
Active high
LCD0_BKLT_EN
S127
Primary LVDS Channel Backlight Enable
O
CMOS
1.8V
Runtime
Active high
LCD0_BKLT_PWM
S141
Primary LVDS Channel Brightness Control
O
CMOS
1.8V
Runtime
Through pulse width modulation (PWM)
LVDS1_0+
LVDS1_0-
LVDS1_1+
LVDS1_1 -
LVDS1_2+
LVDS1_2-
LVDS1_3+
LVDS1_3-
S111
S112
S114
S115
S117
S118
S120
S121
Secondary LVDS Channel Differential Pair Data
Lines
O LVDS
Runtime
100 ohm differential termination across the differential
pairs at the endpoint of the signal path, usually on the
display assembly.
LVDS1_CK+
LVDS1_CK-
S108
S109
Secondary LVDS Channel Differential Pair
Clock Lines
O LVDS
Runtime
100 ohm differential termination across the differential
pair at the endpoint of the signal path, usually on the
display assembly.

ADLINK Technology Inc. LEC-EL Product specification
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LCD1_VDD_EN
S116
Secondary LVDS Channel Power Enable
O
CMOS
1.8V
Runtime
Active high
Only in use, when two separate LVDS ports are
supported, please check Module user manual
LCD1_BKLT_EN
S107
Secondary LVDS Channel Backlight Enable
O
CMOS
1.8V
Runtime
Active high
Only in use, when two separate LVDS ports are
supported, please check Module user manual
LCD1_BKLT_PWM
S122
Secondary LVDS Channel Brightness Control
O
CMOS
1.8V
Runtime
Through pulse width modulation (PWM)
only in use, when two separate LVDS ports are
supported, please check Module user manual
I2C_LCD_DAT
S140
DDC data line used for flat panel detection
and control
I/O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if two LVDS panels are used
I2C_LCD_CK
S139
DDC clock line used for flat panel detection
and control
O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if two LVDS panels are used
4.3.1.2 eDP mode (build option)
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
eDP0_TX0+
eDP0_TX0-
eDP0_TX1+
eDP0_TX1-
eDP0_TX2+
eDP0_TX2-
eDP0_TX3+
eDP0_TX3-
S125
S126
S128
S129
S131
S132
S137
S138
Primary 4-Lane eDP Differential Pair Data Lines
O DP
Runtime
AC coupled off Module
100 nF DC blocking capacitors shall be placed
on the Carrier.
eDP0_AUX+
eDP0_AUX-
S134
S135
Primary Bidirectional Channel used for Link
Management and Device Control
I/O DP
Runtime
AC coupled off Module
LCD0_VDD_EN
S133
Primary Panel Power Enable
O
CMOS
1.8V
Runtime
Active high
LCD0_BKLT_EN
S127
Primary Panel Backlight Enable
O
CMOS
1.8V
Runtime
Active high