Alinx AXU7EV User manual

ZYNQ UltraScale+
FPGA Development Board
AXU7EV
User Manual

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Version Record
Version
Date
Release By
Description
Rev 1.1
2021-07-28
Rachel Zhou
First Release

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Table of Contents
Version Record.......................................................................................................2
Part 1: FPGA Development Board Introduction............................................... 6
Part 2: ACU7EV Core Board............................................................................. 11
Part 2.1: ACU7EV Core Board Introduction............................................11
Part 2.2: ZYNQ Chip...................................................................................12
Part 2.3: DDR4 DRAM............................................................................... 14
Part 2.4: QSPI Flash...................................................................................23
Part 2.5: eMMC Flash.................................................................................24
Part 2.6: Clock configuration..................................................................... 26
Part 2.7: Power Supply...............................................................................28
Part 2.8: ACU7EV Core Board Size Dimension.................................... 30
Part 2.9: Board to Board Connectors pin assignment..........................30
Part 3: Carrier Board...........................................................................................39
Part 3.1: Carrier Board Introduction.........................................................39
Part 3.2: PCIe Slot...................................................................................... 39
Part 3.3: M.2 Interface................................................................................42
Part 3.4: DP Interface................................................................................. 43
Part 3.5: USB3.0 Interface.........................................................................44
Part 3.6: HDMI Output Interface...............................................................46
Part 3.7: HDMI Input Interface.................................................................. 47
Part 3.8: Gigabit Ethernet Interface......................................................... 49
Part 3.9: USB to Serial Port.......................................................................52
Part 3.10: SFP Interface.............................................................................53
Part 3.11: SD Card Slot Interface............................................................. 54
Part 3.12: MIPI Camera Interface............................................................ 55
Part 3.13: FMC Interface............................................................................56
Part 3.14: CAN Communication Interface.............................................. 60

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Part 3.15: 485 Communication Interface................................................ 60
Part 3.16: JTAG Debug Port......................................................................61
Part 3.17: Real-time Clock.........................................................................62
Part 3.18: EEPROM and Temperature Sensor......................................63
Part 3.19: User LEDs..................................................................................64
Part 3.20: Keys............................................................................................ 65
Part 3.21: DIP Switch Configuration........................................................ 65
Part 3.22: Power Supply............................................................................ 66
Part 3.23: ALINX Customized Fan........................................................... 67
Part 3.24: Carrier Board Size Dimension................................................68

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This MPSoCs FPGA development platform adopts the core board + carrier
board mode, which is convenient for users to use the core board for secondary
development. The core board uses XILINX Zynq UltraScale+ EV chip ZU7EV
solution, uses Processing System(PS)+Programmable Logic(PL) technology to
integrate dual-core ARM ARM Cortex-A53 and FPGA programmable logic on a
single chip. In addition, the PS side of the core board has 4 pieces of 1GB
high-speed DDR4 SDRAM chips, 1 piece of 8GB eMMC memory chip and 2
piece of 256Mb QSPI FLASH chip; the PL side of the core board has 4 pieces
of 1GB DDR4 SDRAM chip
In the design of carrier board, we have extended a wealth of interfaces for
users, such as 1 FMC LPC interface, 1 M.2 SSD interface, 1 Mini DP interface,
4 USB 3.0 Interface, 2 Gigabit Ethernet interfaces, 1 HDMI Output, 1 HDMI
Input, 2 Uart, 1 PCIe x 8, 1 TF card slot, 2-Channel CAN bus interfaces,
2-Channel RS485 bus interfaces, 1 MIPI Camera Interface. It meets users'
requirements for high-speed data exchange, data storage, Video transmission
processing, deep learning, artificial intelligence and industrial control. It is a
"professional" ZYNQ development platform. For high-speed data transmission
and exchange, pre-verification and post-application of data processing is
possible. This product is very suitable for students, engineers and other groups
engaged in MPSoCs development.

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Part 1: FPGA Development Board Introduction
The entire structure of the AXU7EV PGA development board is inherited
from our consistent core board + carrier board model. A high-speed inter-board
connector is used between the core board and the carrier board.
The core board is mainly composed of the smallest system of ZU7EV + 8
DDR4 + eMMC + 2 QSPI FLASH, the main FPGA chip is Xilinx's Zynq
UltraScale+ MPSoCs family chip, the model number is XCZU7EV-2FFVB1156I.
ZU7EV chip can be divided into processor system part Processor System (PS)
and programmable logic part Programmable Logic (PL). On the PS side and PL
side of the ZU7EV chip, there are 4 DDR4 and 4 DDR4 respectively, each with
a capacity of up to 1GB, which enables the ARM system and FPGA system to
independently process and store data. The 8GB eMMC FLASH memory chip
and two 256Mb QSPI FLASH which are on the PS side, used to statically store
the operating system, file system and user data of MPSoCs.
The AXU7EV carrier board expands its rich peripheral interface, including
1 FMC_LPC interface, 1 M.2 SSD interface, 1 Mini DP output interface, 2 SFP
Interfaces, 4 USB 3.0 Interface, 2 Gigabit Ethernet interfaces, 1 HDMI Input
Interfaces, 1 HDMI Output Interfaces, 2 UART, 1 SD card slot, 1 PCIe x8,
2-Channel CAN bus interfaces, 2-Channel RS485 bus interfaces, 1 MIPI
Camera Interface, 40-pin expansion ports and some keys and LEDs.
The following figure shows the structure of the entire development system:

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Figure 1-1-1: The Schematic Diagram of the AXU7EV
Through this diagram, you can see the interfaces and functions that the
AXU7EV FPGA Development Board contains:
ZU7EV core board
It consists of ZU7EV +4GB DDR4（PS）+4GB DDR4（PL）+8GB eMMC
FLASH + 512Mb QSPI FLASH, and there are 2 crystal oscillators to
provide the clock, a single-ended 33.3333MHz crystal oscillator for the
PS system, and a differential 200MHz crystal oscillator for the PL logic
DDR reference clock.
PCIe x 8 Interface
It supports the PCI Express 3.0 standard, provides a standard PCIe x 8
high-speed data transmission interface, and the single-channel
communication rate can be as high as 8GBaud.

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M.2 Interface
1 PCIEx1 standard M.2 interface, used to connect M.2 SSD solid state
drives, with a communication speed of up to 6Gbps.
DP Output Interface
1 standard Display Port output display interface, used for video image
display. Supports up to 4K@30Hz or 1080P@60Hz output
USB 3.0 Interface
4-channel USB3.0 HOST interface, USB interface type is TYPE A. Used
to connect external USB peripherals, such as connecting a mouse,
keyboard, U disk, etc.
HDMI Output Interface
1 HDMI video output interface, using SN75DP159RSBR DP HDMI
encoding chip from TI, supports up to 4K@60Hz output.
HDMI Input Interface
1 HDMI video input interface, using TMDS181IRGZT HDMI decoding
chip from TI, supports up to 4K@60Hz input and supports data input in
different formats.
Gigabit Ethernet Interface
2-Channel 10/100M/1000M Ethernet RJ45 interface for Ethernet data
exchange with computers or other network devices.
USB Uart Interface
2-Channel Uart to USB interfaces for communication with the computer,
for user debugging. The serial port chip adopts the USB-UAR chip of
Silicon Labs CP2102GM, and the USB interface adopts the MINI USB
interface.
2-Channel SFP Fiber Interface
The two high-speed transceivers of the GTH transceiver are connected
to the transmitting and receiving of two optical modules, realizing two
high-speed optical fiber communication interfaces. The transmitting and

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sending speed of each optical fiber data communication is as high as
12.5Gb/s.
SD Card Slot Interface
1 Micro SD card holder, used to store operating system image and file
system.
FMC Expansion Interface
1 standard FMC LPC expansion port, which can be connected to
various FMC modules of XILINX or ALINX (HDMI input and output
modules, binocular camera modules, high-speed AD modules, etc.).
CAN Communication Interface
Two-way CAN bus interface, using TI's SN65HVD232 chip, the
interface uses 4Pin green terminal blocks.
485 Communication Interface
Two-way 485 communication interface, using MAX3485 chip of MAXIM
company. The interface uses 6Pin green terminal blocks.
MIPI Interface
2 Lane MIPI camera input interfaces, used to connect MIPI camera
module (AN5641).
40-pin Expansion Header
The 40-pin 2.54mm pitch expansion port use for external ALINX
modules (binocular camera, TFT LCD screen, high-speed AD module,
etc.). The expansion port includes 1 channel of 5V power supply, 2
channels of 3.3V power supply, 3 channels of ground, and 34 channels
of IO port.
JTAG debug port
A 10-pin 0.1 spacing standard JTAG ports for FPGA program download
and debugging. Users can debug and download the ZU7EV system
through the XILINX downloader.
Temperature and humidity sensor chip LM75

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On-board temperature and humidity sensor chip LM75, used to detect
the temperature and humidity of the surrounding environment around
the FPGA development board
EEPROM
One EEPROM 24LC04 with I2C interface
Real Time Clock (RTC)
1 built-in RTC real-time clock
LED Lights
5 LEDs, include 1 LED on the core board, 4 LEDs on the carrier board.
There are 1 power indicator and on the core board. There are 1 power
indicator,1 DONE Configuration indicator and 2 user indicators on the
carrier board.
KEYs
3 KEYs, include 1 Rest KEY and 2 User KEYs.