AZZA PT-5IV User manual

PT-5IV
SYSTEM BOARD
( VER. 1.x ) / ( VER. 2.x )
OPERATION MANUAL

PT-5IV SYSTEM BOARD TABLE OF CONTENTS
TABLE OF CONTENTS
Chapter & Section Page
1. INTRODUCTION 1-1
1.1 SYSTEM OVERVIEW 1-1
1.2 FEATURES 1-1
2. SPECIFICATIONS 2-1
3. SYSTEM BOARD LAYOUT 3-1
3.1 PT-5IV VER. 1.x 3-1
4. HARDWARE SETUP 4-1
4.1 UNPACKING 4-1
4.2 HARDWARE CONFIGURATION 4-1
4.2.1 DRAM INSTALLATION 4-1
4.2.2 L2 CACHE MEMORY INSTALLATION 4-2
4.2.3 CONNECTORS 4-3
4.2.4 JUMPERS 4-6
5. AWARD BIOS SETUP 5-1
5.1 GETTING STARDED 5-1
5.2 MAIN MENU 5-2
5.3 CONTROL KEYS 5-2
5.4 STANDARD CMOS SETUP 5-3
5.5 BIOS FEATURES SETUP 5-4
5.6 CHIPSET FEATURES SETUP 5-5
5.7 POWER MANAGEMENT SETUP 5-6
5.8 PNP/PCI CONFIGURATION 5-7
5.9 INTEGRATED PERIPHERALS 5-9
THE OTHER SETUPS 5-10
i

PT-5IV SYSTEM BOARD
TRADEMARKS
All trademarks used in this manual are the property of their respective owners.
NOTE
The "LOAD SETUP DEFAULTS" function loads the default settings directly from
BIOS default table, these default settings are the best-case values that should optimize
system performance and increase system stability . This function will be necessary
when you accept this system board, or the system CMOS data is corrupted.
By pressing "Enter" key, while "LOAD SETUP DEFAULTS" is highlighted, then
presses "Y" and "Enter" key. the SETUP default values will be loaded. (Please refer to
the Chapter 5 AWARD BIOS SETUP procedures in this maulal.)
NOTICE
Information presented in this manual has been carefully checked for reliability;
however, no responsibility is assumed for inaccuracies. The information contained in
this manual is subject to change without notice.
ii

PT-5IV SYSTEM BOARD INTRODUCTION
1. INTRODUCTION
1.1 SYSTEM OVERVIEW
ThePT-5IVPentium PCI Local Bus system board is designed based on the Intel 82430VX PCIset system
chipset and UMC (or SMC, ALI) I/O chipset, which built-in two channels PIO and Bus Master Enhanced PCI
IDE port, one Floppy Disk control port, two high speed Serial ports (UARTs) and one multimode Parallel prot
and also supports IR and USB ports. It is designed to fit a high performance, Pentium 75 MHz to 200 MHz
(ideally) based solution for high-end and true GREEN-PC computer systems.
This system board supports the Peripheral Component Interconnect (PCI) Local Bus standard (PCI Spec. Rev.
2.1 compliant). It not only breaks through the I/O bottlenecks of the traditional ISA main board, but also
provides the performance needs for networking and multi-user environments.
1.2 FEATURES
The PT-5IV system board contains the following features:
Pentium P54C/P54CT/P54CS/P55C, Cyrix 6x86 & AMD 5k86 based, PC/AT compatible
system board with ISA Bus and PCI Local Bus.
Supports the most part of "586" level CPUs designed by Intel, Cyrix and AMD.
Built-in 2 sets voltage regulator circuit to support multi-spec. CPU I/O voltage (includes
Standard, VR and VRE specification) and CPU CORE voltage (+2.5V DC and +2.8V DC).
DRAM Memory : Supports fast page mode (FPM), Extended Data Out (EDO) and SDRAM
(synchronous) memory.
Cache Memory : Supports pipelined burst SRAMs. Cache memory size up to 512KB.
BIOS : Supports Plug and Play BIOS.
IDE ports : Supports two channels PIO and Bus Master Enhanced PCI IDE port, up
to Mode 4 timing, and up to 22 MBytes/s transfer rates.
I/O ports : Supports two high speed serial ports (UARTs), One multimode parallel
port for standard (SPP), enhanced (EPP) and high speed (ECP) modes.
One Floppy Disk Control port.
IR Port (option) : Supports IR (Infrared Rays) functions. Both HPSIR and ASKIR are
supported.
USB Ports : Supports two Universal Serial Bus (USB) ports. (in the future)
Software : MS-DOS, WindowsNT, OS2, XENIX, UNIX, NOVELL, CAD/CAM,
compatibility Windows, Windows 95....etc.
1-1

PT-5IV SYSTEM BOARD SPECIFICATIONS
2. SPECIFICATIONS
CPU
Intel : Pentium processor and OverDrive processor (P54C/P54CS/P54CT/P55C/P55CT)
75/90/100/120/133/150/166 MHz and 180/200 MHz. (ideally)
Cyrix : 6x86-P120+(100MHz) / P133+(110MHz) / P150+(120MHz) / P166+(133MHz).
AMD : 5k86-P75(SSA/5-66)/ P75(SSA/5-75)/ P90(SSA/5-83)/ P90(SSA/5-90)/ P100(SSA/5-100)
CPU VCC
(1). CPU I/O voltage : Supports Standard, VR and VRE specification.
(2). CPU CORE voltage : Supports "egual to CPU I/O voltage", "+2.5V " and "+2.8V" DC
WORD SIZE
Data Path : 8-bit, 16-bit, 32-bit, 64-bit
PC System Chipset
Intel 82430VX PCIset (82437VX, 82438VX, 82371SB)
I/O Chipset
UMC UM8669F (or SMC FDC37C669, or ALI M5113).
System Clock
50/55/60/66.6 MHz adjustable.
Memory
DRAM : Two banks, each bank could be single or double sided, 8MB up to 128 MB.
Supports fast page mode (FPM), Extended Data Out (EDO) and SDRAM
(synchronous) memory. (Using modules 72-pin SIMM x4 and 168-pin DIMM x1).
5 Qword deep merging DRAM write buffer.
SRAM : Two banks, 256/512KB Direct-Mapped wirte back cache memory, supports on-
board 256KB or 512KB pipelined burst SRAM. One SRAM Module Slot for
upgrading to 512KB.
BIOS
AWARD or AMI System BIOS. 128KBx8, Flash ROM. (Plug & Play BIOS)
Expansion Slots
PCI Slots : 32-bit x 3 (All Master/Slave, PCI Spec. Rev. 2.1 Compliant)
ISA Slots : 16-bit x4
IDE Ports
Two channels PIO and Bus Master Enhanced PCI IDE port, maximum could be connected 4
IDE Hard Disk and ATAPI CD-ROM device.
2-1

PT-5IV SYSTEM BOARD SPECIFICATIONS
Super I/O Ports
1. Two high speed NS16C550 compatible serial prots (UARTs).
2. One parallel port, supports SPP/EPP/ECP mode.
3. One Floppy Disk Control port.
IR Port (option)
One HPSIR and ASKIR compatible IR transmission connector (5-pin).
Mouse and Keyboard
Supports PS/2 mouse connector, PS/2 keyboard connector (option) and AT keyboard connector.
USB Ports (in the future)
Two Universal Serial Bus (USB) ports.
DIMENSION
Width & Length : 220 mm x 260 mm.
Height : 3/4 inches with components mounted, but without expansion
boards and cables.
PCB Thickness : 4 layers, 0.05 inches normal.
Weight : 20 ounces.
ENVIRONMENT
Operating Temperature : 10*C to 40*C. (50*F to 104*F)
Required Airflow : 50 linear feet per minute across 80486 CPU.
Storage Temperature : - 40*C to 70*C. (- 40*F to 158*F)
Humidity : 0 to 90% noncondensing.
Altitude : 0 to 10,000 feet.
2-2

PT-5IV SYSTEM BOARD SYSTEM BOARD LAYOUT
3. SYSTEM BOARD LAYOUT
3.1 PT-5IV VER. 1.x
Explanation : All connectors, jumpers and components which marks by a black point on the corner
means the pin-1 side of the connector, jumper and component.
K/B BIOS
PCI 1 PCI 2 PCI 3
SL3
CN2 POWER CON.
CN4
AT K/B
SIMM 4 SIMM 3 SIMM 2 SIMM 1
Intel
82437FX
BAT 1
CPU
SYS. BIOS
CN12 IDE1 CN14 IDE2
CN8 FDCCN7 LPT
COM B
CN9
CN1
PS/2
MS.
CN5
IR
JP16
CN11
U6/U5 TAG
SPEAKER
KEYLOCK
HLTL
SSTS
RS
UMC 669 / Prime 3C
SL2
SL4
JP6 JP12
RTC MODULE
Socket 7
CN6
COM A
U4
Pipeline
Burst
SRAM
32K/64K *32
CN10
PBSRAM MODULE
JP3
JP2
JP15
CN13
USB 2 USB 1
JP4
JP5
DIMM 1
U3
Pipeline
Burst
SRAM
32K/64K *32
Intel
Intel
82438VX
82438VX
SL1
Intel
82371SB
JP13
JP9
JP8 JP10
JP7
JP11
JP1
JP18
3-1

PT-5IV SYSTEM BOARD HARDWARE SETUP
4. HARDWARE SETUP
4.1 UNPACKING
The system board package should contain the following parts :
The PT-5IV system board.
OPERATION MANUAL.
Cable set for IDE and I/O device.
4.2 HARDWARE CONFIGURATION
Before the system board is ready to operate, the hardware must be configured to allow for various functions
within the system. To configure the PT-5IV system board is a simple task, only a few jumpers, connectors,
cables and sockets needs to be selected and installed. (For the detailed locations of each component please refer
to the "system board layout figure" which appears in page 3-1.)
4.2.1 DRAM INSTALLATION
The PT-5IV system board will support two banks main memory (bank0 and bank 1) on board, (using four 72-
Pin SIMM socket, SIMM 1 - 4 and one 168-pin DIMM socket, DIMM 1) each bank could be single-sided or
double-sided, 8MB up to 128 MB of local memory can be attained. Supports standard fast page mode (FPM),
Extended Data Out (EDO) and synchronous (SDRAM) memory.
The usable DRAM modules are : (Note : S = Single-sided , D = Double-sided)
(1)FPM and EDO memory : 1MBx32(36)-S ( 4MB) ,1MBx32(36)-D ( 8MB),
2MBx32(36)-S ( 8MB) , 2MBx32(36)-D (16MB),
4MBx32(36)-S (16MB) , 4MBx32(36)-D (32MB).
(2) SDRAM memory : 1MBx64-S (8MB) , 2MBx64-D (16MB) , 4MBx64-S (32MB).
The speed of FPM DRAMs must be used 70ns or faster than 70ns, the speed of EDO DRAMs and SDRAMs
must be used 60ns or faster than 60ns.
SIMMs' and DIMM's operating voltage :
(1)SIMM1 - SIMM4 : + 5V DC
(2)DIMM1 : +3.3V / +3.4V / +3.5V DC (depends on CPU I/O voltage, refer to page 4-8 )
Bank can be populated in any order (bank 0 does not have to be populated before bank 1). Within any given
bank, the SIMMs (DIMM) must be the same size. Among the two banks, SIMM (DIMM) densities can be
mixed in any order. EDO, FPM and SDRAMs can be mixed between SIMMs (DIMM), a given SIMM (DIMM)
must contain only one type of DRAM. When DRAM types are mixed each SIMM (DIMM) runs optimized for
that particular type of DRAM.
4-1

PT-5IV SYSTEM BOARD HARDWARE SETUP
There is no jumper needed for DRAM configuration, DRAMs' type and size will be detected by system BIOS
automatically.
The following table provides the possable combinations for DRAM memory installation.
Bank 0 Bank 1
SIMM1 and SIMM2 SIMM3 and SIMM4 DIMM1
Single-sided or Double-sided or Empty Single-sided Empty
Single-sided or Double-sided or Empty Double-sided Empty
Single-sided or Double-sided or Empty Empty Single-sided
Single-sided or Double-sided or Empty Empty Double-sided
Note : We strong recommend, Don't install any SIMM module in SIMM3 and SIMM4 when
the DIMM1 is populated 3.3V SDRAM module.
4.2.2 L2 CACHE MEMORY INSTALLATION
The PT-5IV system board will support one or two bank(s) direct-mapped second level cache and provides either
256KB or 512KB cache memory using synchronous pipeline-burst SRAMs. (Note that this system board does
not support asynchronous or burst SRAMs for the cache memory) Both Write Back and Write Through cache
update policy are supported.
If the on-board cache memory size is 256KB, a COAST (Cache-On-A-STick) module (256KB) will be use for
upgrading the cache memory size from 256KB to 512KB. There is no jumper needed for end-user while
upgrade cache memory size, just insert the COAST module into the SRAM module slot (CN10), then the cache
memory size will be detected by system BIOS automatically.
Note : The COAST modules design must comply with Intel COAST (Cache-On-A-STick)
module specification revision 2.0 or later.
The following table lists the detalied combination about cache memory installation.
Cache Data SRAMs Tag SRAMs COAST
Size U3 ,U4 U6 (or U5) SRAM module (CN10)
256 KB 32KB x 32 8KB or 16KB or 32KB x 8Empty
512 KB 32KB x 32 8KB or 16KB or 32KB x 8256 KB (with TAG SRAM)
512 KB 32KB x 32 16KB or 32KB x 8256 KB (without TAG SRAM)
512 KB 64KB x 32 16KB or 32KB x 8Empty
4-2

PT-5IV SYSTEM BOARD HARDWARE SETUP
4.2.3 CONNECTORS
A connector is two or more pins that are used make connections to the system standard accessories (such as
power, mouse, printer,...etc.) The following is a list of connectors on board, as well as descriptions of each
individual connector.
(A) BAT1 Non-Rechargeable battery (Using 3 Vlots Lithium battery : CR2032)
Pin # Assignment
Battery Positive
Ground
(B) CN1 PS/2 Mouse converted connector
Pin # Assignment Pin # Assignment Pin # Assignment
1 Mouse Data 3 Ground 5 Mouse Clock
2 No Connection 4 +5V DC
(C) CN2 Power connector
Pin # Assignment Pin # Assignment Pin # Assignment
1 Power Good 5 Ground 9 -5V DC
2 +5V DC 6 Ground 10 +5V DC
3 +12V DC 7 Ground 11 +5V DC
4 -12V DC 8 Ground 12 +5V DC
(D) CN3 PS/2 Keyboard connector (option)
Pin # Assignment Pin # Assignment Pin # Assignment
1 Keyboard Data 3 Ground 5 Keyboard Clock
2 No Connection 4 +5V DC 6 No Connection
(E) CN4 AT Keyboard connector
Pin # Assignment Pin # Assignment Pin # Assignment
1 Keyboard Clock 3 No Connection 5 +5V DC
2 Keyboard Data 4 Ground
(F) CN5 IR (Infrared Rays) transmission connector
Pin # Assignment Pin # Assignment Pin # Assignment
1 +5V DC 3 IR Receive 5 IR Transmit
2 No Connection 4 Ground
(G) CN6 COM B (Serial Port 2) connector
COM1/2/3/4, selected by BIOS setup, using IRQ3 or 4
1 2 Pin # Assignment Pin # Assignment
 1 DCD (Data Carrier Detect) 2 RD (Received Data)
 3 TD (Transmit Data) 4 DTR (Data Terminal Ready)
 5 Ground 6 DSR (Data Set Ready)
 7 RTS (Request To Send) 8 CTS (Clear To Send)
 9 RI (Ring Indicator) 10 NC (No Connection)
910
4-3

PT-5IV SYSTEM BOARD HARDWARE SETUP
(H) CN7 Parallel Port connector
(Supports SPP/EPP/ECP mode, selected by BIOS setup,using IRQ7 or IRQ5,
ECP using DMA channel 3 or 1)
114 Pin# Assignment Pin # Assignment
 1 STROBE- 14 AUTO FEED-
 2 Data Bit 0 15 ERROR-
 3 Data Bit 1 16 INIT-
 4 Data Bit 2 17 SLCT IN-
 5 Data Bit 3 18 Ground
 6 Data Bit 4 19 Ground
 7 Data Bit 5 20 Ground
 8 Data Bit 6 21 Ground
 9 Data Bit 7 22 Ground
 10 ACK- 23 Ground
 11 BUSY 24 Ground
 12 PE 25 Ground
 13 SLCT 26 N.C. (No Connection)
13 26
(I) CN8 Floppy Disk Control Port connector (Using IRQ6, DMA channel 2)
(J) CN9 COM A (Serial Port 1) connector
COM1/2/3/4, selected by BIOS setup, using IRQ4 or 3
1 2 Pin # Assignment Pin # Assignment
 1 DCD (Data Carrier Detect) 2 RD (Received Data)
 3 TD (Transmit Data) 4 DTR (Data Terminal Ready)
 5 Ground 6 DSR (Data Set Ready)
 7 RTS (Request To Send) 8 CTS (Clear To Send)
 9 RI (Ring Indicator) 10 NC (No Connection)
910
(K) CN10 Pipeline-burst SRAM (COAST) module slot
(L) CN11 USB 1 (Universal Serial Bus port1) connector
(M) CN12 IDE 1 connector (Primary IDE Port, using IRQ14)
(N) CN13 USB 2 (Universal Serial Bus port2) connector
(O) CN14 IDE 2 connector (Secondary IDE Port, using MIRQ0)
(P) RS Reset Button connector
Pin # Assignment Pin1&2 Function
1 Reset Control Open No action
2 Ground Short System Reset
4-4

PT-5IV SYSTEM BOARD HARDWARE SETUP
(Q) HL IDE HDD LED connector
Pin # Assignment
1 Pullup (+5V DC)
2 Signal Pin
(R) TL Turbo LED connector
Pin # Assignment
1 Pullup (+5V DC)
2 Signal Pin
(S) SS External SMI button connector
Pin # Assignment Pin1&2 Function
1 SMI Control Open For normal operation
2 Ground Short To get into Suspend mode
(T) TS Turbo Switch connector (This function is reserved)
Pin # Assignment Pin1&2 Function
1 Turbo Control Open Turbo
2 Ground Short Normal
(U) SPEAKER Speaker connector
Pin # Assignment Pin # Assignmen
1 +5V DC 4 Speaker Data Signal
2 No Connection 5 No Connection
3 No Connection
(V) KEY LOCK Front Panal Power LED & Key-Lock connector
Pin # Assignment
1 Pullup (+5V DC for Power LED)
2 No Connection
3 Ground
4 Keyboard Lock
5 Ground
Explanation : ( For next section : JUMPERS )
open
1-2
1
2-3
1
1
11
short
,
,
4-5

PT-5IV SYSTEM BOARD HARDWARE SETUP
4.2.4 JUMPERS
A jumper is two, three or more pins which may or may not be covered by a plastic connector plug (mini-
jumper). A jumper is used to select different system options. Please make sure all jumpers at correct position
before this system board used.
(A-1) JP4, JP5, JP12, JP13 CPU type selection (For PT-5IV VER. 1.x)
(1) INTEL Pentium / Pentium-MMX CPUs (For PT-5IV VER. 1.x)
CPU Type JP4 JP5 JP12 JP13 Remark
80502-75 short short open open
80502-90 short open open open
80502-100 open open open open
80502-120 short open short open
80502-133 open open short open
80502-150 short open short short
80502-166 / 80503-166 open open short short
80502-180 short open open short
80502-200 / 80503-200 open open open short
80503-233 open open open open
(2) Cyrix 6x86 / 6x86L CPUs (For PT-5IV VER. 1.x)
CPU Type JP4 JP5 JP12 JP13 Remark
6x86 / 6x86L -P120+ short short short open
6x86 / 6x86L -P133+ open short short open
6x86 / 6x86L -P150+ short open short open
6x86 / 6x86L -P166+ open open short open
(3) AMD K5 CPUs (For PT-5IV VER. 1.x)
CPU Type JP4 JP5 JP12 JP13 Remark
AMD-K5-PR75 short short open open
AMD-K5-PR90 short open open open
AMD-K5-PR100 open open open open
AMD-K5-PR120 short open open open
AMD-K5-PR133 open open open open
AMD-K5-PR150 short open short short
AMD-K5-PR166 open open short short
4-6

PT-5IV SYSTEM BOARD HARDWARE SETUP
(B) JP6-JP11, JP18 CPU operating voltage selection
Note : (1). For the detailed CPU-VCC requirement, please inquire of your CPU supplier.
(2). In PT-5IV VER. 1.2, the JP18 is inexistent, you could skip it.
CPU VCC
I/O CORE JP6 JP7 JP8 JP9 JP10 JP11 JP18 Remark
voltage voltage
+ 3.3 V + 3.3 V 2-3 2-3 short open open x 2-3
+ 3.4 V + 3.4 V 2-3 2-3 open short open x 2-3 *
+ 3.5 V + 3.5 V 2-3 2-3 open open short x 2-3
+ 3.3 V + 2.5 V 1-2 1-2 short open open 1-2 1-2
+ 3.4 V + 2.5 V 1-2 1-2 open short open 1-2 1-2 **
+ 3.5 V + 2.5 V 1-2 1-2 open open short 1-2 1-2
+ 3.3 V + 2.8 V 1-2 1-2 short open open 2-3 1-2
+ 3.4 V + 2.8 V 1-2 1-2 open short open 2-3 1-2 ***
+ 3.5 V + 2.8 V 1-2 1-2 open open short 2-3 1-2
Remark :
x : Don't care
* : For the single-VCC required CPUs. (e.g. Intel P54C, Cyrix 6x86, AMD-SSA/5-xxAB?,
AMD-SSA/5-xxAC?, AMD-SSA/5-xxAF? ... etc.)
** : For a part of the dual-VCC required CPUs.
(e.g. Intel P55C-166, Cyrix M2, AMD-SSA/5-xxAK? ... etc.)
*** : For a part of the dual-VCC required CPUs.
(e.g. Intel P55C-200, Cyrix M2, AMD-SSA/5-xxAH?, AMD-SSA/5-xxAJ? ... etc.)
(C) JP15 Clear CMOS button
Pin # Function
open Normal operation
short Clear CMOS (Note : Don't forget to open this jumper after 2-3 seconds)
Note : Depends on different brand-name of RTC IC (U27 or U28), there are two times
to clear CMOS, the following is a list for reference :
(1) while power-on : BENCHMARQ / bq3287AMT, SGS / M48T86,
(2) while power-off : VIA / VT82885N, ODIN / OEC12C885 / OEC12C887A,
DALLAS / DS12887A.
(D) JP16 ROM BIOS Selection
Pin # Function
1-2 For +5V FLASH ROM, EPROM
2-3 For +12V FLASH ROM
(E) JP1-JP3, JP14 (Reserved)
4-7

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
5. AWARD BIOS SETUP
5.1 GETTING STARTED
When the system is first powered on or reset, the BIOS will enter the Power-On Self Test routines ( POST :
Display a copyright message on the screen followed by a diagnostics and initialization procedure.) (If an EGA
or VGA card is installed, the copyright message of the video card maybe displayed on the screen first.) The
BIOS will indicate any error or malfunction by a series of beeps or display the error message on screen.
Normally, the simulate figure 5-1 will display on the screen when the system is powered on.
Fig. 5-1 Initial Power-On screen.
After the POST routines are completed, the following message appears :
" Press DEL to enter SETUP "
To execute the Award BIOS Setup program, press DEL key. The simulate screen in figure 5-2 MAIN MENU
will be displayed at this time.
5-1

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
5.2 MAIN MENU
ROM PCI / ISA BIOS (2A59GXXX)
CMOS SETUP UTILITY
AWARD SOFTWARE, INC.
STANDARD CMOS SETUP SUPERVISOR PASSWORD
BIOS FEATURES SETUP USER PASSWORD
CHIPSET FEATURES SETUP IDE HDD AUTO DETECTION
POWER MANAGEMENT SETUP HDD LOW LEVEL FORMAT
PNP/PCI CONFIGURATION SAVE & EXIT SETUP
INTEGRATED PERIPHERALS EXIT WITHOUT SAVING
LOAD SETUP DEFAULTS
ESC : Quit  : Select Item
F10 : Save & Exit Setup (Shift)F2 : Change Color
Time, Date, Hard Disk Type ...
Fig. 5-2 CMOS SETUP MAIN MENU screen.
5.3 CONTROL KEYS
Listed below is an explanation of the keys displayed at the bottom of the screens accessed through the BIOS
SETUP program :
Arrow Keys : Use the arrow keys to move the cursor to the desired item.
Enter : To Select the desired item.
F1 : Display the help screen for the selected feature.
(Shift)F2 : To change the screen color, total 16 colors.
ESC : Exit to the previous screen.
PgUp(-)/PgDn(+) : To modify the default value of the options for the highlighted feature.
F5 : Retrieves the previous CMOS values from CMOS, only for the current option
page setup menu.
F6 : Loads the BIOS default values from BIOS default table, only for the current
option page setup menu.
F7 : Loads the SETUP default values from BIOS default table, only for the current
option page setup menu.
F10 : Save all changes made to CMOS RAM, only for the MAIN MENU.
5-2

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
The following pages will show the simulate screens of CMOS SETUP, each figure contains the setup items and
the default settings of them. Below each figure may or may not be contained a lists of function description for
commonly used settings. For the other settings' function description you needed, please feel free to contact with
your supplier.
5.4 STANDARD CMOS SETUP
ROM PCI / ISA BIOS (2A59GXXX)
STANDARD CMOS SETUP
AWARD SOFTWARE, INC.
Date (mm : dd : yy) : Fri, May 31 1996
Time (hh : mm : ss) : 11 : 33 : 55
HARD DISKS TYPE SIZE CYLS HEAD PRECOMP LANDZ SECTOR MODE
Primary Master Auto 0 0 0 0 0 0 Auto
Primary Slave Auto 0 0 0 0 0 0 Auto
Secondary Master Auto 0 0 0 0 0 0 Auto
Secondary Slave Auto 0 0 0 0 0 0 Auto
Drive A : 1.44M, 3.5 in.
Drive B : None Base Memory : 640 K
Extended Memory : xxxxxx K
Video : EGA/VGA Other Memory : xxxxxx K
Halt On : All Errors Total Memory : xxxxxx K
ESC : Quit  : Select Item PU/PD/+/- : Modify
F1 : Help (Shift)F2 : Change Color
Fig. 5-3 STANDARD CMOS SETUP screen.
MODE :
For IDE hard disks, this BIOS provides three modes to support both normal size IDE hard disks and also disks
size larger the 528MB:
NORMAL : For IDE hard disks size smaller then 528MB.
LBA : For IDE hard disks size larger then 528MB and up to 8.4GB (Giga Bytes) that use
Logic Block Addressing (LBA) mode.
Large : For IDE hard disks size larger then 528MB that do not use LBA mode.Large mode
is a new specifition which may not be fully supported by all operation systems.
Now it can only be used with the MS-DOS and is uncommon.
Note : Some OSes (like SCO-UNIX) must use "NORMAL" for installation.
5-3

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
5.5 BIOS FEATURES SETUP
ROM PCI / ISA BIOS (2A59GXXX)
BIOS FEATURES SETUP
AWARD SOFTWARE, INC.
Virus Warning : Disabled Video BIOS Shadow : Enabled
CPU Internal Cache : Enabled C8000-CBFFF Shadow : Disabled
External Cache : Enabled CC000-CFFFF Shadow : Disabled
Quick Power On Self Test : Enabled D0000-D3FFF Shadow : Disabled
Boot Sequence : A, C D4000-D7FFF Shadow : Disabled
Swap Floppy Drive : Disabled D8000-DBFFF Shadow : Disabled
Boot Up Floppy Seek : Enabled DC000-DFFFF Shadow : Disabled
Boot Up NumLock Status : On
Boot Up System Speed : High
Gate A20 Option : Fast
Typematic Rate Setting : Disabled
Typematic Rate (Chars/Sec) : 6
Typematic Delay (Msec) : 250
ESC : Quit  : Select Item
Security Option : Setup F1 : Help PU/PD/+/- : Modify
PCI/VGA Palette Snoop : Disabled F5 : Old Values (Shift)F2 : Color
OS Select For DRAM > 64MB : Non-OS2 F6 : Load BIOS Default
F7 : Load Setup Default
Fig. 5-4 BIOS FEATURES SETUP screen.
Virus Warning :
This feature flashes on the screen. During and after the system boots up, any attempt to write to the boot sector
or partition table of the hard disk drive will halt the system and an error message will appear, in the mean time,
you can run anti-virus program to locate the problem. Default values is "Disabled"
Enabled : Activate automatically when the system boots up causing a warning message to appear
when anything attempts to access the boot sector or hard disk partition table.
Disabled : No warning message to appear when anything attempts to access the boot sector or hard
disk partition table.
CPU Internal Cache :
This option enables CPU's internal (L1) cache memory. If you want to use the internal (L1) cache memory and
external (L2) cache memory, this option must be enabled.
External Cache :
This option enables L2 (secondary) external cache memory. If none external cache memory on board you must
set this option to "disabled", otherwise, you can select enabled or disabled.
5-4

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
5.6 CHIPSET FEATURES SETUP
ROM PCI / ISA BIOS (2A59GXXX)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration : Enabled
DRAM Timing : 70 ns
DRAM RAS# Precharge Time : 4
DRAM R/W Leadoff Timing : 6
Fast RAS To CAS Delay : 3
DRAM Read Burst (EDO/FP) : x222/x333
DRAM Write Burst Timing : x333
Fast NA to RAS# Delay CLK : 1
Fast EDO Path Select : Disabled
Refresh RAS# Assertion : 5 CLKs
ISA Clock : PCICLK/4
System BIOS Cacheable : Disabled
Video BIOS Cacheable : Disabled
8 Bit I/O Recovery Time : 1 ESC : Quit  : Select Item
16 Bit I/O Recovery Time : 1 F1 : Help PU/PD/+/- : Modify
Memory Hole At 15M-16M : Disabled F5 : Old Values (Shift)F2 : Color
Peer Concurrency : Enabled F6 : Load BIOS Default
F7 : Load Setup Default
Fig. 5-5 CHIPSET FEATURES SETUP screen.
WARNING : The CHIPSET FEATURES SETUP in this screen are provided so that technical
professionals can modify the Chipset to suit their requirement. If you are not a
technical engineer, do not use this program !
Auto Configuration :
When "Enabled", this parameter automatically enters and locks some of the optimum values for the chipset and
CPU. Otherwise, this parameter allows the values of these parameters could be changed.
DRAM Timing :
When "Auto Configuration" is "Enabled", this parameter provides two suit of the optimum values for the chipset
and CPU, depends on the DRAMs' speed, you can select "70 ns" or "60 ns", but the first value maybe caused
your system more stable.
5-5

PT-5IV SYSTEM BOARD AWARD BIOS SETUP
5.7 POWER MANAGEMENT SETUP
ROM PCI / ISA BIOS (2A59GXXX)
POWER MANAGEMENT SETUP
AWARD SOFTWARE, INC.
Power Management : User Define ** Power Down & Resume Events **
PM Control by APM : Yes IRQ 3 (COM 2) : ON
Video Off Method : Blank Screen IRQ 4 (COM 1) : ON
MODEM Use IRQ : 3 IRQ 5 (LPT 2) : ON
IRQ 6 (Floppy Disk) : ON
Doze Mode : 20 Min IRQ 7 (LPT 1) : ON
Standby Mode : 20 Min IRQ 8 (RTC Alarm) : OFF
Suspend Mode : 20 Min IRQ 9 (IRQ2 Redir) : ON
HDD Power Down : Disable IRQ 10 (Reserved) : OFF
IRQ 11 (Reserved) : ON
** Wake Up Events In Doze & Standby ** IRQ 12 (PS/2 Mouse) : ON
IRQ3 (Wake-Up Event) : ON IRQ 13 (Coprocessor) : ON
IRQ4 (Wake-Up Event) : ON IRQ 14 (Hard Disk) : ON
IRQ8 (Wake-Up Event) : OFF IRQ 15 (Reserved) : OFF
IRQ12 (Wake-Up Event) : ON
ESC : Quit  : Select Item
F1 : Help PU/PD/+/- : Modify
F5 : Old Values (Shift)F2 : Color
F6 : Load BIOS Default
F7 : Load Setup Default
Fig. 5-6 POWER MANAGEMENT SETUP screen.
WARNING : The POWER MANAGEMENT SETUP in this screen are provided so that
technical professionals can modify the Chipset to suit their requirement. If you
are not a technical engineer, do not use this program !
Power Management :
This setting controls the Power Management functions. "User Define" allows the values of all parameters could
be modified. "Min Saving" and "Max Saving" fixed the values of four parameters, including "Doze Mode",
"Standby Mode", "Suspend Mode" and "HDD Power Down".
"Disable" disabled all Power Management functions. Default is "User Define".
5-6