Dtk Ptm-1230c User manual

PTM-1230C

12MHz

Zero-Wait

Mini286

Mainboard

User

Manual

PTM-1230C

12MHz

Zero-Wait

Mini286

Mainboard

User

Manual

ctk

Edition

1.05

1988

Datatech

Enterprises

Co.,

Ltd.

This

manual

and

the

Mini286

mainboard

are

copyrighted

with all

rights

reserved.

Under

the

copyright

laws

neither

this

manual

nor

the

Mini286

mainboard

may

be

copied,

in

whole

or

in

part,

without

the

express

written

consent

of

Datatech

Enterprises

Co.,

Ltd.

Warning

The

following

does

not

apply

to

any

country

where

such

provisions

are

inconsistent with local law:

Reconfiguring

Datatech

makes

no

warranties

with respect to this documentation ei-

ther

express or

implied

and

provides

it

"as

is". This

includes

but

is

not

limited to

any

implied

warranties

of merchantibility

and

fitness for a

par-

ticular

purpose.

The

information

in

this

document

is subject to

change

without

notice.

Datatech

assumes

no

responsibility

for

any

errors

that

may

appear

in

this

document.

To

ensure

the

reliability of

the

computer,

NEVER

reconfigure

the

board

while

the

power

is ON.

IBM

and

IBM

PC/AT

are

registered

trademarks

of

Intemational

Business

Machines Corp.

VTI

is a registered trademark of

VLSI

Technology Inc.

Intel

is

a registered

trademark

of

Intel

Corp.

Landmark

and

Landmark

Speed

Test

are

registered

trademarkS of Landmark Software.

The

typeface

used

in

the

text

of

this

manual

is

12

point

Helvetica

and

is

used

under

licence from

the

Allied

Corporation,

the

owner

of

the

typeface.

If

you

wish

to

reconfigure

the

board

at

any

time,

ensure

that

the

power to

the

system is

turned

OFF

before

changing

any

hardware

settings

such

as

DIP

switches

or

jumpers.

Note

When

you

see

an

error

message

appears

on

the

screen

after

turning

the

power

on,

leave

the

system

switched

on

for

one

or

two

hours

to

recharge

the

battery.

You

can

then

enter

the

system

configuration.

1.

Leave

your

system

switched

on

for

10

to

15

hours.to

completely

recharge

the

battery.

2.

If

you

had

left

the

system

switched

off for

more

than

one

month, follow

step

2

above.

3.

Contents

Introduction..

Features.

******

®*****e****

Board

layout..

Installation..

4-18

Location

of

jumpersS.

RAM

installation...

ROM

installation.

.

SerialVParallel port

settings.

Display

adapter

settings....

One-waitzero-wait

states

..

Panel

indicators

and

switches..

*****

..9

Math

coprocessor

installation...

Power

supply

connector

.....

Battery

connector.

Keyboard

connector.

13

*

..14

*****..

177

.

.....T8

Operation...

Obtaining

12MHz

Turbo

mode..

Setting

default

operation

mode...

Software

switch..

Hardware

switch....

Alternate

use

of

both

switches...

..19-22

***°*.

******

20

.20

*****

*******

22

*********

************.G6

Turbo

LED

and

hardware

switch.

One-wait/zero-wait

option..

************"**

***

.46

2

Technical

information..

.

Microprocessor..

System

timers...

*********

System

interrupts

...

ROM

&RAM

subsystems.

Direct memory

aCcess

..

VO

channel

slots.

Math

coprocessor...

...23-31

......23

26

*****

*******

.27

.....L8

30

******************************************

.31

*****************************"******************"

Application

note.

...32

introduction

The

PTM-1230C

motherboard

is

compatible

with

the

PC/AT. This

means

that

virtually all

the

software

that

is

available

for

the

PC/AT

can

also

be

run

on

a system

you

build

around

the

PTM-1230C

motherboard.

Moreover,

the

same

keyboard

commands

used

on

a

PCIAT

can

also

be

used

on

the

PTM-1230C

motherboard.

For

example,

the

same

combination

of

keystrokes

that

is

used

for

the

software

reset

on

the

PC/AT

may

also

be

used

on

yourPTM-1230C-based

system.

For

this

reason,

the

PTM-1230C

motherboard

is

the

ideal

choice

for

a

person

seeking

affordable

AT-style

power.

The

clear,

well-illustrated

instructions

in

this

manual

ensure

that

even

if

you

are

a

newcomer

to

the

computer

world,

you

will

have

your

system

installed

and

running

with

the

minimum

of

effort.

Note:

Besure

the

jumper

JP1

is

shorted

when

you

install

your system.

Otherewise,

you

have

to

set

up

your

system

configuration

whenever

you

turn

on

your

computer.

1

Features

Board layout

The

illustration

below

will

familiarize

you

with

the

layout

of

the

PTM-1230C

motherboard

and

its

onboard

ports:

80286-12

microprocessor (optional

80287

coproces

sor)

Use

of VTI®'s

PC/AT

compatible

chip

set.

Switchable

between

8MHz

Normal

mode

and

12MHz

Turbo

mode

by

either

a

software

switch

or

a

hardware

Switch.

8MHz

/O

operation

to

keep

compatibility

with

all

existing

add-on

cards.

8MHz

Normal

mode compatible

with

BM PC/AT® and

12MHz Turbo

mode

195%

faster

than

1BM

PCIAT®.

Two

serial

ports

and

one

parallel

port

onboard.

Onboard battery backup

for

CMOS configuration table

and

real-time

clock.

RAM

subsystem

of

512KB,

640KB or

1MB.

RAM

configurations

of

640/384KB.

Eight

expansion

slots.

Sixteen-level

interrupt.

Three-channel

timer

for music

and

time.

Seven-channel

DMA

for

disk

and

special

VO.

32KB legal

DTK

BIOS©

(ADL

certified) developed

by

DATATECH

ENTERPRISES CO.,

LTD.

Four-layer

motherboard.

Speed

test

by

Landmark®

Speed

Test Program.

for

one-wait

state

=

12MHz

for

zero-wait

state

=

15.9MHz

RAM

banks}|ROM

bank

Expansion

Slots

EE

Serial Port

#2

|CN1

| Serial Port #1

CN2

Parallel

Port

CN3

3

Installation

RAM

installation

During

the

course

of

this

section

references

will

be

made

to

jumper

settings,

used

to

configure

the

various

functions

of

the

PTM-1230C

mainboard.

The

following

diagram

shows

the

locations

of all

the

jumpers

that

may

need

to

be

set.

Two

jumpers,

J8

and

J9,

are

used

to

configure RAM

size

on

the

motherboard.

The

two RAM

banks

can

bee

made

to

contain

from 512KB, 640KB

and

up

to

1MB

by

means

of

setting

jumpers

J8

and

J9.

For

the

location of

J8

and

J9,

refer

to

the

illustration

on

page

4.

To

select

the

proper

settings

of

the

jumpers

for

the

RAM

size

that

you want, refer to

the

table below:

J22

J8

J9

RAM

size

HAM

range

address

Short

512/0

RAM

typbe

Bank0

Bankk

000000-07FFFF|

256K

x

18

None

Short

Open

640/0

000000-09FFF

256K

x

18

64Kx

18

Open Short

640/384

100000-1GFFFF

256K

x

18

256Kx

18

00000009FFFF

Open

Not allowed

J19

512/0

stands

for

512KB

base,

OKB

expansion

memory

FFFFFEE

J1

J2

J12

J13

J14 J15 J16

J17

J18

OO00O00

O0000O00o000000

J3

J4 J5

o0oo|00l00|

J7

J8

J9

J10

J11

Location

of

jumpers

4

Serial/Paralel

port

settings

ROM

installation

There

are

two

serial

ports

and

one

parallel port

on

the

PTM-1230C

motherboard.

Before

actually

using

these

ports,

you

should

set

the

jumpers

J13,

J14,

J15,

J16,

J17,

J18

and

J19

correctly.

Refer

to

the

illustrations

on

pagess

3

& 4

to

find

the

port

connectors

and

these

jumpers.

The

following

tables

indicate

the

proper

settings

of

these

jumpers:

To

install

the

ROM chips, refer

to

the

illustration

below

for

the

location of

the

chip

sockets

and

the

ROM

selection

jumper, J22,

on

the

motherboard:

U57

U58

Parallel

port

(CN3))

jumper settings

CN3

J13

J14J19

LPTI

short

short2

short

LPT2

open

|open 3

short

disable

open

short

irrelevant

disable

short

open

irrelevant

Serial

port 1

(CN2)

jumper settings

CN2

J15

J16

COM1

short short

cOM3

0pen|

open

disable

open

short

disable

short

|open

For

selection

and

installation of

the

ROM

BIOS

chips,

refer

to

the

table

below:

Type

of

BIOS

Type

of

ROM

chip

ROM

configuration

J22

Serial

port 2

(CN1)

jumper settings

Other

BIOS

U58-

Low

byte

of

32KB

size

27128

x 2

U57-

High

byte

CN1

J17

J18

COM2

short short

COM4

open|

open

disable

open

short

disable

short

open

DTK

BIOSS

or

any

other

of

64KB

size

|

U58-

Low

byte

27256

x 2

U57-High

byte

1

6

Display

adapter settings

Panel

indicators

and

switches

Jumper

J11

is

used

to

select

the

display adapter.

To

find

jumper

J11

on

the

motherboard,

refer

to

the

illustra-

tion

on

page

4.

To

configure

the

motherboard

for

the

kind of

display

adapter

you

want,

set

jumper

J11

according

to

the

table

below:

How

you

attach

the

mainboard

to

the

case

of

your

system

unit

is

largely

up

to

you. This

is

because

the

PTM-

1230C

Turbo

mainboard

can

be

used

in a

variety

of

80286-type

system

unit

cases.

Under typical conditions, your system

unit

will

have

al

the

indicators

and

switches

shown

below

and

preferably

even

a

reset

switch, a

Turbo

hardware switch

and

a

Turbo

LED.

If

not,

you

can

either

install

a

new

panel

display

or

omit

some

of

these

items

from your

system.

Your

computer

dealer

offers

an

accessory which allows you

to

add

the

two

switches

and

the

LED

to

your system.

Jumper

setting

Primary display attached to

monochrome

display

J11

OOopen

Primary display attached to color

graphics

monitor

adapter

oOshort

One-wait/zero

wait

states

TURBOREBET

888888088888888088088

wwww

Jumper

J6

is

used

to

select

the

zero-wait

and

one-wait

states.

To

find

the

jumper,

refer to

the

illustration

on

page

4.

The

appropriate

settings

are

shown

below:

The

cables

leading

from

this

control

panel

will

be

con-

nected

to

the

appropriate

connectors

on

the

main-

board.

Before

you

attach

the

mainboard

to

the

case,

you

should

connect

these

cables

to

the

mainboard.

The

loca

tions

on

the

mainboard

are

given

in

the

diagrams

on

the

following

pages.

The

pinouts

for

the

keylock

connector,J1,

are

given

in

the

following

table.

Refer

to

it

to

connect

the

keylock

cable

to

the

connector.

Jumper

setting

J6

One-wait

state

operation O0

open

Zero-wait

state

operation OO

short

|

8 9

.Hardware

reset

The

reset

switch

restarts

the

com-

puter

from

the

RAM

test

stage.

If

you

encounter

any

problems

while

using

unfamiliar

software,

you

can

al

ways

restart

from

the

beginning

by

pressing

the

restart

button.

The

reset

connector

is

jumper

J2.

Assignments

LED

power

2 Not

used

Turbo

LED

The

Turbo

LED

indicates

operation

in

Turbo

mode.

The

Turbo

LED

connector

is

jumper

J4.

3

Ground

Turbo

switch

The

Turbo switch changes operation

mode

between

Turbo

and

Normal.

The

Turbo

switch

connector

is

jumper

J5.

4 Keyboard inhibit

5

Ground

Speaker

The

speaker

connector

is

located

at

J3.

The

pinouts

for

the

various

switch

and

indicator

connectors

are

given

on

the

following

page.

Note

that

2

is

not

used

and

therefore

the

corre-

sponding

socket

in

the

cable

connector

has

no wire

lead.

The wire

for

pin 1 can thus easily be identified

and

the

cable

connector

oriented

correctly.

Functions

of

panel

indicators

and

switches

Now

that

you

have

connected

the

panel

indicators

and

switches,

you

should

understand

something

about

their

functions:

Keylock

The

keylock

is

used

to

enable

or

disable

the

keyboard.

By

disabling

the

keyboard,

the

user

ensures

that

anyone

who

does

not

have

a

key

will

be

unableto

use

the computer. Unlocking the keylock

enables

the

keyboard.

The

keylock

connector

is

located

at

J1

as

previously

noted.

Power

LED

The

power

LED

indicates

whether

the

power

isS

on.

10

11

Turbo

LED

jumper

J4

pinouts

Math

coprocessor

installation

The

math

coprocessor

located

at

U45

is

optional.

When

a

80287

coprocessor

is

installed

the

BIOS

will

check

its

presence

automatically.

Setting

any

switch

to

indicate

its

presence

is

unnecessary.

But

choosing

a

proper

80287

for

correct

operation

is

necessary:

Function

1 Select

2

Ground

For

Turbo mode, an 80287-8

(8MHz)

is

required.

Speaker

jumper

J3

pinouts

For

Normalmode, an 80287-6

(6MHz)

is

required.

EEEEL

Function

Data

out

2 5 VDC

3

Ground

5

VDC

EEEEEEEE

Turbo

hardware

jumper

J5

pinouts

Coprocessor

Socket U45

Functlon

2 Select

If

you

install

a

coprocessor,

be

certain

that

it

is

the

correct

one

for

the

clock

speed

in

which

you

intend

to

do

your

processing.

Consult

the

vendor

from

whom

you

purchase

the

chip

if

you

are

in

doubt

as

to

which

one

to

choose.

1 Ground

12

13

Power

supply

Assignments

The

final

step

is

attaching

the

power

supply

cable

to

the

mainboard

at

connector

J21.

Looking from

the

top

of

the

case,

on

the

left

side

of

the

power

supply

are

some

cables.

Find

the

12-pin

plastic

connector

(the

four-pin

connectors

are

for

the

disk

drives

and

hard

disks).

Refer

to

the

picture

below.

Pins

1

and

12

are

numbered

in

the

picture

for

your

convenience.

The

pinout

description

is

on

the

Power

good

2

+5

VDC

3

+12

VDC

-12

VDC

5 Ground

Ground

7 Ground

8

Ground

9

5VDC

10

+5

VDC

11

+5

VDC

RRRAABARAR

12

+5

VDC

15

14

Choosing

a

power

supply

Battery

connector

The

power

supply

provides

a

"power-good"

signal

to

indicate

proper

operation of

the

power

supply.

The

power-

good

signal is a TTL-compatible high level for

normal

op-

eration

or

a low level for fault

conditions.

If

the

power-

good

signal

workS well,

then

the

system

will function

properly.

Otherwise,

the

data

setting

in

CMOS

RAM

will

be

lost.

The

following

list

gives

you

some

guidelines for

choosing

the

right power supply:

Finally,

there

is

battery

connector

J12.

This

is

for

connecting

four

size

"AA"

batteries

lithium battery

(next

to

J12)

to

the

CMOS RAM.

For

its

location,

refer

to

the

illustrations

on

page

4.

The

battery

connector

assignments

are

as

follows:

instead

of

the

circular

Assignments

The

power-good

signal

should

have

a

turn-on

delay

of

at

least

200ms,

but

no

longer

than

500ms

when

the

power

is

on

(This

means

that

the

power-good

signal

goes

to a high level later

than

+5V).

4

Ground

3

Not

used

2 Not

used

The

power-good

signal

goes

to

a

low

level

at

least

100ms

before

+5V falls

below

the

regulation

limits

when

the

power

is

off.

1 6

VDC

16

17

Keyboard

connector

Operation

Having

fastened

the

mothervoard

to

the

case,

it

only

remains

to

attach

the

keyboard.

The

keyboard

connector

is

located

at

the

back

of your

system

unit.

Refer

to

the

illustration below:

The

main

advantage

of

the

PTM-1230C

12MHz

zero

wait

mini-80286

Turbo

mainboard

over

ordinary

PC/AT

mainboards

is

its

dual

clock

system.

This

innovation

makes

it

possible

for

your

computer

to

operate

at

either

of

two

clock

speeds:

8MHz

or

12MHz.

In

the

12MHz

Turbo

mode,

your

computer

will

operate

up

to

195%

faster

than

a

conventional

80286-based

computer.

Another

special

feature

of

the

PTM-1230C

mainboard

is

the zero-wait/one-wait option

in

the Turbo mode.

In

zero

wait,

your

system

will

be

around

195%

faster

than

a

IBM

PC/AT®

computer.

In

one-wait

state,

operation

will

be

around

80%

faste.

DDD

ewwwwws

********

Location

of

keyboard

connector

from

back

panel1

Mode

DRAM

used

Test

Value

8

8 MHz/1 wait

150

ns

8 MHz

8 MHz/0 wait

120

ns

10.3

MHz

The

assignments

for

keyboard

connector

J20

are

as

follows:

12

MHz/

1 wait 120 ns

12

MHz

12

MHz/0 wait

80

ns

15.9

MHz

Assignments

Testing

by

Landmark

Speed

Test Program

Keyboard

clock

To

select

the Normal/Turbo

and

one-wait/zero-wait

options, refer to

the

following instructions:

2

Keyboard

data

Spare

4 Ground

+5

VDC

You

have

now

finished

configuring

and

connecting

the

nainboard

19

Obtaining

12MHz

Turbo

mode

If

defaut

operation

is

in

Turbo

mode,

press

and

hold

down

the

control

<

Ctrl

>

and

alternate

< Alt >

keys

on

the

keyboard while you

press

the

minus

< > key

to

go

to

Normal

mode.

The

Turbo

LED

will

turn

off,

and

the

cursor

will

turn

into

a

box.

To

return

to

Turbo

mode,

press

the

same

keys:

the

Turbo

LED

will

light

and

the

cursor

will

change

into

a

dash.

This

mainboard

supports both a

software

switch

and

a

hardware

switch

for

changes

between

Normal

and

Turbo

modes.

Setting

default

operation

mode

The

Turbo hardware switch,

jumper

J5

(shown

on

page

4),

gives

you

the

choice

of running

the

PTM-1230C

in

either

Normal

or

Turbo

mode

when

the

power

is

on.

For

default

operation:

Hardware

switch

If

you

have

a

hardware

switch

on

your

panel,

connect

it

to

jumper

J5.

More

information

on

this

is

given

in

the

Panel

indicators

and

switches

section.

In

Normal

mode.....

Place

a

jumper

cap

over

J5.

In

Turbo mode

...

Take

the

jumper

cap

off

J5.

Push

the

hardware

switch

on

to

enter

Normal

mode,

and

push

it off

to

enter

Turbo

mode.

NAmnol

Software

switch

Before

using

the

software

switch,

pay

attention

to

whether

default

operation

is

in

Normal

or

Turbo mode.

If

it

is in Normal mode,

do

the

following:

press

and

hold

down

the

control < Ctrl >

and

alternate

< Alt >

keys

on

the

key-

board

while

you

press

the

minus

< >

key.

The

cursor

on

the

screen

will

turn

into a box.

The

Turbo

LED

on

your

panel,

if

you

have

installed

one,

will

light.

For

more

information

on

the

Turbo

LED,

refer

to

the

Panel

indicators

and

switches

section. Now

the

computer

is

in

Turbo

mode.

To

return

to Normal mode,

press

the

same

keys

you

used

to

enter

Turbo

mode.

When you

enter

Normal mode,

the

cursor

will

return

to

the

dash

( form

and

the

Turbo

LED

will

turn

off.

Hardware

switch off

Hardware

switch on

Using

the

hardware

switch

means

that

the

only indica-

tion

of

the

mode

your

computer

is

in will

be

the

Turbo

LED.

It

will

turn

on

in

the

Turbo

mode

and

turn

off in

the

Normal

mode.

The

cursor

will

always

have

the

same

ap

pearance.

20

21

Alternate

use

of

both

switches

Technical

information

Both

the

hardware

and

the

software

switches

may

be

used

alternatively,

but

this

is

not

advised

because

you

may

become

confused

about

the

mode

of

operation.

When

using

both

switches

alternatively,

the

Turbo

LED

will

be

the

only

accurate

indicator

of

the

actual

mode:

the

LED

will

be

on

in

Turbo

mode

and

off in Normal

mode.

Microprocessor

The

80286

is a

high-performance

microprocessor

with

a 16-bit

external

data

path,

up

to

16

megabytes

of

directly

addressable

physical

memory

and

up

to

one

gigabyte

of

virtual

memory

space.

The

operating

speed

of

the

80286

chip

is

8MHz

in

Normal

mode

and

12MHz

in Turbo

mode.

The

80286

operates

in

two

modes:

protected

virtual

address

and

real

address.

Turbo

LED

and

hardware

switch

Most

80286-type

computer

cases

do

not

have

a

Turbo

LED

or

a Turbo

hardware

switch. However, both of

these

items

are

very

useful

as

you probably

can

already

see.

Therefore,

it

is

highly reco

in

your

system

if

you

do

not

already

have

them.

For

more

information,

refer

to

Panel

indicators

and

switches

section.

Virtual

address

mode

nmended

that

you insta

both

The

virtual

address

mode

provides

a

1-gigabyte

virtual

address

space

mapped

onto

a

16

megabyte

physical

ad-

dress

space.

Virtual

address

space

is

larger

than

physical

address

space

and

the

use

of a virtual

address

that

does

not

map

to

a

physical

address

location

will

cause

a

restartable

interrupt.

This

mode

uses

32-bit

pointers

that

consist

of

a

16-bit

selector

and

offset

components.

The

selector

specifies

an

index

into

a

memory-resident

table

and

the

24-bit

base

address

of

the

desired

segment

is

obtained

from

the

memory

table.

A

16-bit

offset

is

added

to

the

segment

base address

to

form

the physical address. The micropro-

cessor

automatically

references

the

tables

whenever

a

segment

register

is

loaded

with

a

selector.

Instructions

that

load

a segment register will

refer

to

the

memory-

based

tables

without

additional

program

support.

The

memory-based

tables

contain

8-byte

values

called

de-

ScriptorS.

One-wait/zero-wait option

The one-wait/zero-wait option is selected

by

jumper J6s

on

the

mainboard.

Be

aware

that

this

option

is

only

available

when

the

computer

is

in

the

Turbo

mode.

For

information

on

how

to

set

the

jumper,

refer

to

One-

wait/zero

wait

states

in

the

installation

section.

22

23

Real

address

mode

System

timers

In

this

mode,

physical

memory

is

a

contiguous

array

of

up

to

1

megabyte.

The

selector

portion of

the

pointer

is

interpreted

as

the

upper

16

bits of a 20-bit

address

and

the

remaining

4 bits

are

set

to

zero.

This

mode

of

opera-

tion

is

compatible

with

the

8088

and

the

8086.

Segments

in

this

mode

are

64KB

in

size

and

may

be

read,

written or

executed.

An

interrupt may OcCur

if

data

operands

or

instructions

attempt

to

wrap

around

the

end

of

a

segment.

In

this

mode,

the

information

contained

in

the

segment

does

not

use

the

full

64KB

and

the

unused

end

of

the

segment

may

be

overlayed

by

another

segment

to

reduce

physical

memory

requirements.

The

system

has

three

programmable

timer/counters

controlled

by

an

Intel

8254-2

timer/counter

chip.

These

are

channels

0

through

2

defined

as

follows:

System

Timer

Tied on.

1.190MHz

OSC.

Channel

0

GATE

0

CLK

IN

0

CLK

OUTO

8259A

IRQ

0.

Channel

1

GATE

1

CLK

IN1

CLK

OUT

1

Request

Refresh

Cycle.

Refresh

Request

Generator

Tied

on.

1.190MHz

OSC.

NOTE:

Channel

1

is

programmed

to

generate

a

15-

microsecond

period signal.

Channel

2

GATE

2

CLK

IN

2

CLK

OUT

2

Tone

Generation

for

Speaker

Controlled

by

bit 0

of

port

hex

61

PPI

bit.

1.190MHz

OSC.

Used

to drive

the

speaker.

The

8254-2

timer/counter

is

treated

by

system

pro-

grams

as

an

arrangement

of

four

programmable

external

VO

ports.

Three

are

treated

as

counters;

the

fourth is a

control

register

for

mode

programming.

24

25

System interrupts

ROM

subsystem

Sixteen

levels

of

system

interrupts

are

provided

by

the

80286

NMI

and

two

8259A

Interrupt

Controller

chips.

The

following

shows

the

interrupt-level

assignments

in

de-

creasing

priority:

The

ROM

subsystem

has

a

32K

by 16-bit

arrangement

consisting

of

two

32K

by

8-bit

ROM/EPROM

modules.

The

odd

and

even

address

codes

reside

in

separate

modules.

The

top

of

the

first

megabyte

and

the

bottom

of

the

last

megabyte

address

space

is

assigned

to ROM

(hex

OFOO00

and

hex FFO000). Parity

checking

is not

done

on

ROM.

Level

Function

DTK

BIOs©

has

been

supported

and

placed

in

this

subsystem.

Microprocessor

NMI

Parity

or

1/0 chennel check

Interrupt controllers

CTLR

1

CTLR

2 RAM

subsystem

Timer output o

Keyboard

(Output

buffer

full)

Interrupt trom

CTLR

2

Realtime clock

interrupt

Software

redirected

to

INT

OAH

(IRQ

2)

IRQ

0

IRQ

1

The

RAM

subsystem

starts

at

address

hex

000000

of

the

16M

address

space.

It

consists

of

either

640KB

or

1MB

of

256K

or

64K by 1-bit

RAM

modules.

Memory

refresh

forces

one

memory

cycle

every

15

microseconds

through

channel

1

of

the

timer/counter.

The

following

functions

are

performed

by

the

RAM

initialization

program:

IRQ

2

IRQE

IRC9

IRQ

10

IRQ

11

IRQ

12

IRQ

13

IRQ

14

IRQ

15

Reserved

Coprocessor

Fixed disk

controller

Write

operation

to

any

memory

location.

Initialize

channel

1 of

the

timer/counter

to

the

rate

generation

mode

(15

microseconds).

Reserved

IRQ

3 Serial port 2

NOTE:

The

memory

can

be

used

only

after

being

accessed

or

refreshed

eight times.

IRQ

4 Serial port 1.

Parallel port 2

Diskette

controller

IRQ

5

IRQ

6

IRQ

7 Parallel port 1

26

27

Direct

memory

access

The

addresses

for

the

page

register

are

as

follows:

Eight

DMA

channels

are

supported

by

the

system.

Two

Intel® 8237-5

DMA

controller chips (four channels

in

each

chip)

are

used.

DMA

channels

are

assigned

as

follows:

Page

Register

/o

Hex

Address

DMA

channel0

0087

DMA

channel

1

0083

CTLR

1

Ch

0

--

Spare

Ch

1 -

SDLC

Ch

2

--

Diskette

Ch

3-

Spare

CTLR 2 DMA

channel

2

0081

Ch

4-

CascadeforCTRL 1

Ch

5-

Spare

Ch

6-

Spare

Ch

7-

Spare

DMA

channel

3

0082

DMA

channel

5

008B

DMA

channel 6

0089

DMA

channel

7

008A

Refresh

008F

DMA

channels

Channels

0

through

3

are

contained

in

DMA

controller

1.

Transfers

of

8-bit data, 8-bit

1/O

adapters

and

8-bit

or

16-bit

system

memory

are

supported

by

these

channels.

Each

of

these

channels

will

transfer

data

in

64KB

blocks

throughout

the

16-megabyte

system

address

space.

Channels

4

through

7

are

contained

in DMA

controller

2.

To

cascade

channels

0

through

3

to

the

microproces-

sor,

use

channel

4.

Transfers

of

16-bit

data

between

16-bit

adapters

and

16-bit

system

memory

are

supported

by

channels

5, 6

and

7.

DMA

channels

5

through

7

will

transfer

data

in

128KB

blocks

throughout

the

16-

megabyte system address space. These channels

will

not

transfer

data

on

odd-byte

boundaries.

Address

generation

for

the

DMA

channels

is

as

follows:

For

DMA

channels

3

through

0

Source

DMA

Page

Registers

8237A

5

Address

A234

A16

A15A0

NOTE:

To

generate

the

addressing signal

"byte

high

enable"

(BHE), invert

address

line AO.

For

DMA

channels 7 through 5

Source

DMA

Page

Registers8237A

5

Address

A234

A17

A16A1

NOTE:

The

BHE

and

AO

addressing signals

are

forced

to

a

logic

0.

DMA

channel

addresses

do

not

increase

or

decrease

through

page

boundaries

(64KB

for

channels

0

through

3

and

128KB

for

channels

5

through

7).

28

29

VO

channel

slots

J10-J14

and

J16

VO

channels

-MEM

CS16-

-1/0

CS16-

IRQ10-

IRQ11-

IRQ12-

IRQ15-

IRO14

-DACKO

DROO

-DACKS

DRQ5

-DACK6

-

DRO6-

-DACK7-

DRO7

+5VDC

-MASTER-

GND

Cifii

SBHE

LA23

.A22

LA21

.A20

A19

A18

LA17

-MEMR

-MEMW

SDO8

SDO9

SD1O

SD1

1

SD12

SD13

SD14

SD15

The

lVO

channel

supports:

Refresh

of

system

memory from

channel,

microproces

sors.

Selection

of

data

accesses

(either 8 bit

or

16

bit).

Interrupts.

24-bit memory

addresses

(16MB).

/O

wait-state

generation.

/O

address

space

hex

100 to

hex

3FF.

Open-bus

structure

(allowing

multiple.microprocessors

to

share

the

system's

resources,

including memory).

DMA

channels.

HD10

C10

HD18

c18IP

Numbering

of

the

l/O

slots

is

as

follows:

Math

coprocessor

1-J8

1/O

channels

The

math

coprocessor

functions

as

an

/O

device

through

VO

port

addresses

hex OF8,

FA

and

0FC.

The

microprocessor

sends

OP

codes

and

operands

to

/O

ports.

The

microprocessor

also

receives

and

stores

results

through

the

same

l/O ports.

The

"busy"

signal

sent

by

the

coprocessor

forces

the

microprocessor

to

wait until

the

coprocessor

is finished executing.

GND

RESET

DRRV

+5VDC

A -1/0

CH

CK

SD7

SD6

SD4

SD3

SD2

SD1

SDO

-/0

CH

RDY

AEN

SA1.

9

8

-5VDC

DRQ2

-12VDC

OWS

+12VDC

GND

-SMEMW

-SMEMR

B10

A10

The

following

describes

the

math

coprocessor

controls:

SAT

-DACK3

DRQ3

-DACK1

DROT

-Refresh

OFO

The latched mathcoprocessor busy signal can be

cleared

with

an

8-bit "Out"

command

to

port FO.

The

coprocessor

will

latch

"busy"

if

it

asserts

its

error

signal.

Data

output

should

be

zero.

SA

SA1

2

He20

420H

SA1

SA11

CLK

R

IRO6

IRQS

IRY4

IRQ3

-DACK2

T/C

BALE

+5

SA9

SA

SA6

SAS

SA4

SA3

SA2

OF1

The

math

coprocessor

will

reset

if

an

8-bit

"Out"

command

is

sent

to

port

F1.

Again,

the

data

output

should

be

zero.

SAT

EHB31

A3H

GND

SAU

30

31

DTK PTM-1230C User manual

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