Epson RX-4803SA/LC Instructions for use

ETM33E-04
Preliminary
Application Manual
Real Time Clock Module
RX-4803SA/LC

NOTICE
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development and/or manufacture of weapon of mass destruction or for other military purposes. You
are also requested that you would not make the products available to any third party who may use
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These products are intended for general use in electronic equipment. When using them in specific
applications that require extremely high reliability, such as the applications stated below, you must
obtain permission from Seiko Epson in advance.
/ Space equipment (artificial satellites, rockets, etc.) / Transportation vehicles and
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equipment / traffic control equipment / and others requiring equivalent reliability.
All brands or product names mentioned herein are trademarks and/or registered trademarks of their
respective.

RX - 4803 SA / LC
Contents
1. Overview........................................................................................................................1
2. Block Diagram...............................................................................................................1
3. Terminal description ......................................................................................................2
3.1. Terminal connections................................................................................................................. 2
3.2. Pin Functions............................................................................................................................. 2
4. Absolute Maximum Ratings...........................................................................................3
5. Recommended Operating Conditions............................................................................3
6. Frequency Characteristics.............................................................................................3
7. Electrical Characteristics ...............................................................................................4
7.1. DC characteristics...................................................................................................................... 4
7.2. AC Characteristics ..................................................................................................................... 5
8. Use Methods .................................................................................................................6
8.1. Description of Registers............................................................................................................. 6
8.1.1. Write / Read and Bank Select....................................................................................... 6
8.1.2. Register table (Bank1).................................................................................................. 6
8.1.3. Register table (Bank2).................................................................................................. 7
8.1.4. Register table (Bank3).................................................................................................. 7
8.2. Details of Registers.................................................................................................................... 8
8.2.1. Clock counter ( 1/100S, SEC - HOUR )......................................................................... 8
8.2.2. Calendar counter ( WEEK - YEAR ).............................................................................. 9
8.2.3. Alarm registers........................................................................................................... 10
8.2.4. Fixed-cycle timer control registers .............................................................................. 10
8.2.5. Extension register....................................................................................................... 10
8.2.6. Flag register............................................................................................................... 11
8.2.7. Control register........................................................................................................... 12
8.2.8. OSC Offset Contorol ( Reg -C / Bank 3 ) ................................................................... 14
8.2.9. Capture Buffer / Event control ( Bank 3 ).................................................................... 15
8.3. Fixed-cycle Timer Interrupt Function ........................................................................................ 16
8.3.1. Diagram of fixed-cycle timer interrupt function............................................................ 16
8.3.2. Related registers for function of time update interrupts................................................ 17
8.3.3. Fixed-cycle timer interrupt interval (example).............................................................. 18
8.3.4. Fixed-cycle timer start timing...................................................................................... 18
8.4. Time Update Interrupt Function................................................................................................ 19
8.4.1. Time update interrupt function diagram ...................................................................... 19
8.4.2. Related registers for time update interrupt functions. .................................................. 20
8.5. Alarm Interrupt Function .......................................................................................................... 21
8.5.1. Diagram of alarm interrupt function ............................................................................ 21
8.5.2. Related registers ........................................................................................................ 22
8.5.3. Examples of alarm settings ........................................................................................ 23
8.6. Read/Write of data................................................................................................................... 24
8.6.1. Write of data .............................................................................................................. 24
8.6.2. Read of data .............................................................................................................. 24
8.7. VDD and CE timing.................................................................................................................. 25
8.8. Backup and Recovery .............................................................................................................. 25
8.9. Connection with Typical Microcontroller.................................................................................... 26
8.10. When used as a clock source (32 kHz-TCXO)........................................................................ 26
8.11. Note about read-out method of a 1/100s register.................................................................... 26
9. External Dimensions / Marking Layout.........................................................................28
10. Application notes.......................................................................................................30

RX - 4803 SA / LC
Page - 1 ETM33E-04
Serial Interface Real-time Clock Module
RX - 4803 SA / LC
•Features built-in 32.768 kHz DTCXO, High Stability.
• Serial interface in 4 lines form
•Alarm interrupt function for day, date, hour, and minute settings
•Fixed-cycle timer interrupt function
•
Time update interrupt function
(Seconds, minutes)
•32.768 kHz output with OE function
(FOE and FOUT pins)
•Auto correction of leap years
(from 2000 to 2099)
•Wide interface voltage range: 1.6 V to 5.5 V
•Wide time-keeping voltage range: 1.6 V to 5.5 V
•
Low current consumption: 0.75µA / 3 V (Typ.)
.
1. Overview
This module is an serial interface real-time clock which includes a 32.768 kHz DTCXO.
In addition to providing a calendar (year, month, date, day, hour, minute, second) function and a clock
counter function, this module provides an abundance of other functions including an alarm function,
fixed-cycle timer function, time update interrupt function, and 32.768 kHz output function.
The devices in this module are fabricated via a C-MOS process for low current consumption, which enables
long-term battery back-up.
All of these many functions are implemented in SOP-14 pin and VSOJ-12 pin package.
2. Block Diagram
32kHz
DTCXO
32.768 kHz
CLOCK
and
CALENDAR
TIMER
REGISTER
ALARM
REGISTER
FOUT
CONTROLLER
CONTROL
REGISTER
and
SYSTEM
CONTROLLER
DIVIDER
INTERRUPT
CONTROLLER
INTERFACE
CIRCUIT
FOUT
FOE
/ INT
CLK
DO
D I
C
E
EVIN

RX - 4803 SA / LC
Page - 2 ETM33E-04
3. Terminal description
3.1. Terminal connections
RX − 4803 SA
1.
CE
14.
D I
2.
CLK
13.
DO
3.
FOUT
12.
T2 (VPP)
4.
N.C.
11.
GND
5.
TEST
10.
/ INT
6.
VDD
9.
EVIN
7.
FOE
8.
N.C.
SOP − 14pin
RX − 4803 LC
1.
N.C.
12.
EVIN
2.
FOE
11.
/ INT
3.
V DD
10.
GND
4.
FOUT
9.
T2 (V PP )
5.
CLK
8.
D O
6.
C E
7.
D I
VSOJ − 12pin
3.2. Pin Functions
Signal
name I/O Function
CE Input
This is the chip enabled input pin. It has a built-in pull-down resistance.
When the CE pin is at the "H" level, access to this RTC becomes possible. Also, when the
chip is not selected, the DO pin is at the high impedance level, and the CLK and DI pins
would not accept input.
CLK Input This is the shift clock input pin for serial data transfer. In the write mode, it takes in data from the DI pin using the CLK signal rise edge.
In the read mode, it outputs data from the DO pin using the fall edge.
D I Input This is the data input pin for serial data transfer.
DO Output This is the data output pin for serial data transfer.
FOUT Output This is the C-MOS output pin with output control provided via the FOE pin.
When FOE = "H" (high level), this pin outputs a 32.768 kHz signal.
When output is stopped, the FOUT pin = "Hi-Z"( high impedance ).
FOE Input This is an input pin used to control the output mode of the FOUT pin. When this pin's level is high, the FOUT pin is in output mode.
When it is low, output via the
FOUT pin is stopped.
/ INT Output This pins is used to output alarm signals, timer signals, time update signals, and other
signals. This pin is an open drain pin.
EVIN Input External event input pin.
VDD −This pin is connected to a positive power supply.
GND −This pin is connected to a ground.
TEST Input Use by the manufacture for testing. ( Do not connect externally.)
T2(VPP) −Use by the manufacture for testing. ( Do not connect externally.)
N.C. −This pin is not connected to the internal IC.
Leave N.C. pins open or connect them to GND or VDD.
Note: Be sure to connect a bypass capacitor rated at least 0.1 μF between VDD and GND.

RX - 4803 SA / LC
Page - 3 ETM33E-04
4. Absolute Maximum Ratings
GND = 0 V
Item Symbol Condition Rating Unit
Supply voltage VDD Between VDD and GND −0.3 to +6.5 V
Input voltage VIN1CE, CLK, DI, FOE, EVIN pin −0.3 to +6.5 V
Output voltage (1) VOUT1DO, FOUT pin GND−0.3 to VDD+0.3 V
Output voltage (2) VOUT2/INT pins GND−0.3 to +6.5 V
Storage temperature TSTG
When stored separately,
without packaging
−55
to +125 °C
5. Recommended Operating Conditions
GND = 0 V
Item Symbol Condition Min. Typ. Max. Unit
Operating supply voltage VDD Interface voltage 1.6 3.0 5.5 V
Temp. compensation
voltage
VTEM
Temperature compensation
voltage
2.2 3.0 5.5 V
Clock supply voltage VCLK −1.6 3.0 5.5 V
Operating temperature TOPR No condensation −40 +25 +85 °C
6. Frequency Characteristics
GND = 0 V
Item Symbol Condition Rating Unit
Frequency stability ∆f / f
U A
Ta= 0 to +50 °C, VDD=3.0 V
Ta=−40 to +85 °C, VDD=3.0 V
±1.9 (∗1)
±3.4 (∗2)
×10−６
U B
Ta= 0 to +50 °C, VDD=3.0 V
Ta=−40 to +85 °C, VDD=3.0 V
±3.8 (∗3)
±5.0 (∗4)
U C
Ta= 0 to +50 °C, VDD=3.0 V
Ta=−30 to +70 °C, VDD=3.0 V
±3.8
(∗3)
±5.0 (∗4)
A A
Ta= +25 °C, VDD=3.0 V
+5±5.0 (∗5)
Frequency/voltage
characteristics
f / V
Ta= +25 °C, VDD=2.2 V to 5.5 V
±1.0 Max. ×10−６/ V
Oscillation start time tSTA Ta= +25 °C, VDD=1.6 V
Ta=−40 to +85 °C, VDD=1.6 V to 5.5 V
1.0 Max.
3.0 Max.
s
Aging fa Ta= +25 °C, VDD=3.0 V, first year ±3 Max.
×10−
６
/
year
*1 ) Equivalent to 5 seconds of month deviation. *2 ) Equivalent to 9 seconds of month deviation.
*3 )Equivalent to 10 seconds of month deviation. *4 ) *5 ) Equivalent to 13 seconds of month deviation. ( excluding offset )

RX - 4803 SA / LC
Page - 4 ETM33E-04
7. Electrical Characteristics
7.1. DC characteristics
*Unless otherwise specified, GND = 0 V , VDD = 1.6 V to 5.5 V , Ta = −40 °C to +85 °C
Item Symbol Condition Min. Typ. Max. Unit
Current
consumption (1) IDD1 CE = GND, /INT = VDD
FOE = GND
FOUT : output OFF ( High Z )
Compensation interval 2.0 s
VDD =5 V
0.75 3.4
µA
Current
consumption (2) IDD2 VDD=3 V
0.75 2.1
Current
consumption (3) IDD3 CE = GND, /INT, FOE = VDD
FOUT : 32 kHz, CL = 0 pF
Compensation interval 2.0 s
VDD=5 V
2.0 7.5
µA
Current
consumption (4)
IDD4 VDD=3 V 1.5 5.0
Current
consumption (5) IDD5 CE = GND, /INT, FOE = VDD
FOUT: 32 kHz, CL = 30 pF
Compensation interval 2.0 s
VDD=5 V
7.0 20.0
µA
Current
consumption (6) IDD6 VDD=3 V
4.5 12.0
Current
consumption (7) IDD7CE = GND, /INT, FOE = GND
FOUT : output OFF ( High Z )
Compensation OFF
VDD=5 V 0.7 2.95
µA
Current
consumption (8) IDD8VDD=3 V
0.7 1.85
Current
consumption (9)
IDD9CE = GND, /INT, FOE = GND
FOUT : output OFF ( High Z )
Compensation ON ( peak )
VDD=5 V 120 900
µA
Current
consumption (10)
IDD10 VDD=3 V 115 350
High-level input
voltage
VIH CE, DI, CLK, FOE, EVIN pins 0.8 ×VDD 5.5 V
Low-level input
voltage
VIL CE, DI, CLK, FOE, EVIN pins GND −0.3 0.2 ×VDD V
High-level
output voltage
VOH1
FOUT, DO pins
VDD=5 V, IOH=−1 mA
4.5
5.0
V
VOH2
VDD=3 V, IOH=−1 mA
2.2
3.0
VOH3
VDD=3 V, IOH=−100 µA
2.9
3.0
Low-level
output voltage
VOL1
FOUT, DO pins
VDD=5 V, IOL=1 mA
GND
GND+0.5
V
VOL2
VDD=3 V, IOL=1 mA
GND
GND+0.8
V
OL3
VDD=3 V, IOL=100 µA
GND
GND+0.1
VOL4
/INT pin
VDD=5 V, IOL=1 mA
GND
GND+0.25
V
VOL5
VDD=3 V, IOL=1 mA
GND
GND+0.4
Input leakage
current
ILK CE, DI, CLK, FOE pins, VIN = VDD or GND −0.5 0.5 µA
Output leakage
current
IOZ /INT, DO, FOUT pins, VOUT = VDD or GND −0.5 0.5 µA
Input resistance RDWN CE pin VDD=5 V 75 150 300 kΩ
VDD=3 V 150 300 600
•Temperature compensation and consumption current
1 ms
I
DD9,10
Compensation interval ( 2.0 s )
I
DD7,8
IDD1,2
Compensation OFF
Average
Compensation ON

RX - 4803 SA / LC
Page - 5 ETM33E-04
7.2. AC Characteristics
* Unless otherwise specified, GND = 0 V , Ta = −40 °C to +85 °C
Item Symbol Condition
2.4V
≤
V
DD <
4.5V
4.5V
≤
V
DD ≤
5.5V
Unit
Min.
Max.
Min.
Max.
CLK clock cycle
t
CLK
500
350
ns
CLK H pulse width tWH 220 155 ns
CLK L pulse width t
WL
220 155 ns
CLK rise and fall time t
RF
60 40 ns
CLK setup time tCLKS 50 25 ns
CE setup time tCS 200 150 ns
CE hold time tCH 200 150 ns
CE recovery time tCR 300 200 ns
CE enable time tWCE 0.95 0.95 s
Write data setup time
t
DS
100
50
ns
Write data hold time tDH 100 50 ns
Read data delay time t
RD
CL=50 pF 200 150 ns
DO output switching time tZR 50 20 ns
DO output disable time tRZ CL=50 pF
RL=10 kΩ200 150 ns
DI/DO conflict avoiding time tZZ 0 0 ns
FOUT duty tW/ t 50% VDD level 40 60 40 60 %
Timing chart
CLK
C E
tCLKS
tWH
tWL
tCH
tCR
•Read
DI
tDS
•Write
tDH
M 3
M 2
A 0
80%
20%
tRF
tRF
DO
D 7
D 6
D 0
Hi-Z
DI
M 3
M 2
A 0
D 7
D 0
tCLK
D 6
DO
Hi-Z
tWCE
tRZ
tZZ
tRD
tZR
tCS
∗If DI and DO pins are wired-OR connected to make it to 3 lines form, secure tzz to avoid bus conflict.

RX - 4803 SA / LC
Page - 6 ETM33E-04
8. Use Methods
8.1. Description of Registers
8.1.1. Write / Read and Bank Select
R/W and Register bank are specified by the four bits mode setting code.
Bank1: Basic time and calendar register … Bank1 is compatible with RX-4801.
Bank2: Extension register… Adds 1/100s Counter.
Bank3: Extension register… Capture buffer and Event control registers.
Mode
Bank 1
Bank 2
Bank 3
Read
9 h
A h
B h
Write
1 h
2 h
3 h
The register of the same name of Bank1 and Bank2 is the same register.
8.1.2. Register table (Bank1)
Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Read Write
0 SEC 40 20 10 8 4 2 1 P P
1 MIN 40 20 10 8 4 2 1 P P
2 HOUR 20 10 8 4 2 1 P P
3 WEEK 6 5 4 3 2 1 0 P P
4 DAY 20 10 8 4 2 1 P P
5 MONTH 10 8 4 2 1 P P
6 YEAR 80 40 20 10 8 4 2 1 P P
7 RAM ••••••••P P
8 MIN Alarm AE 40 20 10 8 4 2 1 P P
9 HOUR Alarm AE •20 10 8 4 2 1 P P
A WEEK Alarm AE 6 5 4 3 2 1 0 P P
DAY Alarm •20 10 8 4 2 1
B Timer Counter 0 128 64 32 16 8 4 2 1 P P
C Timer Counter 1 ••••2048 1024 512 256 P P
D Extension Register TEST WADA USEL TE FSEL1 FSEL0 TSEL1 TSEL0
P P
E Flag Register 

UF TF AF EVF VLF VDET
P P
F Control Register CSEL1 CSEL0 UIE TIE AIE EIE 
RESET
P P
P : Possible , I : Impossible
Note
When after the initial power-up or when the result of read out the VLF bit is "1" , initialize all registers, before
using the module.
Be sure to avoid entering incorrect date and time data, as clock operations are not guaranteed when the data
or time data is incorrect.
∗1)
During the initial power-up, the TEST bit is reset to "0" and the VLF bit is set to "1".
∗At this point, all other register values are undefined, so be sure to perform a reset before using the module.
∗2)
Only a "0" can be written to the UF, TF, AF, VLF, or VDET bit.
∗3)
Any bit marked with "

" should be used with a value of "0" after initialization.
∗4)
Any bit marked with "•" is a RAM bit that can be used to read or write any data.
∗5)
The TEST bit is used by the manufacturer for testing. Be sure to set "0" for this bit when writing.

RX - 4803 SA / LC
Page - 7 ETM33E-04
8.1.3. Register table (Bank2)
Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Read Write
0 1/100 S 80 40 20 10 8 4 2 1 P I
1 SEC 40 20 10 8 4 2 1 P P
2 MIN 40 20 10 8 4 2 1 P P
3 HOUR 20 10 8 4 2 1 P P
4 WEEK 6 5 4 3 2 1 0 P P
5 DAY 20 10 8 4 2 1 P P
6 MONTH 10 8 4 2 1 P P
7 YEAR 80 40 20 10 8 4 2 1 P P
8 MIN Alarm AE 40 20 10 8 4 2 1 P P
9 HOUR Alarm AE •20 10 8 4 2 1 P P
A WEEK Alarm AE 6 5 4 3 2 1 0 P P
DAY Alarm •20 10 8 4 2 1
B Timer Counter 0 128 64 32 16 8 4 2 1 P P
C Timer Counter 1 ••••2048 1024 512 256 P P
D Extension Register TEST WADA USEL TE FSEL1 FSEL0 TSEL1 TSEL0
P P
E Flag Register UF TF AF EVF VLF VDET
P P
F Control Register CSEL1 CSEL0 UIE TIE AIE EIE 
RESET
P P
1/100S Reg. is cleared to "00" by writing in the SEC Reg. or RESET bit and the ERST bit operation.
8.1.4. Register table (Bank3)
Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Read Write
0 1/100 S CP 80 40 20 10 8 4 2 1 P I
1 SEC CP 40 20 10 8 4 2 1 P I
2 −−−−−−−−−−−
3 −−−−−−−−−−−
4 −−−−−−−−−−−
5 −−−−−−−−−−−
6 −−−−−−−−−−−
7 −−−−−−−−−−−
8 −−−−−−−−−−−
9 −−−−−−−−−−−
A −−−−−−−−−−−
B −−−−−−−−−−−
C OSC Offset OFS3 OFS2 OFS1 OFS0
P P
D −−−−−−−−−−−
E −−−−−−−−−−−
F Event Control ECP EHL ET1 ET0 ERST
P P
When an initial power on, frequency offset is ±0 selected by "0000".