Epson RX801SJ Instructions for use

ETM37E-06
Preliminary
Application Manua l
Real Time Clock Module
RX
8010SJ

NOTICE
•This material is subject to change without notice.
•Any part of this material may not be reproduced or duplicated in any form or any means without the
written permission of Seiko Epson.
•The information about applied circuitry, software, usage, etc. written in this material is intended for
reference only. Seiko Epson does not assume any liability for the occurrence of infringing on any
patent or copyright of a third party. This material does not authorize the licensing for any patent or
intellectual copyrights.
•When exporting the products or technology described in this material, you should comply with the
applicable export control laws and regulations and follow the procedures required by such laws and
regulations.
•You are requested not to use the products (and any technical information furnished, if any) for the
development and/or manufacture of weapon of mass destruction or for other military purposes. You
are also requested that you would not make the products available to any third party who may use the
products for such prohibited purposes.
•These products are intended for general use in electronic equipment. When using them in specific
applications that require extremely high reliability, such as the applications stated below, you must
obtain permission from Seiko Epson in advance.
/ Space equipment (artificial satellites, rockets, etc.) / Transportation vehicles and related
(automobiles, aircraft, trains, vessels, etc.) / Medical instruments to sustain life /
Submarine transmitters / Power stations and related / Fire work equipment and security
equipment / traffic control equipment / and others requiring equivalent reliability.
•All brands or product names mentioned herein are trademarks and/or registered trademarks of their
respective.

ETM37E Revision History
Rev No. Date Page Description
ETM37E-01 14.Jul.2013 Release
ETM37E-02 06.Sep.2013 28 Corrected a setting data of Flow chart Ex2
ETM37E-03 13.Sep.2013 1 Changed a 1. Overview.
5 Deleted contents of a 8.1 DC characteristics.
5 Corrected a fCLK to fSCL.
6 Changed a comment of 8.2.1. AC characteristics.
7 Deleted a comment of “Target spec”
7 Deleted a software command of TS sample.
20,21 Corrected a 13.3. Alarm interrupt Function.
28 Corrected a setting data of Flow chart Ex2
ETM37E-04 06.Nov.2013 4 Corrected a Item of 7. Frequency Characteristics
6 Corrected a caution of 8.2.1. AC characteristics(1)
ETM37E-05 13.Dec.2013 12 Changed a 12.2. Register table
34 Corrected a 13.8.7. The example of the communication
wave pattern
ETM37E-06 25.Sep.2014 7,26 Corrected a power-on reset procedure by the software
command.

RX8010 SJ
ETM37E-06
Contents
1. Overview........................................................................................................................1
2. Block Diagram ...............................................................................................................1
3. Terminal description .....................................................................................................2
4. External Dimensions......................................................................................................3
5. Absolute Maximum Ratings...........................................................................................4
6. Recommended Operating Conditions............................................................................4
7. Frequency Characteristics.............................................................................................4
8. Electrical Characteristics ..............................................................................................5
9. Matters that demand special attention on use................................................................7
10. Reference information .................................................................................................9
11. Application notes .......................................................................................................10
12. Overview of Functions and Description of Registers................................................11
12.1. Overview of Functions..................................................................................................................11
12.2. Register table ...............................................................................................................................12
12.3. Description of registers.................................................................................................................13
13. How to use.................................................................................................................15
13.1. Clock calendar explanation ..........................................................................................................15
13.2. Fixed-cycle Timer Interrupt Function............................................................................................15
13.3. Alarm Interrupt Function...............................................................................................................20
13.4. Time Update Interrupt Function....................................................................................................23
13.5. Frequency stop detection function ...............................................................................................25
13.6. FOUT function [clock output function] ..........................................................................................25
13.7. Flow-chart.....................................................................................................................................26
13.8. Reading/Writing Data via the I
2
C Bus Interface ...........................................................................31

RX8010 SJ
Page − 1 ETM37E-06
Low current consumption
SERIAL-INTERFACE REAL TIME CLOCK MODULE
RX8010 SJ
• Built in frequency adjusted 32.768-kHz crystal unit.
• Real-time clock function : Clock/calendar function,Long timer function, alarm interrupt function, etc.
• User RAM : Built in 128 bit RAM
• Frequency output function : 32.768 kHz, 1024 Hz, 1Hz
•Interface type : I
2
C-Bus
• Interface voltage range : 1.6 V∼ 5.5 V
•Timekeeper voltage range : 1.1 V ∼ 5.5 V
• Backup current consumption : 160 nA
Typ
/ 3 V
The I
2
C-Bus is a trademark of NXP Semiconductors.
1. Overview
This is a real-time clock module of the serial interface system that incorporates a 32.768 kHz crystal oscillator.
The real-time clock function incorporates not only a calendar and clock counter for the year, month, day, day of the
week, hour, minute, and second, but also a time alarm, interval timer, and time update interruption, among other
features.
All of these many functions are implemented in a thin, compact SOP package, which makes it suitable for various kinds
of small electronic devices.
2. Block Diagram
INTERRUPTS
CONTROLLER
ALARM REGISTER
/ IRQ1
BUS
INTERFACE
CIRCUIT
CONTROL
REGISTER
and
SYSTEM
CONTROLLER
DIVIDER CLOCK
and
SDA
USER RAM 128 bit
SCL
CALENDR
TIMER REGISTER
ALARM,TIMER,FOUT
BUILT-IN XTAL
( 32.768 kHz)
/ IRQ2
OSC
TIMER, FOUT

RX8010 SJ
Page − 2 ETM37E-06
3. Terminal description
3.1. Terminal connections
.
1.
N.C.
8.
V DD
2.
N.C.
7.
/ IRQ1
3.
/
IRQ2
6.
SCL
4.
GND
5.
SDA
SOP − 8pin
3.2. Pin Functions
Signal
name I/O Function
SCL Input This is a shift clock input pin for serial data transmission.
SDA Input/Output This is the data input/output pin for serial data transfer.
/ IRQ1 Output This pin outputs interrupt signals ("L" level) for alarm, timer, time update, and FOUT.
This is an N-ch open-drain output.
/ IRQ2 Output This pin outputs interrupt signals ("L" level) for timer and FOUT.
This is a C-MOS output.
V DD Supply
This is a power-supply pin.
GND Supply
This pin is connected to a ground.
Note: Input pins are able to input up to 5.5V regardless of V DD applied voltage.
Note: Open drain pins are able to Pull-up to 5.5V regardless of V DD applied voltage.
Note: Connect a bypass capacitor rated at least 0.1µF between power supply pins and GND pin.

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Page − 3 ETM37E-06
4. External Dimensions
4.1. External Dimensions
RX8010SJ (SOP − 8pin )
•External dimensions
Unit : mm
7.0 ± 0.2
6.0 ± 0.2
#5 #8
#1
1.27 0.4
3.9 ± 0.1
#4
0.6
0.22
0°- 8°
2.65 Max.

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Page − 4 ETM37E-06
5. Absolute Maximum Ratings
GND =0V
Item Symbol Condition Rating Unit
Supply voltage V DD Between V DD and GND −0.3
∼
+6.5 V
Input voltage V IN SCL,SDA −0.3
∼
+6.5 V
Output voltage 1 V OUT1 /IRQ2 −0.3
∼
V DD +0.3 V
Output voltage 2 V OUT2 SDA, /IRQ1
−0.3 ∼
+6.5 V
Storage temperature T STG
When stored separately,
without packaging
−55
to +125 °C
6
.
Recommended Operating
*Unless otherwise specified, GND =0V,Ta =−40 °Cto +85 °C
Item Symbol Condition Min. Typ. Max. Unit
Operating supply voltage V ACC - 1.6 3.0 5.5 V
Clock supply voltage V CLK - 1.1 3.0 5.5 V
Low voltage detection V LOW - 1.10 V
Applied voltage when OFF V PUP SDA, /IRQ1pin 5.5 V
Operating temperature T OPR No condensation −40 +25 +85 °C
∗Minimum value of Clock supply voltage V CLK is the timekeeping continuation lower limit value that initialized RX8010 in operating
supply voltage V ACC .
7. Frequency Characteristics
*Unless otherwise specified, GND =0V,Ta =−40 °Cto +85 °C
Item Symbol Condition Min. Typ. Max. Unit
Output frequency fo 32.768
(Typ. )
kHz
Frequency stability
∆ f/f Ta =+25 °C
V DD =3.0 V 5± 23
(∗1)
× 10
−6
Frequency/voltage
characteristics f/V Ta =+25 °C
V DD =1.2 V ∼ 5.5 V −2 +2 × 10
−6
/V
Frequency/temperatur
e characteristics Top Ta =−20 °C∼ +70 °C
V DD =3.0 V;+25 °C reference −120 +10 × 10
−6
Oscillation start time t STA
Ta =±0°C∼ +50 °C
V DD =1.6 V ∼ 5.5 V 1.0 s
Ta =−40 °C∼ +85 °C
V DD =1.6 V ∼ 5.5 V 3.0 s
Aging fa Ta =+25 °C,V
DD =3.0 V;first year −5 +5 × 10
−6
/year
∗1 )
The monthly error is equal to one minute. ( excluding offset )

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Page − 5 ETM37E-06
8. Electrical Characteristics
8.1. DC characteristics
*Unless otherwise specified, GND =0V,Ta =−40 °Cto +85 °C
8.1.1. DC characteristics (1)
* Unless otherwise specified, GND = 0V,V DD =1.6 V∼ 5.5 V,Ta =−40 ° C ∼ +85 ° C
Item Symbol Condition Min. Typ. Max. Unit
Current
consumption (1)
I DD1 Input pins are "L"
f SCL = 0 Hz, /IRQ1,2 = OFF
TSEL2=”1”
V DD =5V
350
nA
Current
consumption (2)
I DD2 V DD =3V
160 320
nA
Current
consumption (3)
I DD3 f
SCL = 0 Hz, /IRQ2 =OFF,
/IRQ1 :32.768 kHz ON
V DD =5V 0.60 1.10 µA
Current
consumption (4)
I DD4 V
DD =3V 0.52 0.90
Current
consumption (5)
I DD5 f
SCL = 0 Hz, /IRQ1 =OFF,
/IRQ2 :1024 Hz ON ,
C L =15 pF
V DD =5V 0.45 1.10 µA
Current
consumption (6)
I DD6 V
DD =3V 0.40 0.90
High-level
input voltage V
IH SCL,SDA pin 0.8 ×V
DD
5.5 V
Low-level
input voltage V
IL SCL, SDA pin GND −0.3 0.2 ×V
DD
V
High-level
output voltage
V OH1 /IRQ2 pin V
DD =5 V, I OH =−1 mA 4.5 5.0 V
V OH2 V
DD =3 V, I OH =−0.5 mA
2.7 3.0
Low-level
output voltage
V OL1 /IRQ2 pin V DD =5 V, I OL =1 mA GND GND +0.5
V
V OL2 V DD =3 V, I OL =0.5 mA GND GND +0.3
V OL4 /IRQ1 pin V DD =5 V, I OL =1 mA GND GND
+0.25 V
V OL5 V DD =3 V, I OL =1 mA GND GND +0.4
Input
leakage current
I LK Input pin, V
IN =V DD or GND −0.1 0.1 µA
Onput
leakage current
I OZ Input pin, V
OUT =V DD or GND −0.1 0.1 µA

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Page − 6 ETM37E-06
8.2. AC characteristics
8.2.1. AC characteristics(1)
* Unless otherwise specified, GND = 0V,V DD =1.6 V∼ 5.5 V,Ta =−40 ° C ∼ +85 ° C
Item Symbol
Standard-Mode
(f SCL =100kHz) Fast-Mode (f SCL =400kHz) Unit
Min. Max. Min. Max.
SCL clock frequency f
SCL 100 400 kHz
Start condition setup time t
SU;STA 4.7 0.6 µs
Start condition hold time t
HD;STA 4.0 0.6 µs
Data setup time t
SU;DAT 250 100 ns
Data hold time t
HD;DAT 0 0 ns
Stop condition setup time t
SU;STO 4.0 0.6 µs
Bus idle time between
start condition and stop condition t
BUF 4.7 1.3 µs
Time when SCL = "L" t
LOW 4.7 1.3 µs
Time when SCL = "H" t
HIGH 4.0 0.6 µs
Rise time for SCL and SDA t
r 1.0 0.3 µs
Fall time for SCL and SDA t
f 0.3 0.3 µs
Allowable spike time on bus t SP 50 50 ns
• Timing chart
t
HD ; DAT
t
SU ; DAT
t
HD ; STA
t
LOW
t
HIGH
1/ f
SCL
t r t f
t
SU ; STA
SDA
SCL
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
ACK
(A)
Protocol
t
BUF
t
SU ; STO
STOP
CONDITION
(P)
START
CONDITION
(S)
(P)
(A)
t
HD ; STA
t
SU ; STA
(S)
BIT 0
LSB
(R/W)
(S)
t
SP
Caution: When communication of I
2
C-bus is started, consumption electric currents increase.
When accessing this device, all communication from transmitting the start condition to transmitting the stop
condition after access should be completed within 0.95 seconds.
If such communication requires 0.95 seconds or longer, the I
2
C bus interface is reset by the internal bus
timeout function.
8.2.2. AC characteristics (2)
* Unless otherwise specified, GND = 0V,V DD =1.6 V∼ 5.5 V,Ta =−40 ° C ∼ +85 ° C
Item Symbol Condition Min. Typ. Max. Unit
FOUT symmetry (/IRQ2) SYM 50% V DD Level 40 50 60 %

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Page − 7 ETM37E-06
9. Matters that demand special attention on use
9.1. Instructions in the power on
9.1.1. Characteristic for the fluctuation of the power supply
∗tR1 is restrictions to validate power-on reset. When cannot keep this standard, power-on reset does not work
normally. It is necessary to initial setting by the software command.
Repeated ON/OFF of the power supply in short term, the power-on reset becomes unstable.
After power-OFF, keep a state of VDD=GND more than 60 seconds to validate power-on reset.
When it is impossible, please perform initial setting by the software command.
VDD
V CLK
GND
Power supply
V
DD
tR1
Backup mode
tCL
tCU
IF
Access is possible
Access is
possible
Access is
im
possible
Item Symbol Condition Min. Typ. Max. Unit
Power supply
rise time tR1
GND – VDD 1 - 100 µs / V
access wait time
(Initial power on) tCL
- 40 - - ms
access wait time
( Normal power on) tCU
- 40 - - ms
A power-on reset procedure by the software command
1) Power- on
2) Wait: At least 40ms.
3) Dummy read. ∗1
4) Check VLF bit = “1”
5) Write 00[h] Address:Reg-1F[h]
6) Write 80[h] Address:Reg-1F[h]
7) Write D3[h] Address:Reg-60[h]
8) Write 03[h] Address:Reg-66[h]
9) Write 02[h] Address:Reg-6B[h]
10) Write 01[h] Address:Reg-6B[h]
11) Wait: At least 2ms *2
END
A disappearance of the FOUT output when the voltage sharply went up and down.
For example, V DD voltage of the RX8010 is come and go between Main power and backup battery.
The clock output from output pins disappears then during several milli-seconds when a sharp
voltage change happens.
Please check that there is not a problem by this characteristic on your system.
An reference example of a power up and down timing without affect to FOUT.
Valid V
DD
voltage range
for using FOUT.
tF
FOUT Please make speed to descend of a power supply voltage loose than 4 ms/V.
tR FOUT Please make speed to rise of a power supply voltage loose than 4 ms/V.
5.5V
1.6 V
tF
FOUT
tR FOUT
∗1 Dummy read
The location of the address is arbitrary.
Do not check ACK/NACK from RX8010.
∗2 Wait: At least 2ms
This wait time is necessary before transmitting
the command for clearing VLF bit after software
command transmission.

RX8010 SJ
Page − 8 ETM37E-06
9.2. Restrictions on Access Operations during Power-on Initialization and Recovery from Backup
• RTC-register operations are linked to the internal quartz oscillator's clock signal, so normal operation is not
possible if there is no internal oscillation (= oscillation is stopped).
Therefore, we recommend that the initial setting to be set during power-on initialization or backup and restore
operations (i.e., when the power supply voltage is recovered after oscillation has stopped due to a voltage drop,
etc.) should be "first start internal oscillation, then wait for the oscillation stabilization time (see tSTA standard) to
elapse".
• Note the following caution points concerning access operations during power-on initialization or when restoring the
power supply voltage from backup mode (here after referred to as "switching to the operating voltage").
1) Before switching to the operating voltage, read the VLF-bit (which indicates the RTC error status).
2) Initialization is required when the value read from the VLF-bit is "VLF =1(error status)".
Before initializing in response to this VLF ="1" result, we recommend first waiting for the internal oscillation
stabilization time (see the tSTA standard) to elapse.
Initialization is required when the status after reading a VLF-bit value of "1" is either of the following.
(Status 1) During power-on initialization
(Status 2) When the clock setting is invalid, such as due to a voltage drop during backup
∗Access timing during power-on initialization and when recovering the power supply voltage after a drop in the
voltage used to maintain the clock
V DD Oscillation start voltage [v]
Internal oscillation
(illustration)
t STA [s]
Oscillation start time
(internal oscillation wait time)
• Normal access is enabled
• Normal operation is enabled
Minimum voltage for clock maintenance V CLK
( Min. )
[V]
During power-on initialization or power supply
voltage recovery after drop in clock maintenance
voltage
4
0
[
ms
]
Note: After
4
0 (ms) has elapsed, access is enabled.
However, access guarantee range is address 20h
∼2Fh.

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Page − 9 ETM37E-06
10. Reference information
10.1. Reference Data
(1) Example of frequency and temperature characteristics
-150
-100
-50
0
-50 0 50 100
Temperature [°C]
Frequency
∆
f
T
×
10
-6
θ T = +25 °C Typ.
α= -0.035 ×10
-6
Typ.
[Finding the frequency stability ]
1. Frequency and temperature characteristics can be
approximated using the following equations.
∆f
T
=α (θ
T
− θ
X
)
2
∆f
T
: Frequency deviation in any temperature
α [1/°C
2
]: Coefficient of secondary temperature
(−0.035 ± 0.005 )× 10
−6
/°C
2
θ
T
[°C]: Ultimate temperature (+25 ± 5°C)
θ
X
[°C]: Any temperature
2. To determine overall clock accuracy, add the
frequency precision and voltage characteristics.
∆f/f =∆f/fo +∆f
T
+∆f
V
∆f/f : Clock accuracy (stable frequency)
in any temperature and voltage.
∆f/fo : Frequency precision
∆f
T
: Frequency deviation in any temperature.
∆f
V
: Frequency deviation in any voltage.
3. How to find the date difference
Date Difference = ∆f/f ×86400(Sec)
∗ For example: ∆f/f = 11.574 × 10
-6
is an error of
approximately 1 second/day.

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Page − 10 ETM37E-06
11. Application notes
1) Notes on handling
This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling.
(1) Static electricity
While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by
a large discharge of static electricity. Containers used for packing and transport should be constructed of conductive materials.
In addition, only soldering irons, measurement circuits, and other such devices which do not leak high voltage should be used
with this module, which should also be grounded when such devices are being used.
(2) Noise
If a signal with excessive external noise is applied to the power supply or input pins, the device may malfunction or "latch up."
In order to ensure stable operation, connect a filter capacitor (preferably ceramic) of greater that 0.1 µF as close as possible
to the power supply pins. Also, avoid placing any device that generates high level of electronic noise near this module.
(3) Voltage levels of input pins
When the input pins are at the mid-level, this will cause increased current consumption and a reduced noise margin, and can
impair the functioning of the device. Therefore, try as much as possible to apply the voltage level close to VIO or GND.
2) Notes on packaging
(1) Soldering heat resistance.
If the temperature within the package exceeds +260 °C, the characteristics of the crystal oscillator will be degraded and it may
be damaged. The reflow conditions within our reflow profile is recommended. Therefore, always check the mounting
temperature and time before mounting this device. Also, check again if the mounting conditions are later changed.
* See Fig. 1 profile for our evaluation of Soldering heat resistance for reference.
(2) Mounting equipment
While this module can be used with general-purpose mounting equipment, the internal crystal oscillator may be damaged in
some circumstances, depending on the equipment and conditions. Therefore, be sure to check this. In addition, if the
mounting conditions are later changed, the same check should be performed again.
(3) Ultrasonic cleaning
Depending on the usage conditions, there is a possibility that the crystal oscillator will be damaged by resonance during
ultrasonic cleaning. Since the conditions under which ultrasonic cleaning is carried out (the type of cleaner, power level, time,
state of the inside of the cleaning vessel, etc.) vary widely, this device is not warranted against damage during ultrasonic
cleaning.
(4) Mounting orientation
This device can be damaged if it is mounted in the wrong orientation. Always confirm the orientation of the device before
mounting.
(5) Leakage between pins
Leakage between pins may occur if the power is turned on while the device has condensation or dirt on it. Make sure the
device is dry and clean before supplying power to it.
Fig. 1 : Reference profile for our evaluation of Soldering heat resistance.
0
50
100
150
200
250
300
60 120 180 240 300 360 420 480 540 600 660 720 780
Time[s]
Temperature[℃]
Time +25 ℃ to Peak
Ts min : +150
℃
Ramp-up rate
+3 ℃/s Max.
Ts max : +200
℃
TL : +217 ℃
+
255 ℃
TP : +260 ℃ Over
60 sto150 s
(+217 ℃
60 sto120 s
(+150 ℃ to +200 ℃)
tp: at least 30s
Ramp-down rate
-
6
℃
/
s Max
ｔＬ
ｔｓ

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Page − 11 ETM37E-06
12. Overview of Functions and Description of Registers
Note:
The initialization of the register is necessary about the unused function and Reserved bit
12.1. Overview of Functions
1) Clock functions
This function is used to set and read out month, day, hour, date, minute, second, and year (last two digits) data.
Any (two-digit) year that is a multiple of 4 is treated as a leap year and calculated automatically as such until the
year 2099.
At the time of a communication start, the Clock & Calendar data are fixed (hold the carry operation), and it is
automatically revised at the time of the communication end.
2) Fixed-cycle Timer Interrupt function
The fixed-cycle timer interrupt function generates an interrupt event periodically at any fixed cycle set between
244.14 µsand 65535 hours.
When an interrupt event is generated, the /IRQ2 pin goes to low level ("L") and "1" is set to the TF bit to report
that an event has occurred.
3) Long-Timer function
It is able to use fixed cycle timer interrupt function as Long-Timer that deals with for approx. 15 years.
4) Alarm interrupt function
The alarm interrupt function generates interrupt events for alarm settings such as date, day, hour, and minute
settings. When an interrupt event occurs, the AF bit value is set to "1" and the /IRQ1 pin goes to low level to
indicate that an event has occurred.
5) Time Update Interrupt Function
The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to
the timing of the internal clock. When an interrupt event is generated, the /IRQ1 pin goes to low level ("L") and "1"
is set to the UF bit to report that an event has occurred.
6) Frequency stop detection function (VLF-bit)
This flag bit indicates the retained status of clock operations or internal data. Its value changes from "0" to "1"
when data loss occurs, such as due to a supply voltage drop.
7) Clock output function
A clock with the same frequency (32.768 kHz) as the built-in crystal resonator can be output from the
/IRQ1, /IRQ2 pin.
8) User RAM
RAM register is read/write accessible for any data.

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Page − 12 ETM37E-06
12.2. Register table
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
10 SEC

40 20 10 8 4 2 1
11 MIN

40 20 10 8 4 2 1
12 HOUR
  20 10 8 4 2 1
13 WEEK

6 5 4 3 2 1 0
14 DAY
 
20 10 8 4 2 1
15 MONTH
   10 8 4 2 1
16 YEAR 80 40 20 10 8 4 2 1
17 Reserved
- - - - - - - -
Setting data 1 1 0 1 1 0 0 0
18 MIN Alarm AE 40 20 10 8 4 2 1
19 HOUR Alarm AE •20 10 8 4 2 1
1A WEEK Alarm AE 6 5 4 3 2 1 0
DAY Alarm •20 10 8 4 2 1
1B Timer Counter 0 128 64 32 16 8 4 2 1
1C Timer Counter 1 32768
16384 8192 4096 2048 1024 512 256
1D Extension Register FSEL1
FSEL0 USEL TE WADA TSEL2 TSEL1 TSEL0
1E Flag Register
  UF TF AF  VLF 
1F Control Register TEST
STOP UIE TIE AIE TSTP
--
Setting data 0
STOP UIE TIE AIE TSTP
0 0
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
20
|
2F
RAM
User Register
128 bit ( 16 word x 8 bit )
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
30
Reserved
- - - - - - - -
Setting data 0 0 0 0 0 0 0 0
31
Reserved
  
- - - - -
Setting data 0 0 0 0 1 0 0 0
32 IRQ Control
 -
- -
 TMPIN
FOPIN1 FOPIN0
Setting data 0 0 0 0 0
TMPIN FOPIN1 FOPIN0
Note During the initial power-on (from 0 V) and if the value of the VLF bit is "1" when the VLF bit is read, be sure to
initialize all registers before using them.
When doing this, be careful to avoid setting incorrect data as the date or time, as timed operations cannot be
guaranteed if incorrect date or time data has been set.
∗1. During the initial power-on (from 0 V), the power-on reset function sets "1" to the VLF bit.
∗Since the value of other registers is undefined at this time, be sure to reset all registers before using them.
∗2. The TEST, bit are Epson test bits.
∗Be sure to write "0" by initializing before using the clock module. Afterward, be sure to set "0" when writing.
∗The four TEST* bits are undefined when read. Those bits should be masked after being read.
∗3. The '  ' mark indicates a write-prohibited bit, which returns a "0" when read.
∗4. The ' • ' mark indicates a read/write-accessible RAM bit for any data.
∗5. The '-' mark is a Reserved bit. It is necessary to write in Setting data at the time of initialization.
∗6. User Register is a free register.

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12.3. Description of registers
12.3.1. Clock and calender counter (Reg -10[h] ∼ 16[h] )
This is counter registers from a second to year.
∗Please refer to [13.1 Clock calendar explanation ] for the details.
12.3.2. RAM registers (Reg -20[h] ∼ 2F[h] )
This RAM register is read/write accessible for any data in the range from 00 h to FF h.
12.3.3. Alarm registers (Reg -18[h] ∼ 1A[h] )
The alarm interrupt function is used, along with the AE, AF, and WADA bits, to set alarms for specified date, day,
hour, and minute values.
∗Please refer to [13.3. Alarm Interrupt Function ] for the details.
12.3.4. Timer setting and Timer counter register (Reg -1B[h] ∼ 1C[h] )
This register is used to set the default (preset) value for the counter.
To use the fixed-cycle timer interrupt function,TE, TF, TIE, TSEL2,TSEL1, TSEL0,TMPIN bits are
set and used. When the fixed-cycle timer interrupt function is not being used, the fixed-cycle timer control register
can be used as a RAM register. In such cases, stop the fixed-cycle timer function by writing "0" to the TE and
TIE bits.
∗Please refer to [13.2. Fixed-cycle Timer Interrupt Function ] for the details.
12.3.5. Function-related register 1 (Reg -1D[h] ∼ 1F[h] )
1) FSEL1, FSEL0 bit
A combination of the FSEL1 and FSEL0 bits is used to select the frequency to be output.
The choice is possible by a combination of FSEL-bits select the frequency of clock output or inhibits the
clock output.
∗Please refer to [13.6. FOUT Function ] for the details.
2) USEL , UF, UIE bit
This bit is used to specify either "second update" or "minute update" as the update generation timing of
the time update interrupt function.
∗Please refer to [13.4. Update interrupt function] for the details.
3) TE, TF, TIE, TSEL2, TSEL1, TSEL0, TSTP bit
These bits are used to control operation of the fixed-cycle timer interrupt function.
4) WADA, AF, AIE bit
These bits are used to control operation of the alarm interrupt function.
5) TEST bit
Those bits are the manufacturer's test bit. Always leave this bit value as "0" except when testing.
6) VLF bit
This flag bit indicates the retained status of clock operations or internal data. Its value changes from "0" to
"1" when data loss occurs, such as due to a supply voltage drop.
∗Please refer to [13.5. Frequency stop detection function ] for the details.
7) STOP bit
This bit is to stop a timekeeping operation. In the case of “STOP bit = 1", working is as follows a function .
∗ 1) All the update of timekeeping and the calendar operation stops.
With it, an update interrupt event does not occur at an alarm interrupt and the time.
∗ 2) The part of the fixed-cycle timer interrupt function stops.
A count stops the source clock setting of the timer in case of "64Hz, 1Hz, 1min, 1h".
∗ 3) Note 3: The effect of STOP bit to FOUT functions.
When STOP = "1", 32768Hz output is possible.
But 1Hz and 1024Hz output is disabled.

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12.3.6. Function-related register 2 (Reg -30[h] ∼ 32[h] )
1)FOPIN1,FOPIN0 bit
This bit selects destination (/IRQ1 or /IRQ2) of FOUT.
2)TMPIN bit
This bit selects destination (/IRQ1 or /IRQ2) of fixed-cycle timer function.
12.3.7. Reservedbit
The ' -' mark has to write in specified fixed value in the case of initialization by all means.
Writing data as follows.
Address [h]
Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
17 Reserved
- - - - - - - -
Setting data 1 1 0 1 1 0 0 0
1F Control Register TEST
STOP UIE TIE AIE TSTP - -
Setting data 0
STOP UIE TIE AIE TSTP
0 0
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
30
Reserved
- - - - - - - -
Setting data 0 0 0 0 0 0 0 0
31
Reserved
   -
- - - -
Setting data 0 0 0 0 1 0 0 0
32 IRQ Control
 -
- -
 TMPIN
FOPIN1 FOPIN0
Setting data
0 0 0 0 0
TMPIN FOPIN1 FOPIN0
The '  ' mark indicates a write-prohibited bit, which returns a "0" when read.

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13. How to use
13.1. Clock calendar explanation
At the time of a communication start, the Clock & Calendar data are fixed (hold the carry operation), and it is
automatically revised at the time of the communication end. Therefore it recommends that the access to a clock
calendar has continuous access by the auto increment function.
Setting example: Sun, 29-Feb-88 17:39:45 (leap year)
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
10 SEC
0 1 0 0 0 1 0 1
11 MIN
0 0 1 1 1 0 0 1
12 HOUR
0 0 0 1 0 1 1 1
13 WEEK
0 0 0 0 0 0 0 1
14 DAY
0 0 1 0 1 0 0 1
15 MONTH
0 0 0 0 0 0 1 0
16 YEAR
1 0 0 0 1 0 0 0
∗ Note with caution that writing non-existent time data may interfere with normal operation of the clock counter.
13.1.1. Clock counter
1) [ SEC ][MIN ]register
These registers are 60-base BCD counters. These registers are incremented at the timing when carry is
generated from a lower register. At the timing when the lower register changes from 59 to 00, carry
is generated to the higher register and thus incremented.
When writing is performed to [SEC] register, Internal-count-down-chain less than one second (512Hz ∼ 1Hz )
is cleared to 0.
2) [ HOUR ]register
This register is a 24-base BCD counter (24 hour format).These registers are incremented at the timing
when carry is generated from a lower register.
13.1.2. Week counter
The day (of the week) is indicated by 7 bits, bit 0 to bit 6.
The day data values are counted as: Day 01h → Day 02h → Day 04h → Day 08h → Day 10h → Day 20h → Day
40h → Day 01h → Day 02h, etc.
It is incremented when carry is generated from the HOUR register. This register does not generate carry to
a higher register. Since this register is not connected with the YEAR, MONTH and DAY registers, it needs to be
set again with the matching day of the week if any of the YEAR, MONTH or DAY registers have been changed.
The setting example of the week register value.
Day bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Data [h]
Sunday 0 0 0 0 0 0 0 1 01 h
Monday 0 0 0 0 0 0 1 0 02 h
Tuesday 0 0 0 0 0 1 0 0 04 h
Wednesday 0 0 0 0 1 0 0 0 08 h
Thursday 0 0 0 1 0 0 0 0 10 h
Friday 0 0 1 0 0 0 0 0 20 h
Saturday 0 1 0 0 0 0 0 0 40 h
∗ Do not set "1" to more than one day at the same time.
13.1.3. Calendar counter
1) [ DAY ], [MONTH ]resister
The DAY register is a variable (between 28-base and 31-base) BCD counter that is influenced by the month and the
leap year. The MONTH register is 12-base BCD counter. when carry is generated from a lower register.
Jan. Feb. Mar Apr. May June July Aug. Sep. Oct. Nov. Dec.
Days Normal year
31 28 31 30 31 30 31 31 30 31 30 31
Leap year 29
2) [ YEAR ]register
This register is a BCD counter for years 00 to 99.
The leap year is automatically determined, which reflects in the DAY register.
13.2. Fixed-cycle Timer Interrupt Function
The fixed-cycle timer interrupt function generates an interrupt event periodically at any fixed cycle set between

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244.14 µsand 65535 hours. This function can stop at one time and is available as a accumulative timer.
After the interrupt occurs, the /IRQ status is automatically cleared .
13.2.2. Related registers for function of fixed-cycle timer interrupt function
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
1B Timer Counter 0 128 64 32 16 8 4 2 1
1C Timer Counter 1 32768
16384 8192 4096 2048 1024 512 256
1D Extension Register FSEL1 FSEL0 USEL
TE WADA TSEL2 TSEL1 TSEL0
1E Flag Register
  UF TF AF  VLF 
1F Control Register TEST STOP UIE TIE AIE TSTP
- -
Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
32 IRQ Control - - - TMPIN
TMPINTMPIN
TMPIN
FOPIN1 FOPIN0
∗ Before entering operation settings, we recommend first clearing the TE bit to "0" .
∗When the fixed-cycle timer function is not being used, the fixed-cycle Timer Counter0,1 register can be used as a
RAM register. In such cases, stop the fixed-cycle timer function by writing "0" to the TE and TIE bits.
1) Down counter for fixed-cycle timer (Timer Counter 1, 0 )
This register is used to set the default (preset) value for the counter. Any count value from 1 (0001 h) to
65535 (FFFFh) can be set.
Be sure to write "0" to the TE bit before writing the preset value.
∗When TE=0, read out data of timer counter is default(Preset) value.
And when TE=1, read out data of timer counter is just counting value.
But, when access to timer counter data, counting value is not held.
Therefore, for example, perform twice read access to obtain right data, and a way to adopt the case that two
data accorded is necessary.
2) TSEL2, TSEL1, TESL0 bit
The combination of these three bits is used to set the countdown period (source clock) for this function.
TSEL2
( bit 2 )
TSEL1
( bit 1 )
TSEL0
( bit 0 )
Source clock Auto reset time
tRTN
0 0 0 4096 Hz
/Once per 244.14 µs 122 µs
0 0 1 64 Hz /Once per 15.625 ms 7.813 ms
0 1 0 1Hz /Once per second 7.813 ms
0 1 1 1/60 Hz /Once per minute 7.813 ms
1 0 0 1/3600 Hz /Once per hour 7.813 ms
∗1) The /IRQ pin's auto reset time (tRTN) varies as shown above according to the source clock setting.
∗2) The first countdown shortens than a source clock.
When selected 4,096Hz / 64HZ / 1Hz as a source clock, one period of error occurs at the maximum.
When selected1/60Hz / 1/3600Hz as a source clock, 1Hz of error occurs at the maximum.
The example of the error of the first countdown: A value to preset is 0004h
Cycle error
TE
Designated cycle
Internal source clock
TF Flag ”0” ⇒“1”
TF
3 2 14
Down counter
4