Fibocom MG661-EU Installation instructions

MG661-EU/LA
Hardware Guide
V1.0

Disclaimer
Customers must design and develop their products referring to the information provided in
the document. The Company shall not be liable for any damage caused by failure to comply
with relevant operation or specifications or rules. Due to product version upgrade or other
reasons, the Company reserves the right to modify any information in this document at any
time without prior notice and any responsibility. Unless otherwise agreed, all statements,
information and suggestions in this document do not constitute any express or implied
guarantee.
Copyright Notice
Copyright © 2023 Fibocom Wireless Inc. All rights reserved.
Unless specially authorized by the Company, the recipient of the documents shall keep the
documents and information received confidential, and shall not use them for any purpose
other than the implementation and development of this project. Without the written permission
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other illegal forms.
Trademark Statement
The trademark is registered and owned by Fibocom Wireless Inc.
Other trademarks, product names, service names and company names appearing in this
document are owned by their respective owners.

Contact Information
Website: https://www.fibocom.com
Address: 10/F-14/F, Block A, Building 6, Shenzhen International Innovation Valley, Dashi First
Road, Xili Community, Xili Subdistrict, Nanshan District, Shenzhen
Tel: [phone]
Safety Instructions
Do not operate wireless communication products in areas where the use of radio is not
recommended without proper equipment certification. These areas include environments that
may generate radio interference, such as flammable and explosive environments, medical
devices, aircraft or any other equipment that may be subject to any form of radio interference.
The driver or operator of any vehicle shall not operate wireless communication products while
controlling the vehicle. Doing so will reduce the driver's or operator's control and operation of
the vehicle, resulting in safety risks.
Wireless communication devices do not guarantee effective connection under any
circumstances, such as when the (U) SIM card is invalid or the device is in arrears. In an
emergency, please use the emergency call function when the device is turned on, and ensure
that the device is located in an area with sufficient signal strength.

Contents
1
Contents
Applicable Model...............................................................................................4
Change History ..................................................................................................5
1 Product Overview...........................................................................................6
1.1 Product Introduction.........................................................................................6
1.2 Product Specifications.....................................................................................6
1.3 Hardware Block Diagram.................................................................................8
1.4 Description of Development Board..................................................................9
2 Pin Definition ................................................................................................10
2.1 Pin Attributes..................................................................................................10
2.2 Pin Distribution...............................................................................................10
2.3 Pin Details......................................................................................................13
3 Application Interfaces..................................................................................24
3.1 Power Interfaces............................................................................................24
3.1.1 Electrical Indicators..................................................................................24
3.1.2 Power Input..............................................................................................25
3.1.3 Power Output...........................................................................................27
3.2 Control Interfaces ..........................................................................................27
3.2.1 Power-on..................................................................................................27
3.2.2 Power-off..................................................................................................29
3.2.3 Reset........................................................................................................31
3.2.4 Download.................................................................................................33
3.3 Baseband Interface........................................................................................33
3.3.1 USB 2.0....................................................................................................33
3.3.2 UART .......................................................................................................35
3.3.3 I2C............................................................................................................36
3.3.4 PCM/I2S...................................................................................................37
3.3.5 SIM...........................................................................................................39
3.3.6 ADC..........................................................................................................43
3.3.7 Status Indication ......................................................................................44

Contents
2
3.3.8 LCD Interface...........................................................................................46
3.3.9 Camera Interface .....................................................................................46
3.4 Operating Mode.............................................................................................46
3.4.1 Flight Mode ..............................................................................................47
3.4.2 Sleep Mode..............................................................................................48
3.4.3 PSM Mode ...............................................................................................49
4 RF Interface...................................................................................................51
4.1 RF Indicators .................................................................................................51
4.2 RF Antenna....................................................................................................54
4.2.1 Antenna Introduction................................................................................54
4.2.2 Impedance Design Principles ..................................................................54
4.2.3 Antenna Passive Test...............................................................................57
5 Reliability .......................................................................................................60
5.1 Temperature and Humidity Requirements.....................................................60
5.2 Reliability Indicators.......................................................................................60
5.3 ESD Indicators...............................................................................................62
6 Thermal Design ............................................................................................63
6.1 Overview........................................................................................................63
6.2 Thermal Basis................................................................................................63
6.3 Thermal Design .............................................................................................64
6.3.1 Main Board...............................................................................................64
6.3.2 Product Structure.....................................................................................65
7 Structure Specifications...............................................................................67
7.1 Appearance....................................................................................................67
7.2 Dimensions....................................................................................................68
8 Packaging and Production..........................................................................70
8.1 Packaging......................................................................................................70
8.2 Storage ..........................................................................................................73
8.3 SMT ...............................................................................................................73
Appendix A Acronyms and Abbreviations....................................................74
Appendix B Reference Standards..................................................................76

Contents
3
Appendix C Reference Documents ...............................................................77
FCC Conformance information......................................................................78
Requirement per KDB996369 D03.................................................................82

Applicable Model
4
Applicable Model
No.
Applicable Model
Description
1
MG661-EU/LA-
19
Support LTE FDD

Change History
5
Change History
V1.0 (2023-06-04)
Initial version.

1 Product Overview
6
1Product Overview
1.1 Product Introduction
The MG661 module is a broadband wireless terminal product applicable to multiple bands for
FDD. The following table lists the sub-models of the MG661 product.
Table 1. Sub-models of the MG661 module
Item
MG661-EU-19
MG661-LA-19
LTE FDD
Band 1/3/5/7/8/20/28
Band 2/3/4/5/7/8/28/66
ANT
Main
Main
Memory
4MB Flash+8MB RAM
4MB Flash+8MB RAM
Main indicates that the main antenna use a common circuit and work in a time-
sharing manner.
1.2 Product Specifications
The product hardware has the following characteristics.
Table 2. Basic configuration
Category
Description
Controller
500MHz
Memory
4MB Flash+8MB RAM

1 Product Overview
7
Table 3. Baseband characteristics
Category
Description
Function interface
USB ×1: USB 2.0, can be used for AT communication,
capturing log and upgrading software version; I2C ×3: Support
standard mode 100KHz and fast mode 400KHz, and the internal
software of the module is pulled up by default SPI ×3: Two
dedicated SPI interfaces (SPI CAM and SPI LCD) and one
dedicated SPI FLASH interface ADC ×2: Supports 12-bit ADC,
voltage range 0 to VBAT UART ×2: Used for sending AT
commands or data transmission, the baud rate defaults to
115200bps, and the main serial port UART1 can support RTS
and CTS hardware flow control
GPIOs
KEYs
DEBUG_UART ×1: Debug serial port for AP log output, and the
baud rate is 2M
Peripheral interface
SIM ×2: Support 1.8 V and 3V cards, support hardware two
SIM card interfaces, but whether to support dual cards is mainly
distinguished by software
LCD ×1
CAM ×1
PCM/I2S: For external audio Codec
Table 4. RF characteristics
Category
Description
Antenna interface
Main antenna ×1

1 Product Overview
8
⚫The above supported interface description is based on the default definition
of MG661 pins. Some pins in the OPEN version can be reused for other
functions. For details, see the GPIO reuse table.
⚫The DEBUG_UART function corresponds to pins pin 38 and 39. By default,
the function is UART4 and can be used to capture AP logs.
⚫Module pin 7, 58 can be reused as UART2 function, which is used to output
CP log with baud rate of 8M.
⚫Two groups of USIM interfaces are supported by the hardware, but whether
the module supports dual cards is mainly distinguished by software. The
single card only supports SIM1 function of pin 11, 12, 13 and 14 by default.
1.3 Hardware Block Diagram
The MG661 product hardware consists of the following parts:
⚫Baseband part: CPU, memory, 26M
⚫RF part: RF Transceiver, RF PA, RF filter antenna
The following figure shows the internal structural block diagram.

1 Product Overview
9
Baseband
Transceiver
RAM & Flash
RESET_N USB_BOOT LCD&CAM USB (U)SIM*2 PCM I2Cs SPI Keypads UART STATUS
VBAT
VBAT
PWRKEY
VDD_EXT
ANT_MAIN/ANT_WIFI_SCAN
SWITCH
Duplex
PA
26MHZ
DXCO
TX
Tx
NET_STATUS
Figure 1. Hardware block diagram
1.4 Description of Development Board
To help customers develop MG661 modules, Fibocom provides MG661development boards
(shared with MC981 series) for controlling or testing modules. For more details, see
Fibocom_MC981-CN_ADP User Guide.

2 Pin Definition
10
2Pin Definition
2.1 Pin Attributes
The following attributes are used to describe pins.
Table 5. Pin attributes
Attribute
Description
No.
Pin No.
Name
Pin Name
I/O
Direction of pin signal
PI: Power Input
PO: Power Output
DI: Digital Input
DO: Digital Output
DIO: Digital Input and Output
AI: Analog input
AO: Analog Output
AIO: Analog Input and Output
OD: Open Drain
G: Ground
Voltage
Power domain of the interface
Description
Specific meaning of the pin and processing method when it is not used
2.2 Pin Distribution
The MG661 module is designed with LGApackage and available with a total of 109 pins.

2 Pin Definition
11
The distribution of pins is shown in the following figure.
Figure 2. Pin distribution
⚫Keep the NC pin unconnected.
⚫Connect all GND pins to the ground network.
⚫The functions of reserved pins 4, 5, 6, 8, 26, 44, 96, 99, 102, 104, 105
and 106 in the figure have been debugged OK. For details, see the
next section.

2 Pin Definition
12
⚫Pin79 can be reused as USIM1_DET and SPI_FLASH_CS functions.
When using external FLASH, SIM hot plug can be implemented by
using other GPIO.
⚫If the USB_BOOT/KEYIN0 pin is pulled low or high before starting up,
or the key combined with KEYOUT0 is pressed, the module will enter
the download mode. Please be careful not to trigger it by mistake
during design. It is recommended to pull down USB_BOOT to enter the
download mode.
⚫KEYIN1 and KEYIN2 cannot be pulled low before starting up,
otherwise it will enter the abnormal download mode.
⚫The power output of pin 99 LCD_VDDIO is the power domain voltage
of the relevant pin of LCD. The default voltage of LCD_VDDIO is 1.8
V, that is, the voltage of LCD related pins 49, 50, 51, 52, 53 and 78 is
1.8 V.
⚫The reserved function LCD_VDD of pin 3 is occupied internally and
has power-off control for sleep and flight modes. Therefore, it is not
recommended for external use. If you must use it, check whether the
current and timing of each application scenario meet the requirements.
⚫Reserve pin 38/39 for the AP and pin 57/58 for the CP LOG. The pin
is not anti-backflow. When using, please note that after the module pin
is powered off (shutdown or in PSM mode), there shall be no external
high level or pull-up.
⚫If pin 57/58 is occupied, other pins that can be reused for UART2
function can be reserved as CP log port.
⚫To avoid interference, wiring is prohibited on the surface of the bottom
plate below the module.

2 Pin Definition
13
2.3 Pin Details
Unused pins are left unconnected.
Pins with * indicate that there are notes at the end of the section.
Table 6. Power interfaces
Pin No.
Pin Name
I/O
Power domain
Description
42, 43
VBAT
PI
3.4V–4.5V
Baseband/RF power input (3.4–
4.5V) 3.8 V is recommended
24
VDD_EXT
PO
1.8V
Digital level, 1.8V output, with
the maximum current of 100mA
Table 7. Control interface
Pin No.
Pin Name
I/O
Power
Domain
Description
15
RESET_N
DI
VBAT
When the module is working, pull
down RESET_N 100 ms or longer,
and then release it. The module
resets.
Pins are internally pulled up to VBAT,
and no external pull up is required.
7
PWRKEY
DI
VBAT
In power-off state, pull down PWRKEY
for a long time, and the module
automatically powers on. In power-off
state, pull the PWRKEY for 2s or
longer, and then release it, the module
powers on. In power-on state, pull the
PWRKEY for 3.1s or longer, and then
release it, the module powers off.

2 Pin Definition
14
Pin No.
Pin Name
I/O
Power
Domain
Description
Pins are internally pulled up to VBAT,
and no external pull up is required.
82
USB_BOOT/KEYIN0
DI
1.8V
If USB_BOOT is pulled down to
ground or up to 1.8V, the module will
enter the download mode if it is
powered on or reset. It is
recommended to pull down
USB_BOOT to enter the download
mode.
Table 8. Baseband interface
Pin No.
Pin
Name
RESET
VALUE
I/O
Power
Domain
Description
5
GPIO29
PU
DIO
1.8V
GPIO pin
6
GPIO30
PU
DIO
1.8V
GPIO pin
44
VRTC*
- -
PI
3.0V
RTC power input, not recommended,
can be suspended
102
ISINK
- -
PI
- -
Current source input pin, can be
connected to the cathode of the
backlight, by adjusting the ISINK
current to adjust the brightness of the
backlight
1, 10, 27,
34, 36-37,
40-41, 45-
48, 70-73,
88-95
GND
- -
G
- -
Ground

2 Pin Definition
15
Pin No.
Pin
Name
RESET
VALUE
I/O
Power
Domain
Description
2, 3, 97, 98
NC
- -
- -
- -
Suspended
Table 9. RF interface
Pin No.
Pin Name
I/O
Power
Domain
Description
35
ANT_MAIN
- -
- -
Main antenna
104
GRFC_6*
DO
1.8V
RF control signal, not recommended
105
GRFC_7*
DO
1.8V
RF control signal, not recommended
Table 10. LPG interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
16
NET_STATUS
DO
PD
1.8V
Network status indication
25
STATUS
DO
PU
1.8V
Operating status
indication
Table 11. USB interface
Pin
No.
Pin Name
I/O
Power
Domain
Description
61
USB_VBUS
PI
5.0V
USB insertion detection, typical value: 5 V
60
USB_DM
IO
3.3V
USB differential data signal (–), ensure
90Ω differential impedance
59
USB_DP
IO
3.3V
USB differential data signal (+), ensure
90Ω differential impedance

2 Pin Definition
16
Table 12. SPI interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
101
SPI_FLASH_CLK
DO
PD
1.8V
SPI clock signal
100
SPI_
FLASH_SIO0
DIO
PD
1.8V
SPI data
transmission
107
SPI_
FLASH_SIO3
DIO
PD
1.8V
SPI data
transmission
108
SPI_
FLASH_SIO1
DIO
PD
1.8V
SPI data
transmission
109
SPI_
FLASH_SIO2
DIO
PD
1.8V
SPI data
transmission
79
SPI_ FLASH_CS
DO
PD
1.8V
SPI chip selection
Table 13. I2C interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
67
I2C2_SCL
OD
PU
1.8V
I2C clock signal, internal
software pull-up, external 1.8V
hardware pull-up can be
reserved, can be suspended
when not in use
66
I2C2_SDA
OD
PU
1.8V
I2C data signal, internal software
pull-up, external 1.8V hardware
pull-up can be reserved, can be
suspended when not in use
68
I2C3_SCL
OD
PU
1.8V
I2C clock signal, internal
software pull-up, external 1.8V

2 Pin Definition
17
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
hardware pull-up can be
reserved, can be suspended
when not in use
69
I2C3_SDA
OD
PU
1.8V
I2C data signal, internal software
pull-up, external 1.8V hardware
pull-up can be reserved, can be
suspended when not in use
Table 14. Debug interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
39
DBG_TXD
DO
PU
1.8V
Debug serial port transmitting
38
DBG_RXD
DI
PU
1.8V
Debug serial port data
receiving
Table 15. USIM interface
Pin No.
Pin
Name
I/O
RESET
VALUE
Power
Domain
Description
11
USIM_D
ATA
DIO
--
1.8V/3V
(U)SIM data signal line,
SIM_DATA has internal pull-up,
external pull-up can be reserved
to SIM_VDD, keep NC first
12
USIM_R
ST
DO
--
1.8V/3V
(U)SIM reset signal line
13
USIM_C
LK
DO
--
1.8V/3V
(U)SIM clock signal line