Fibocom NL952-NA-00 Instructions for use

FIBOCOM_NL952-EAU Hardware
User Manual
Version: 1.0.1
Date: 2019-12-12
FIBOCOM_NL952-NA_
Hardware_User_Manual
Version: 1.0.1
Date: 2020-02-28

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FIBOCOM_NL952-NA_Hardware_User_Manual Page 2 of 57
Applicability Table
No.
Product model
Description
1
NL952-NA-00
Cat20 WWAN Module
2
NL952-NA-20
Cat12 WWAN Module

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Copyright
Copyright © 2020 Fibocom Wireless Inc.All rights reserved.
Without the prior written permission of the copyright holder, any company or individual is prohibited to
excerpt, copy any part of or the entire document, or distribute the document in any form.
Notice
The document is subject to update from time to timeowing to the product version upgradeor other reasons.
Unless otherwise specified, the document only serves as the user guide. All the statements, information
and suggestions contained in the document do not constitute any explicit or implicit guarantee.
Warning
Changes or modifications not expressly approved by the party responsible for compliance could void the
user’s authority to operate the equipment.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant
to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference in a residential installation. This equipment generates, uses and can radiate radio frequency
energy and, if not installed and used in accordance with the instructions, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not occur in a particular
installation.
If this equipment does cause harmful interference to radio or television reception, which can be determined
by turning the equipment off and on, the user is encouraged to try to correct the interference by one or
more of the following measures:
-- Reorient or relocate the receiving antenna.
-- Increase the separation between the equipment and receiver.
-- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
-- Consult the dealer or an experienced radio/TV technician for help.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End
user must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter
must not be co-located or operating in conjunction with any other antenna or transmitter.
The portable device is designed to meet the requirements for
exposure to radio waves established by the Federal Communications
Commission (USA). These requirements set a SAR limit of 1.6 W/kg
averaged over one gram of tissue. The highest SAR value reported under
this standard during product certification for use when properly worn on the body

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This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the
following two conditions:
(1) this device may not cause interference,
(2) this device must accept any interference, including interference that may cause undesired operation of
the device.
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio
exempts de licence. L'exploitation est autorisée aux deux conditions suivantes :
(1) l'appareil ne doit pas produire de brouillage,
(2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est
susceptible d'en compromettre le fonctionnement.
Trademark
The trademark is registered and owned by Fibocom Wireless Inc.
Versions
Version
Author
Date
Remark
V1.0.0
Lei Daijun
2020-01-02
Draft version
V1.0.1
Xu Xialin
2020-02-28
●Add NL952-NA-00 and NL952-NA-20
●Add PCIe_BOOT_DISABLE definition

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Contents
1Foreword....................................................................................................................... 8
1.1 Introduction...................................................................................................................8
1.2 Reference Standard .....................................................................................................8
1.3 Related Documents......................................................................................................8
2Overview ....................................................................................................................... 9
2.1 Introduction...................................................................................................................9
2.2 Specification.................................................................................................................9
2.3 CA combinations.........................................................................................................11
2.4 Application Block........................................................................................................12
2.5 Antenna Configuration................................................................................................12
3Application Interface...................................................................................................13
3.1 M.2 Interface ..............................................................................................................13
Pin Map.........................................................................................................................13
Pin Definition.................................................................................................................14
3.2 Power Supply.............................................................................................................18
Power Supply................................................................................................................ 18
Logic level ..................................................................................................................... 19
Power Consumption......................................................................................................20
3.3 Control Signal.............................................................................................................21
Module Start-Up............................................................................................................22
3.3.1.1 Start-up Circuit...........................................................................................................................22
3.3.1.2 Start-up Timing Sequence.........................................................................................................22
Module Shutdown .........................................................................................................23
Module Reset................................................................................................................ 24
PCIe Link State.............................................................................................................26
3.3.4.1 D0 L1.2......................................................................................................................................26
3.3.4.2 D3cold L2 ..................................................................................................................................27
Timing application......................................................................................................... 27
3.4 IPC Interface ..............................................................................................................28
PCIe Interface...............................................................................................................28
3.4.1.1 PCIe Interface Definition............................................................................................................ 28
3.4.1.2 PCIe Interface Application .........................................................................................................29
USB Interface................................................................................................................ 31

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3.4.2.1 USB Interface Definition ............................................................................................................31
3.4.2.2 USB2.0 Interface Application.....................................................................................................31
3.4.2.3 USB3.0 Interface Application.....................................................................................................32
3.5 USIM Interface............................................................................................................33
USIM1 Pins ................................................................................................................... 33
USIM2 Pins ................................................................................................................... 33
USIM Interface Circuit...................................................................................................34
3.5.3.1 N.C. SIM Card Slot....................................................................................................................34
3.5.3.2 N.O. SIM Card Slot....................................................................................................................34
USIM Hot-Plugging .......................................................................................................35
USIM Design.................................................................................................................35
3.6 Status Indicator...........................................................................................................36
LED#1 Signal ................................................................................................................36
WOWWAN# ..................................................................................................................36
3.7 Interrupt Control..........................................................................................................37
W_DISABLE1#.............................................................................................................. 37
BODYSAR..................................................................................................................... 38
PCIe_BOOT_DISABLE................................................................................................. 38
ANT_CONFIG...............................................................................................................38
3.8 ANT Tunable Interface (Reserved) .............................................................................38
3.9 Configuration Interface ...............................................................................................39
3.10 Other Interfaces..........................................................................................................39
4Radio Frequency.........................................................................................................40
4.1 RF Interface................................................................................................................40
RF Interface Functionality.............................................................................................40
RF Connector Characteristic.........................................................................................40
RF Connector Dimension..............................................................................................41
RF Connector Assembly...............................................................................................42
4.2 Operating Band ..........................................................................................................43
4.3 Transmitting Power.....................................................................................................44
4.4 Receiver Sensitivity ....................................................................................................45
Dual Antenna Receiver Sensitivity................................................................................45
Four Antenna Receiver Sensitivity................................................................................ 46
4.5 GNSS.........................................................................................................................46

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4.6 Antenna Design..........................................................................................................47
5Structure Specification...............................................................................................49
5.1 Product Appearance...................................................................................................49
5.2 Dimension of Structure...............................................................................................49
5.3 M.2 Interface Model....................................................................................................50
5.4 M.2 Connector............................................................................................................51
5.5 Storage.......................................................................................................................52
Storage Life...................................................................................................................52
5.6 Packing ......................................................................................................................52
Tray Package ................................................................................................................52
Tray size........................................................................................................................54

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1 Foreword
1.1 Introduction
The document describes the electrical characteristics, RF performance, dimensions and application
environment, etc. of NL952-NA (hereinafter referred to as NL952). With the assistance of the document
and other instructions, the developers can quickly understand the hardware functions of NL952 modules
and develop products.
1.2 Reference Standard
The design of the product complies with the following standards:
3GPP TS 34.121-1 V8.11.0: User Equipment (UE) conformance specification; Radio transmission
and reception (FDD);Part 1: Conformance specification
3GPP TS 34.122 V14.0.0: Technical Specification Group RadioAccess Network; Radio transmission
and reception (TDD)
3GPP TS 36.521-1 V14.0.0: User Equipment (UE) conformance specification; Radio transmission
and reception; Part 1: Conformance testing
3GPP TS 21.111 V10.0.0: USIM and IC card requirements
3GPP TS 51.011 V4.15.0: Specification of the Subscriber Identity Module -Mobile Equipment (SIM-
ME) interface
3GPP TS 31.102 V10.11.0: Characteristics of the Universal Subscriber Identity Module (USIM)
application
3GPP TS 31.11 V10.16.0: Universal Subscriber Identity Module (USIM)Application Toolkit(USAT)
3GPP TS 36.124 V10.3.0: Electro Magnetic Compatibility (EMC) requirements for mobile terminals
and ancillary equipment
3GPP TS 27.007 V10.0.8:AT command set for User Equipment (UE)
3GPP TS 27.005 V10.0.1: Use of Data Terminal Equipment - Data Circuit terminating Equipment
(DTE - DCE) interface for Short Message Service (SMS) and Cell Broadcast Service (CBS)
PCI Express M.2 Specification Rev1.2
1.3 Related Documents
RF Antenna Application Design Specification
NL952 System Driver Integration andApplication Guidance
NL952AT Commands Manual

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2 Overview
2.1 Introduction
NL952 is a highly integrated 4G WWAN module which uses M.2 form factor interface. It supports LTE
FDD/LTE TDD/WCDMA systems and can be applied to most cellular networks of mobile carrier in the
world.
2.2 Specification
Specification
Operating Band
LTE FDD: Band 2, 4, 5, 7, 12, 13, 14, 17, 25, 26, 29, 30, 66, 71
LTE TDD: Band 41, 46, 48
DL 4x4 MIMO: Band 2, 4, 7, 25, 30, 66, 41, 48
WCDMA/HSPA+: Band 2, 4, 5,
GNSS: support GPS, GLONASS, Galileo, BDS
Data Transmission
NL952-NA-20(Cat12)
NL952-NA-00(Cat20)
LTE FDD
600Mbps DL(Cat 12)/
150Mbps UL
2Gbps DL(Cat20)/
150Mbps UL
LTE TDD
~460Mbps DL(Cat 12)/
90Mbps UL
~1.44Gbps DL(Cat20)/
90Mbps UL
When LTE TDD achieves maximum DL rate, its UL rate can
reach 30Mbps only
UMTS/
HSPA+
UMTS:384 kbps DL/384 kbps UL
DC-HSPA+:42 Mbps DL(Cat 24)/5.76 Mbps UL(Cat6)
Carrier aggregation
3CA Downlink Max
6CA Downlink Max
Power Supply
DC 3.3V～4.4V, Typical 3.8V
Temperature
Normal operating temperature: -10°C ～+55°C
Extended operating temperature: -30°C ～+75°C
Storage temperature: -40°C～+85°C
Physical
characteristics
Interface: M.2 Key-B
Dimension：30 x 52 x 2.3mm
Weight: About 8.0 g
Interface
Antenna Connector
WWAN Antenna x 4
Support 4x4 MIMO

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Specification
Function Interface
Dual SIM, 1.8V/3V
PCIe 2.0 X1
USB 2.0
USB 3.0
W_Disable#
BodySar
LED
Tunable antenna(Reserved)
I2S(Reserved)
Software
Protocol Stack
IPV4/IPV6
AT commands
3GPP TS 27.007 and 27.005
Firmware update
USB/PCIe
Other feature
Multiple carrier
Windows update
Note:
When temperature goes beyond normal operating temperature range of -10°C~+55°C, RF
performance of module may be slightly off 3GPP specifications.

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2.3 CA combinations
DL CA Combinations
2CA
Inter-band
TBD
Intra-band(non-contiguous)
TBD
Intra-band(contiguous)
TBD
3CA
Inter-band
TBD
2 intra-band(non-contiguous)
plus inter-band
TBD
2 intra-band(contiguous) plus
inter-band
TBD
Intra-band(non-contiguous)
TBD
Intra-band(contiguous)
TBD
4CA
Inter-band
TBD
2 intra-band(non-contiguous)
plus inter-band
TBD
2 intra-band(contiguous) plus
inter-band
TBD
2 intra-band(contiguous) plus
2 intra-band(contiguous)
TBD
2 intra-band(contiguous) plus
2 intra-band(non-contiguous)
TBD
3 intra-band(contiguous) plus
inter-band
TBD
Intra-band(non-contiguous)
TBD
Intra-band(contiguous)
TBD
5CA
2 intra-band(contiguous) plus 2
intra-band(contiguous) plus
inter-band
TBD
2 intra-band(contiguous) plus 3
inter-band
TBD
2 intra-band(contiguous) plus 2
intra-band(non-contiguous) plus
inter-band
TBD
3 intra-band(contiguous) plus 2
intra-band(non-contiguous)
TBD
3 intra-band(contiguous) plus 2
inter-band
TBD
3 intra-band(contiguous) plus 2
intra-band(non-contiguous)
TBD
4 intra-band(contiguous) plus
inter-band
TBD
Intra-band(non-contiguous)
TBD
6CA
4 intra-band(contiguous) plus 2
inter-band
TBD

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2.4 Application Block
The peripheral applications for NL952 module are shown in Figure 2-1:
Module
SIM1 USB2.0/
USB3.0
Power
Supply ON/OFF# RESET#
Control
EINT Indicator
Host application
D/G(AUX1) ANT Main ANT
SIM
Card
PCIe
SIM2
SIM
Card
M2(AUX3) ANT M1(AUX2) ANT
Figure2-1Application Block
2.5 Antenna Configuration
NL952 module support four antennas and the configuration is as below table:
Antenna Connector
Function Description
Band configuration
M
Main ANT
All supported bands transmit & receive
M1
MIMO1 ANT
4x4 MIMO supported bands receive
M2
MIMO2 ANT
4x4 MIMO supported bands receive
2nd UL on inter band ULCA mode(TBD)
D/G
Diversity & GNSS ANT
All supported bands and GNSS receive

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3 Application Interface
3.1 M.2 Interface
The NL952 module applies standard M.2 Key-B interface, with a total of 75 pins.
Pin Map
Figure 3-1 Pin Map
Note:
Pin “Notch” represents the gap of the gold fingers.

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Pin Definition
The pin definition is as below table:
Pin
Pin Name
I/O
Reset Value
Pin Description
Level
1
CONFIG_3
O
NC
NC, NL952 M.2 module is configured as
the WWAN –PCIe, USB3.0 interface
type
2
+3.3V
PI
-
Power input
Power Supply
3
GND
-
-
GND
Power Supply
4
+3.3V
PI
-
Power input
Power Supply
5
GND
-
-
GND
Power Supply
6
FULL_CARD_
POWER_OFF#
I
PU
Power enable, Module power on input,
internal pull up(40KΩ)
3.3/1.8V
7
USB D+
I/O
USB Data Plus
0.3---3V
8
W_DISABLE1#
I
PD
WWAN Disable, active low
3.3/1.8V
9
USB D-
I/O
USB Data Minus
0.3---3V
10
LED1#
OD
T
System status LED, Output open drain,
3.3V
3.3V
11
GND
-
-
GND
Power Supply
12
Notch
Notch
13
Notch
Notch
14
Notch
Notch
15
Notch
Notch
16
Notch
Notch
17
Notch
Notch
18
Notch
Notch
19
Notch
Notch
20
I2S_CLK
O
PD
I2S Serial clock, Reserved
1.8V
21
CONFIG_0
NC
NC, NL952 M.2 module is configured as
the WWAN –PCIe, USB3.0 interface
type
22
I2S_RX
I
PD
I2S Serial receive data,
Reserved
1.8V
23
WOWWAN#
O
PD
Wake up host, Reserved
1.8V
24
I2S_TX
O
PD
I2S Serial transmit data, Reserved
1.8V
25
DPR
I
PD
Body SAR Detect, active low
3.3/1.8V

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Pin
Pin Name
I/O
Reset Value
Pin Description
Level
26
W_DISABLE2#
I
PD
GNSS disable, active low, Reserved
3.3/1.8V
27
GND
-
-
GND
Power Supply
28
I2S_WA
O
PD
I2S Word alignment/select, Reserved
1.8V
29
USB3.0_TX-
O
USB3.0 Transmit data minus
30
UIM_RESET
O
PD
SIM reset signal
1.8V/3V
31
USB3.0_TX+
O
USB3.0 Transmit data plus
32
UIM_CLK
O
PD
SIM clock Signal
1.8V/3V
33
GND
-
-
GND
Power Supply
34
UIM_DATA
I/O
PD
SIM data input/output
1.8V/3V
35
USB3.0_RX-
I
USB3.0 receive data minus
36
UIM_PWR
O
SIM power supply, 1.8V/3V
1.8V/3V
37
USB3.0_RX+
I
USB3.0 receive data plus
38
PCIe_
BOOT_DISABLE
I
PD
PCIe early boot/USB normal boot select,
Reserved
1.8V
39
GND
-
-
GND
Power Supply
40
SIM2_DETECT
I
PD
SIM2 Detect, internal pull up(390KΩ),
active high
1.8V
41
PETn0
O
PCIe TX Differential signals
Negative
42
UIM2_DATA
I/O
PD
SIM2 data input/output
1.8V/3V
43
PETp0
O
PCIe TX Differential signals Positive
44
UIM2_CLK
O
PD
SIM2 clock Signal
1.8V/3V
45
GND
-
-
GND
Power Supply
46
UIM2_RESET
O
PD
SIM2 reset signal
1.8V/3V
47
PERn0
I
PCIe RX Differential signals
Negative
48
UIM2_PWR
O
SIM2 power supply, 1.8V/3V
1.8V/3V
49
PERp0
I
PCIe RX Differential signals Positive
50
PERST#
I
PU
Asserted to reset module PCIe interface
default. If module went into core dump, it
will reset whole module, not only PCIe
interface.
Active low, internal pull up(10KΩ)
3.3/1.8V
51
GND
-
-
GND
Power Supply

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Pin
Pin Name
I/O
Reset Value
Pin Description
Level
52
CLKREQ#
I/O
PD
Asserted by device to request a PCIe
reference clock be available (active clock
state) in order to transmit data. It also
used by L1 PM Sub states mechanism,
asserted by either host or device to
initiate an L1 exit.
Active low, open drain output and should
add external pull up on platform
3.3/1.8V
53
REFCLKN
I
PCIe Reference Clock signal
Negative
54
PEWAKE#
O
PD
Asserted to wake up system and
reactivate PCIe link from L2 to L0, it
depends on system
whether supports wake up functionality.
Active low, open drain output and should
add external pull up on platform
3.3/1.8V
55
REFCLKP
I
PCIe Reference Clock signal
Positive
56
RFFE_SCLK
O
PD
MIPI Interface Tunable ANT,
RFFE clock
1.8V
57
GND
GND
Power Supply
58
RFFE_SDATA
I/O
PD
MIPI Interface Tunable ANT,
RFFE data
1.8V
59
ANTCTL0
O
PD
Tunable ANT CTRL0
1.8V
60
COEX3
I/O
TBD
Wireless Coexistence between WWAN
and WiFi/BT modules, based on BT-SIG
coexistence protocol. COEX_EXT_FTA,
Reserved
1.8V
61
ANTCTL1
O
PD
Tunable ANT CTRL1
1.8V
62
COEX_RXD
I
PD
Wireless Coexistence between WWAN
and WiFi/BT modules, based on BT-SIG
coexistence protocol. UART receive
signal(WWAN module side), Reserved
1.8V
63
ANTCTL2
O
PD
Tunable ANT CTRL2
1.8V
64
COEX_TXD
O
PD
Wireless Coexistence between WWAN
and WiFi/BT modules, based on BT-SIG
coexistence protocol. UART transmit
signal(WWAN module side), Reserved
1.8V
65
ANTCTL3
O
PD
Tunable ANT CTRL3
1.8V
66
SIM1_DETECT
I
PD
SIM1 Detect, internal pull up(390KΩ),
active high
1.8V
67
RESET#
I
PU
WWAN reset input, active low, internal
pull up(40KΩ)
1.8V

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Pin
Pin Name
I/O
Reset Value
Pin Description
Level
68
ANT_CONFIG
I
PD
Host antenna configuration detect,
internal pull up(100KΩ),
Reserved
1.8V
69
CONFIG_1
O
GND
GND, NL952 M.2 module is configured
as the WWAN –PCIe, USB3.0
interface type
70
+3.3V
PI
-
Power input
Power Supply
71
GND
-
-
GND
Power Supply
72
+3.3V
PI
-
Power input
Power Supply
73
VIO_CFG
-
NC
Configuration of PCIe sideband signals
power domain
NC: support 1.8V/3.3V;
GND: support 3.3V
74
+3.3V
PI
-
Power input
Power Supply
75
CONFIG_2
O
NC
NC, NL952 M.2 module is configured as
the WWAN –PCIe, USB3.0 interface
type
Reset Value: The initial status after module reset, not the status when working.
H: High Voltage Level
L: Low Voltage Level
PD: Pull-Down
PU: Pull-Up
T: Tristate
OD: Open Drain
PI: Power Input
PO: Power Output
Note:
The unused pins can be left floating.

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3.2 Power Supply
The power interface of NL952 module as shown in the following table:
Pin
Pin Name
I/O
Pin Description
DC Parameter（V）
Minimum
Value
Typical
Value
Maximum
Value
2, 4, 70, 72, 74
+3.3V
PI
Power supply input
3.3
3.8
4.4
36
UIM_PWR
PO
USIM power supply
-
1.8V/3V
-
48
UIM2_PWR
PO
USIM power supply
-
1.8V/3V
-
NL952 module uses PCIe interface, according to the PCIe specification, the PCIe Vmain should be used
as the +3.3V power source,not the Vaux. TheVaux is the PCIe backup powersource and it is not sufficient
as the power supply. In addition, the DC/DC power supply other than PCIe ports should not be used as
the external power cannot control the module status through the PCIe protocol.
Power Supply
The NL952 module should be powered through the +3.3V pins, and the power supply design is shown in
Figure 3-2:
Figure 3-2 Power Supply Design

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The filter capacitor design for power supply as shown in the following table:
Recommended
capacitance
Application
Description
220uF x 2
Voltage-stabilizing capacitors
Reduce power fluctuations of the module in
operation, requiring capacitors with low ESR.
LDO or DC/DC power supply requires the
capacitor of no less than 440uF
The capacitor for battery power supply
can be reduced to 100~200uF
1uF, 100nF
Digital signal noise
Filter out the interference generated from the
clock and digital signals
39pF, 33pF
700/800, 850/900 MHz frequency
band
Filter out low frequency band RF interference
18pF, 10pF,
8.2pF, 6.8pF
1500/1800, 2100/2300,
2600MHz, 3500/3600/3700MHz
Filter out medium/high frequency band RF
interference
The stable power supply can ensure the normal operation of NL952 module; and the ripple of the power
supply should be less than 300mV in design. Because module support 5CA download, when module
operates with the maximum data transfer throughput, the peak current can reach to upper 2500mA. It
requests the power source voltage should not be lower than 3.3V, otherwise module may shut down or
restart. The power supply requirement is shown in Figure 3-3:
Burst transmit Burst transmit
min:3.3V
Power supply Ripple≤300mV
Drop
VBAT≥3.3V
Figure 3-3 Power Supply Requirement
Logic level
The NL952 module 1.8V logic level definition as shown in the following table:
Parameters
Minimum
Typical
Maximum
Unit
1.8V logic level
1.71
1.8
1.89
V
VIH
1.3
1.8
1.89
V
VIL
-0.3
0
0.3
V

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FIBOCOM_NL952-NA_Hardware_User_Manual Page 20 of 57
The NL952 module 3.3V logic level definition as shown in the following table:
Parameters
Minimum
Typical
Maximum
Unit
3.3V logic level
3.135
3.3
3.465
V
VIH
2.3
3.3
3.465
V
VIL
-0.3
0
0.3
V
Power Consumption
In the condition of 3.3V power supply, the NL952 power consumption as shown in the following table:
Parameter
Mode
Condition
Typical
Current
(mA)
Ioff
Power off
Power supply, module power off
TBD
ISleep
WCDMA
DRX=8
TBD
LTE FDD
Paging cycle #64 frames (0.64 sec DRx cycle)
TBD
LTE TDD
Paging cycle #64 frames (0.64 sec DRx cycle)
TBD
Radio Off
AT+CFUN=4, Flight mode
TBD
IWCDMA-RMS
WCDMA
WCDMA Data call Band 2 @+23.5dBm
TBD
WCDMA Data call Band 4 @+23.5dBm
TBD
WCDMA Data call Band 5 @+23.5dBm
TBD
ILTE-RMS
LTE FDD
LTE FDD Data call Band 2 @+23dBm
TBD
LTE FDD Data call Band 4 @+23dBm
TBD
LTE FDD Data call Band 5 @+23dBm
TBD
LTE FDD Data call Band 7 @+23dBm
TBD
LTE FDD Data call Band 12 @+23dBm
TBD
LTE FDD Data call Band 13 @+23dBm
TBD
LTE FDD Data call Band 14 @+23dBm
TBD
LTE FDD Data call Band 17 @+23dBm
TBD
LTE FDD Data call Band 25 @+23dBm
TBD
LTE TDD Data call Band 26 @+23dBm
TBD
LTE TDD Data call Band 30 @+22dBm
TBD