Intel SL6NQ - Xeon 2.4 GHz/533MHz/512 KB CPU Processor... User manual

Intel® Xeon® Processor
Specification Update
January 2007
Document Number: 249678-057
Notice: The Intel®Xeon® processor may contain design defects or errors known as errata which
may cause the product to deviate from published specifications. Current characterized errata are
documented in this specification update.

2Intel® Xeon® Processor Specification Update
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Intel® Xeon® Processor Specification Update 3
Contents
Revision History .................................................................................................................5
Preface...............................................................................................................................9
Identification Information..................................................................................................10
Mixed Steppings in DP Systems......................................................................................18
Summary Table of Changes.............................................................................................20
Errata................................................................................................................................27
Specification Changes......................................................................................................51
Specification Clarifications ...............................................................................................53
Documentation Changes..................................................................................................56

4Intel® Xeon® Processor Specification Update

Intel® Xeon® Processor Specification Update 5
Revision History
Revision History
Version Description Date
-001 • Initial release. May 2001
-002 • Added errata P27-P28. June 2001
-003 • Updated erratum P25. June 2001
-004 • Added RCPPS, RCPSS, RSQRTPS and RSQRTSS instruction
specification clarification. July 2001
-005 • Added errata P29-P32.
• Added Unused outputs specification clarifications. August 2001
-006 • Added errata P33-34.
• Production mark update to include 2D matrix. September 2001
-007 • Added 2 GHz frequency, D0 stepping and FC-BGA package
information.
• Added DP Platform Population Matrix.
• Updated Summary of Errata table with applicable “Fixed” & “No Fix”
errata plans.
• Updated errata P32.
October 2001
-008 • Added Erratum P35.
• Updated Summary of Errata Table with latest errata status.
• Added Documentation Changes P1-P5.
November 2001
-009 • Added errata P36 and P37.
• Added Documentation Change P6.
• Updated Summary Tables with latest errata and documentation
changes.
December 2001
-010 • Added Documentation Changes P7-P11.
• Added errata P38-P44.
• Added new processor with Processor Signature=0F24h B0 Step.
• Added new S-spec processors to Processor ID and DP Matrix tables.
• Added new package markings (Figs 3, 4) for 512KB Cache processor.
January 2002
-011 • Corrected 3 mislabeled S-Spec Table parts. January 2002
-012 • Added erratum P45 to Processor ID Table. February 2002
-013 • Added errata P46 and P47.
• Added Documentation Changes P1-P6.
• Minor changes to “Fix” descriptions.
April 2002
-014 • Added PWRGOOD Specification Change.
• Added errata P48.
• Updated errata P11.
• Added Specification Changes P1-P3.
• Added Documentation Changes P1-P3.
• Added new S-specs SL687 and SL65T to Processor ID table.
• Updated datasheet name to 2.40 GHz.
May 2002

6Intel® Xeon® Processor Specification Update
Revision History
-015 • Added erratum P49.
• Updated errata P24, P40 status.
• Added Document Changes P1-P2.
June 2002
-016 • Added new erratum P50.
• Added new Documentation Changes P3-P12.
• Edited Summary of Errata Table erratum P40 to Plan Fix.
• Minor edits to processor markings.
July 2002
-017 • Edited DP Matrix table.
• Updated the Summary of Errata table w C1 Step info. August 2002
-018 • Added errata P51, P52. Edited erratum P14.
• Added Documentation Changes P3-P24.
• Added Specification Clarification P1.
• Added new C1 S-specs to Processor ID Info table.
September 2002
-019 • Edited erratum P35.
• Removed erratum previously numbered P52 as not applicable. Added
new erratum P52.
• Added Documentation Changes P25-P32.
October 2002
-020 • Added erratum P53.
• Added new Specification Change P1.
• Added new Specification Clarification P2.
• Deleted old Documentation Changes.
• Deleted old Specification Changes
• Added new Processor (Intel®Xeon®Processor with 533 MHz Front
Side Bus.
• Added new processor with Processor Signature=0F27h C1 Step.
• Added New S-specs to the processor ID table.
• All References to CPUID are now renamed Processor Signature.
November 2002
-021 • Added reference to IA-32 Intel® Architecture Software Developer’s
Manual.December 2002
-022 • Added erratum 054-055. January 2003
-023 • Added new errata P56, P57.
• Added boxed processors S-Specs for 400 MHz FSB with the
frequencies: 1.80, 2, 2.20 and 2.40 GHz.
February 2003
-024 • Added new errata P58 and P59.
• Updated previous errata fixing status, P55.
• Updated the name of the datasheet reference.
• Added S-Spec #SL6RR, SL6GH.
March 2003
-025 • Updated previous errata P55 and P58. April 2003
-026 • Added Specification Clarification P1-P4.
• Added Low Voltage Intel®Xeon®Processor Specifications. May 2003
-027 • Added erratum P60.
• Updated Sections with Low Voltage Intel®Xeon®Processor
Datasheets.
• Updated erratum P53.
June 2003
Version Description Date

Intel® Xeon® Processor Specification Update 7
Revision History
-028 • Added new Processor Intel®Xeon®Processor with 1-MB L3 Cache
with Processor Signature=0F25H (M0 Stepping).
• Added New S-specs to the processor ID table for 0F25H (M0 Stepping)
and 0F29h (D1 Stepping).
• Added new processor with Processor Signature=0F29H (D1 Stepping).
• Updated DP Platform Population Matrix for the Intel®Xeon®Processor
to include 0F25H and 0F29H.
• Removed Specification Clarification P3.
• Updated erratum P30 – Title Correction.
July 2003
-029 • Updated errata P54 and P56. August 2003
-030 • Added erratum P64.
• Updated erratum P9, P22, P39. September 2003
-031 • Added new Processor - Intel®Xeon®Processor with 1-MB L3 Cache
at 3.20 GHz with Processor Signature=0F25H (M0 Stepping).
• Added New S-specs - Intel®Xeon®Processor with 1-MB L3 Cache at
3.20 GHz.
October 2003
-032 • Added erratum P65.
• Removed Specification Clarification P4.
• Added S-spec SL74T.
October 2003
-033 • Added erratum P66.
• Updated erratum P65. November 2003
-034 • Added Specification Clarification P3. December 2003
-035 • Added new Processor Intel®Xeon®Processor with 2-MB L3 Cache
with Processor Signature=0F25H (M0 Stepping). February 2004
-036 • Added errata P67 and P68.
• Added Specification Change P1. March 2004
-037 • Updated errata P26 and P66. April 2004
-038 • Updated errata P10 and P48.
• Added erratum P69.
• Added S-spec numbers SL7D5, SL7DG, SL7D4, and SL7DF to
Processor ID table.
May 2004
-039 • Added errata P70, P71, P72. June 2004
-040 • Updated affected documents listed under Preface, Specification
Changes, Specification Clarifications, and Documentations Changes. July 2004
-041 • Added erratum P73.
• Updated erratum P54. August 2004
-042 • Updated erratum 72 in the Errata Summary Table. August 2004
-043 • Added errata P74-P75. September 2004
-044 • Added erratum P76. September 2004
-045 • Added errata P77-P79. October 2004
-046 • Added erratum P80. November 2004
-047 • Added erratum P81. December 2004
-048 • Added Specification Clarification P2. April 2005
-049 • Updated related documents list July 2005
-050 • Added Erattum P82.
• Updated codes used in summary table. October 2005
Version Description Date

8Intel® Xeon® Processor Specification Update
Revision History
-051 • Updated erratum P53 and added erratum P83. January 2006
-052 • Updated links to Software Developers Manuals. Added s-spec SL8TJ. March 2006
-053 • Added S-specs SL8TK, SL8TL, SL8SE and SL8TH. April 2006
-054 • Updated Summary Table of Changes.
• Updated the Software Developer Manual Name. October 2006
-055 • Made changes to the DP Platform Population Matrix. November 2006
-056 • Updated Summary Table of Changes. December 2006
-057 • Updated Summary Table of Changes. January 2007
Version Description Date

Intel® Xeon® Processor Specification Update 9
Preface
Preface
This document is an update to the specifications contained in the documents listed in the following
Affected Documents/Related Documents table. It is a compilation of device and document errata
and specification clarifications and changes, and is intended for hardware system manufacturers
and for software developers of applications, operating system, and tools.
Information types defined in the Nomenclature section of this document are consolidated into this
update document and are no longer published in other documents. This document may also contain
information that has not been previously published.
Affected/Related Documents
Nomenclature
S-Spec Number is a five-digit code used to identify products. Products are differentiated by their
unique characteristics, e.g., core speed, L2 cache size, package type, etc., as described in the
processor identification information table. Care should be taken to read all notes associated with
each S-Spec number.
Errata are design defects or errors. Errata may cause the Intel®Xeon®processor’s behavior to
deviate from published specifications. Hardware and software designed to be used with any given
stepping must assume that all errata documented for that stepping are present on all devices.
Specification Changes are modifications to the current published specifications. These changes
will be incorporated in the next release of the specifications.
Specification Clarifications describe a specification in greater detail or further highlight a
specification’s impact to a complex design situation. These clarifications will be incorporated in
the next release of the specifications.
Documentation Changes include typos, errors, or omissions from the current published
specifications. These changes will be incorporated in the next release of the specifications.
Document Title Document Number
Intel®Xeon®Processor at 1.40 GHz, 1.50 GHz, 1.70 and 2 GHz Datasheet 249665
Intel®Xeon®Processor with 512 KB L2 Cache at 1.80 GHz to 3.0 GHz Datasheet 298642
Intel®Xeon®Processor with 533 MHz Front Side Bus at 2 GHz to 3.20 GHz Datasheet 252135
Low Voltage Intel®Xeon®Processor at 1.60 GHz, 2.0 GHz, and 2.4 GHz Datasheet 273766
Intel® 64 and IA-32 Intel® Architectures Software Developer’s Manual, Volumes 1, 2A,
2B, 3A, and 3B 253665, 253666, 253667,253668and
253669,
respectively

10 Intel® Xeon® Processor Specification Update
Identification Information
Identification Information
Intel®Xeon®Processor Markings, 256-KB Cache (603-pin
Interposer INT-mPGA Package)
Figure 1. Top Side Processor Marking
Figure 2. Bottom Side Processor Marking
Intel® Xeon™
i(m) ©’01
D0096109
0032
2D Matrix
OR
Dynamic Laser
Mark Area
ATPO Mark
(8 Characters)
Serial Number
Mark
(4 digits)
1700DP/256/400/1.7V
SL56N COSTA RICA
C0096109 -0021
Dynamic Laser
Mark Area
Speed / Cache / Bus / Voltage
FPO – Serial #
(13 Characters)
S-Spec
Country of
Assy