Phytec phyCORE-TC1775 User manual

A product of a PHYTEC Technology Holding company
TC1775
Hardware Manual
Edition July 2006

phyCORE-TC1775
©PHYTEC Messtechnik GmbH 2006 L-538e_3
In this manual are descriptions for copyrighted products that are not explicitly
indicated as such. The absence of the trademark (™) and copyright (©) symbols
does not imply that a product is not protected. Additionally, registered patents and
trademarks are similarly not expressly indicated in this manual.
The information in this document has been carefully checked and is believed to be
entirely reliable. However, PHYTEC Messtechnik GmbH assumes no responsibi-
lity for any inaccuracies. PHYTEC Messtechnik GmbH neither gives any guar-
antee nor accepts any liability whatsoever for consequential damages resulting
from the use of this manual or its associated product. PHYTEC Messtechnik
GmbH reserves the right to alter the information contained herein without prior
notification and accepts no responsibility for any damages which might result.
Additionally, PHYTEC Messtechnik GmbH offers no guarantee nor accepts any
liability for damages arising from the improper usage or improper installation of
the hardware or software. PHYTEC Messtechnik GmbH further reserves the right
to alter the layout and/or design of the hardware without prior notification and
accepts no liability for doing so.
©Copyright 2006 PHYTEC Messtechnik GmbH, D-55129 Mainz. Rights -
including those of translation, reprint, broadcast, photomechanical or similar
reproduction and storage or processing in computer systems, in whole or in part -
are reserved. No reproduction may occur without the express written consent from
PHYTEC Messtechnik GmbH.
EUROPE NORTH AMERICA
Address: PHYTEC Technologie Holding AG
Robert-Koch-Str. 39
D-55129 Mainz
GERMANY
PHYTEC America LLC
203 Parfitt Way SW, Suite G100
Bainbridge Island, WA 98110
USA
Ordering
Information: [phone]
[email protected] 1 [phone] [email protected]
Technical
Support: [phone]
[email protected] 1 [phone] [email protected]
Fax: [phone] [phone]
Web Site: http://www.phytec.de http://www.phytec.com
3rd Edition: July 2006

Table of Contents
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Preface 1
1 Introduction.........................................................................................3
1.1 Block Diagram .............................................................................6
1.2 View of the phyCORE-TC1775...................................................7
2 Pin Description....................................................................................9
3 Jumpers..............................................................................................23
4 Power System and Reset Behavior..................................................31
5 Boot Characteristics..........................................................................33
6 System Memory.................................................................................35
6.1 Memory Model following Reset................................................35
6.2 Runtime Memory Model............................................................35
6.3 Flash Memory ............................................................................37
6.3.1 Burst-Mode Flash (U9, U11) ........................................37
6.3.2 Standard Flash (U14, U15) ...........................................38
6.4 Serial Memory, EEPROM/FRAM/SRAM (U13)......................39
7 Serial Interfaces.................................................................................43
7.1 RS-232 Interface ........................................................................43
7.2 CAN Interface ............................................................................44
7.3 On-Chip Debug Support.............................................................45
8 CS8900A Ethernet Controller .........................................................47
8.1 I/O and Mode..............................................................................47
8.2 Addressing and Bus Configuration............................................47
8.3 Interrupt Control.........................................................................48
8.4 Hardware Standby......................................................................48
8.5 MAC Address.............................................................................48
8.6 Configuration Data in EEPROM (U10).....................................49
8.7 10Base-T Interface.....................................................................49
9 Real-Time Clock RTC-8564 (U24)..................................................50
10 Standby Power Supply......................................................................51
11 debugCORE-TC1775........................................................................53
11.1 Components of the debugCORE................................................53
11.2 Connecting an Emulator.............................................................55
12 Technical Specifications ...................................................................57
13 Hints for Handling the phyCORE-TC1775....................................60

phyCORE-TC1775
©PHYTEC Messtechnik GmbH 2006 L-538e_3
14 The phyCORE-TC1775 on the
phyCORE-TriCORE Development Board.....................................61
14.1 Concept of the phyCORE Development Board.........................61
14.2 phyCORE-TriCORE Development Board Connectors and
Jumpers ...................................................................................... 63
14.2.1 Connectors .................................................................... 63
14.2.2 Jumpers on the phyCORE-TriCORE
Development Board ...................................................... 65
14.3 Functional Components on the phyCORE-TriCORE
Development Board ................................................................... 67
14.3.1 Power Supply at X1 ...................................................... 67
14.3.2 Activating the Bootstrap Loader................................... 68
14.3.3 First Serial Interface at Socket P1A.............................. 70
14.3.4 Second Serial Interface at Socket P1B .........................72
14.3.5 First CAN Interface at Plug P2A.................................. 74
14.3.6 Second CAN Interface at Plug P2B..............................77
14.3.7 RJ45 Ethernet Connector X7........................................ 80
14.3.8 Programmable LED D3 ................................................ 80
14.3.9 Pin Assignment Summary of the phyCORE, the
Expansion Bus and the Patch Field............................... 81
14.3.10 DS2401 Silicon Serial Number..................................... 92
14.3.11 Pin Header Connectors X4 and X5...............................93
15 debugCORE-TC1775 on the Development Board.........................95
16 Revision History................................................................................ 99
A.1 Release Notes........................................................................... 100

Table of Contents
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Index of Figures
Figure 1: Block Diagram phyCORE-TC1775 ........................................6
Figure 2: View of the phyCORE-TC1775 (Controller Side)..................7
Figure 3: View of the phyCORE-TC1775 (Connector Side)..................8
Figure 4: Pinout of the phyCORE-Connector (Connector Side) ..........11
Figure 5: Numbering of the Jumper Pads .............................................23
Figure 6: Location of the Jumpers (Controller Side)and Default
Settings (phyCORE-TC1775 Standard Version)...................23
Figure 7: Location of the Jumpers (Connector Side) and Default
Settings (phyCORE-TC1775 Standard Version)...................24
Figure 8: I2C Slave Address of the Serial Memory ..............................40
Figure 9: Positions of the Additional Components on the
debugCORE-TC1775 ............................................................54
Figure 10: Connecting an Emulator........................................................55
Figure 11: Physical Dimensions..............................................................57
Figure 12: Modular Development and Expansion Board Concept with
the phyCORE-TC1775..........................................................62
Figure 13: Location of Connectors on the phyCORE-TriCORE
Development Board...............................................................63
Figure 14: Numbering of Jumper Pads ...................................................65
Figure 15: Location of the Jumpers (View of the Component Side)......65
Figure 16: Default Jumper Settings of the phyCORE-TriCORE
Development Board with Standard phyCORE-TC1775 .......66
Figure 17: Connecting the Supply Voltage at X1...................................67
Figure 18: Pin Assignment of the DB-9 Socket P1A as First RS-232
(Front View)..........................................................................70
Figure 19: Pin Assignment of the DB-9 Socket P1A as Second
RS-232 (Front View).............................................................72
Figure 20: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver
on phyCORE-TC1775, Front View) .....................................74
Figure 21: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver
on Development Board).........................................................75

phyCORE-TC1775
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Figure 22: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver
on Development Board with Galvanic Separation) ..............76
Figure 23: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver
on phyCORE-TC1775, Front View).....................................77
Figure 24: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver
on Development Board) ........................................................78
Figure 25: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver
on Development Board with Galvanic Separation) ..............79
Figure 26: Pin Assignment Scheme of the Expansion Bus ....................82
Figure 27: Pin Assignment Scheme of the Patch Field ..........................82
Figure 28: Connecting the DS2401 Silicon Serial Number....................92
Figure 29: Pin Assignment of the DS2401 Silicon Serial Number........92
Figure 30: Positions of the Additional Components on the
debugCORE-TC1775............................................................95

Table of Contents
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Index of Tables
Table 1: Pinout of the phyCORE-Connector X1......................................21
Table 2: Jumper Settings ..........................................................................30
Table 3: Runtime Memory Map...............................................................36
Table 4: Flash Memory Types and Manufacturers ..................................38
Table 5: Memory Device Options for U13...............................................40
Table 6: I2C Addresses for Serial Memory ..............................................41
Table 7: OCDS1 Connector X3 Pin Assignment.....................................46
Table 9: JP28 Configuration of the Boot Button.....................................68
Table 10: JP22, JP23, JP34 Configuration of Boot via RS-232................69
Table 11: Improper Jumper Settings for Boot via RS-232.........................69
Table 12: Jumper Configuration for the First RS-232 Interface................70
Table 13: Improper Jumper Settings for DB-9 Socket P1A as
First RS-232 ...............................................................................71
Table 14: Jumper Configuration for the Second RS-232 Interface............72
Table 15: Improper Jumper Settings for DB-9 Socket P1A as
Second RS-232...........................................................................73
Table 16: Jumper Configuration for CAN Plug P2A Using the
CAN Transceiver on the phyCORE-TC1775 ............................74
Table 17: Jumper Configuration for CAN Plug P2A Using the
CAN Transceiver on the Development Board...........................75
Table 18: Jumper Configuration for CAN Plug P2A Using the
CAN Transceiver on the Development Board with
Galvanic Separation ...................................................................76
Table 19: Jumper Configuration for CAN Plug P2B Using the
CAN Transceiver on the phyCORE-TC1775 ............................77
Table 20: Jumper Configuration for CAN Plug P2B Using the
CAN Transceiver on the Development Board...........................78
Table 21: Jumper Configuration for CAN Plug P2B Using the
CAN Transceiver on the Development Board with
Galvanic Separation ...................................................................79

phyCORE-TC1775
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Table 23: JP29, JP30 Configuration of the Ethernet Interface.................. 80
Table 24: JP17 Configuration of the Programmable LED D3.................. 80
Table 25: Pin Assignment Data Bus for the phyCORE-TC1775 /
Development Board / Expansion Board (Class B Pins
Nominal 2.5 V, 3.3 V Tolerant)................................................. 83
Table 26: Pin Assignment Address Bus for the phyCORE-TC1775 /
Development Board / Expansion Board (Class B Pins
Nominal 2.5 V, 3.3 V Tolerant)................................................. 84
Table 27: Pin Assignment Port P3, P4, P5 Dedicated Port Pins on the
phyCORE-TC1775/ Development Board / Expansion Board
(Class B Pins Nominal 2.5 V, 3.3 V Tolerant) .......................... 85
Table 28: Pin Assignment Analog Ports P6, P7 for the
phyCORE-TC1775 / Development Board /
Expansion Board (Maximum Voltage 5 V)............................... 86
Table 29: Pin Assignment Analog Ports P8, P9 for the
phyCORE-TC1775 / Development Board /
Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 87
Table 30: Pin Assignment Analog Ports P10, P11 for the
phyCORE-TC1775 / Development Board /
Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 88
Table 31: Pin Assignment Analog Ports P12, P13 for the
phyCORE-TC1775 / Development Board /
Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 89
Table 32: Pin Assignment Interface Signals for the
phyCORE-TC1775 / Develop. Board / Expansion Board
(Level According to Signal Type) ............................................. 90
Table 33: Pin Assignment Control & Misc. Signals for the
phyCORE-TC1775 / Development Board /
Expansion Board........................................................................ 90
Table 34: Freely Configurable Pins on the Optional PLD at U16............. 90
Table 35: Pin Assignment Power Supply for the phyCORE-TC1775 /
Development Board / Expansion Board .................................... 91
Table 36: Unused Pins on the phyCORE-TC1775 /
Development Board / Expansion Board .................................... 91
Table 37: JP16 Jumper Configuration for Silicon Serial Number Chip.... 92

Table of Contents
©PHYTEC Messtechnik GmbH 2006 L-538e_3
Table 38: Activating the Wiggler...............................................................96

phyCORE-TC1775
©PHYTEC Messtechnik GmbH 2006 L-538e_3

Preface
©PHYTEC Messtechnik GmbH 2006 L-538e_3 1
Preface
This phyCORE-TC1775 Hardware Manual describes the board's
design and functions. Precise specifications for Infineon’s TC1775
Tricore microcontroller series controller can be found in the enclosed
microcontroller Data Sheet/User's Manual. If software is included
please also refer to additional documentation for this software.
In this hardware manual and in the attached schematics, low active
signals are denoted by a "/" in front of the signal name (i.e.: /RD). A
"0" indicates a logic-zero or low-level signal, while a "1" represents a
logic-one or high-level signal.
Declaration of Electro Magnetic Conformance of the
PHYTEC phyCORE-TC1775
PHYTEC Single Board Computers (henceforth products) are designed
for installation in electrical appliances or as dedicated Evaluation
Boards (i.e.: for use as a test and prototype platform for
hardware/software development) in laboratory environments.
Caution:
PHYTEC products lacking protective enclosures are subject to
damage by ESD and, hence, may only be unpacked, handled or
operated in environments in which sufficient precautionary measures
have been taken in respect to ESD-dangers. It is also necessary that
only appropriately trained personnel (such as electricians, technicians
and engineers) handle and/or operate these products. Moreover,
PHYTEC products should not be operated without protection circuitry
if connections to the product's pin header rows are longer than 3 m.

phyCORE-TC1775
2©PHYTEC Messtechnik GmbH 2006 L-538e_3
PHYTEC products fulfill the norms of the European Union’s
Directive for Electro Magnetic Conformance only in accordance to the
descriptions and rules of usage indicated in this hardware manual
(particularly in respect to the pin header row connectors, power
connector and serial interface to a host-PC).
Implementation of PHYTEC products into target devices, as well as
user modifications and extensions of PHYTEC products, is subject to
renewed establishment of conformity to, and certification of, Electro
Magnetic Directives. Users should ensure conformance following any
modifications to the products as well as implementation of the
products into target systems.
The phyCORE-TC1775 is one of a series of PHYTEC Single Board
Computers that can be populated with different controllers and, hence,
offers various functions and configurations. PHYTEC supports all
common 8- and 16-bit as well as selected 32-bit controllers in two
ways:
(1) as the basis for Rapid Development Kits which serve as a
reference and evaluation platform
(2) as insert-ready, fully functional micro-, mini- and phyCORE
OEM modules, which can be embedded directly into the user’s
peripheral hardware, design.
PHYTEC's microcontroller modules allow engineers to shorten
development horizons, reduce design costs and speed project concepts
from design to market.

Introduction
©PHYTEC Messtechnik GmbH 2006 L-538e_3 3
1Introduction
The phyCORE-TC1775 belongs to PHYTEC’s phyCORE Single
Board Computer module family. The phyCORE SBCs represent the
continuous development of PHYTEC Single Board Computer
technology. Like its mini-, micro- and nanoMODUL predecessors, the
phyCORE boards integrate all core elements of a microcontroller
system on a subminiature board and are designed in a manner that
ensures their easy expansion and embedding in peripheral hardware
developments.
As independent research indicates that approximately 70 % of all EMI
(Electro Magnetic Interference) problems stem from insufficient
supply voltage grounding of electronic components in high frequency
environments the phyCORE board design features an increased pin
package. The increased pin package allows dedication of
approximately 20 % of all pin header connectors on the phyCORE
boards to Ground. This improves EMI and EMC characteristics and
makes it easier to design complex applications meeting EMI and EMC
guidelines using phyCORE boards even in high noise environments.
phyCORE boards achieve their small size through modern SMD
technology and multi-layer design. In accordance with the complexity
of the module, 0402-packaged SMD components and laser-drilled
Microvias are used on the boards, providing phyCORE users with
access to this cutting edge miniaturization technology for integration
into their own design.

phyCORE-TC1775
4©PHYTEC Messtechnik GmbH 2006 L-538e_3
The phyCORE-TC1775 is a subminiature (72 x 57 mm) insert-ready
Single Board Computer populated with Infineon’s TC1775 Tricore
microcontroller. Its universal design enables its insertion in a wide
range of embedded applications. All controller signals and ports
extend from the controller to high-density pitch (0.635 mm)
connectors aligning two sides of the board, allowing it to be plugged
like a “big chip” into a target application.
Precise specifications for the controller populating the board can be
found in the applicable controller User’s Manual or Data Sheet. The
descriptions in this manual are based on the Infineon TC1775 Tricore
microcontroller. No description of compatible microcontroller
derivative functions is included, as such functions are not relevant for
the basic functioning of the phyCORE-TC1775.

Introduction
©PHYTEC Messtechnik GmbH 2006 L-538e_3 5
The phyCORE-TC1775 offers the following features:
•subminiature SBC in phyCORE dimensions 72 x 57 mm with two
100-pin high-density (0.635 mm) Molex connectors, enabling it to
be plugged like a “big chip” into target application
•Processor: Infineon Tricore TC1775, 16 MHz external clock
•Internal Components of the phyCORE-TC1775:
-High performance 32-bit TriCORE CPU
-Independent Peripheral Control Processor (PCP)
-72 kByte SRAM
-two synchronous serial interfaces
-Dual UART
-Dual CAN 2.0B
-Serial Data Link Modul (SDLM) according to SAE Class B
J1850 specification
-General Purpose Timer Array (GPTA)
-General Purpose Timer Unit (GPTU) with three 32-bit timers
-Dual 16-channel 12-bit A/D converter
-Multi-purpose I/O signals
•Memory Configuration1:
-Fast-SRAM: 2 MByte maximum
-Standard-SRAM: 8 Mbyte maximum
-Flash-ROM: 4 MByte Burst Mode Flash maximum;
8 MByte standard Flash maximum
-I2C memory: 4 kByte EEPROM (up to 32 kByte)
(optional I2C FRAM (512 Byte), or
I2C SRAM (256 Byte) can be used)
•I2C Real-Time Clock with calendar and alarm functions
•Ethernet Controller CS8900A 10 Mbit TP
•Dual UART: RS-232 transceiver for both channels
(RxD/TxD); TTL level can be configured
•Dual CAN port: 82C251CAN transceiver 82C251 for both
channels; TTL level can be configured
•JTAG/Debug port
•Available in standard- (0...+70° C) temperature range
1: Please contact PHYTEC for more information about additional modul configurations.

phyCORE-TC1775
6©PHYTEC Messtechnik GmbH 2006 L-538e_3
1.1 Block Diagram
Figure 1: Block Diagram phyCORE-TC1775
ETH_RXD, ETH_TXD
ETH_LinkLED,
ETH_LanLED
JTAG
Data Bus
A
ddress Bus
Control Signals
I
2
C Bus
/IRQRTC
RXD1, TXD1
RXD2, TXD2
RXD2-TTL, TXD2-TTL
RXD1-TTL, TXD1-TTL
A
_CANL, A_CANH
B_CANL, B_CANH
B_CANRX, B_CANTX
A
_CANRX, A_CANT
X
up to 8 MB
SRAM
up to 4 MB
burst-mode
Flash
I
2
C RTC
Clock
Calendar
Alarm
I
2
C memory
FRAM or
EEPROM or
SRAM
RS-232 Transceive
r
RS-232 Transceive
r
CAN Transceive
r
CAN Transceive
r
72 kB SRAM
CAN A
Ethernet
Controller
UART B
UART A
32-bit TriCore
Peripheral Control Proz.
72 kByte RAM
TC1775
PLL 16 MHz Quartz
p
h
y
C
O
R
E
-
C
o
n
n
e
c
t
o
r
40 MHz CPU-Clock
CAN B

Introduction
©PHYTEC Messtechnik GmbH 2006 L-538e_3 7
1.2 View of the phyCORE-TC1775
R30
C16
J40
R25
T2
J13
U3
J43
XT2
R9
J47
X2
U14
R23
J42
C14
XT1
R18
R12
X3
R16
J27
C15
U2
R37
R8
J24
C5
J8
J48
U27
T1
Q1
J3
TP1
C4
R24
J22
J14
U26
R14
C1
U1
U15
RN3
TP4
R15
J23
J49
U11
J16
U28
J25
J2
R10
R26
C6
U4
U5
J44
C3
R27
U9
R11
J26
J15
C13
J4
RN2
J41
U13
R29
C2
Figure 2: View of the phyCORE-TC1775 (Controller Side)

phyCORE-TC1775
8©PHYTEC Messtechnik GmbH 2006 L-538e_3
Figure 3: View of the phyCORE-TC1775 (Connector Side)
U16
L1
R22
R35
XT3
D2
R4
TP3
U22
J33
J36
R36
R6
J46
J37
R13
C10
J54
J9
C9
J21
J28
J12
J50
L2
J7 J19
J52
R3
J30
J18
R7
R2
RN1
U8
X1
D8
U25
U18
U21
D1
J29
U6
R21
J53
J32
C17
R5
J31
U12
D5
U10
R28
R19
U24
J11
C7
J39
J5
J35
R20
R1
C8
C19
J51
J34
J1
U20
C12
J38
J45
D3
R17
J20
C11
U7
J10
X4
TP2
J17
J6

Pin Description
©PHYTEC Messtechnik GmbH 2006 L-538e_3 9
2Pin Description
Please note that all module connections are not to exceed their
expressed maximum voltage or current. Maximum signal input values
are indicated in the corresponding controller manuals/data sheets. As
damage from improper connections varies according to use and
application, it is the user's responsibility to take appropriate safety
measures to ensure that the module connections are protected from
overloading through connected peripherals.
As Figure 4 indicates, all controller signals extend to surface mount
technology (SMT) connectors (0.635 mm) lining two sides of the
module (referred to as phyCORE-connector). This allows the
phyCORE-TC1775 to be plugged into any target application like a
"big chip".
A new numbering scheme for the pins on the phyCORE-connector has
been introduced with the phyCORE specifications. This enables quick
and easy identification of desired pins and minimizes errors when
matching pins on the phyCORE module with the phyCORE-connector
on the appropriate PHYTEC Development Board or in user target
circuitry.
The numbering scheme for the phyCORE-connector is based on a two
dimensional matrix in which column positions are identified by a
letter and row position by a number. Pin 1A, for example, is always
located in the upper left hand corner of the matrix. The pin numbering
values increase moving down on the board. Lettering of the pin
connector rows progresses alphabetically from left to right
(refer to Figure 4).

phyCORE-TC1775
10 ©PHYTEC Messtechnik GmbH 2006 L-538e_3
The numbered matrix can be aligned with the
phyCORE-TC1775 (viewed from above; phyCORE-connector
pointing down) or with the socket of the corresponding phyCORE
Development Board/user target circuitry. The upper left-hand corner
of the numbered matrix (pin 1A) is thus covered with the corner of the
phyCORE-TC1775 marked with a white triangle. The numbering
scheme is always in relation to the PCB as viewed from above, even if
all connector contacts extend to the bottom of the module.
The numbering scheme is thus consistent for both the module’s
phyCORE-connector as well as mating connectors on the phyCORE
Development Board or target hardware, thereby considerably reducing
the risk of pin identification errors.
Since the pins are exactly defined according to the numbered matrix
previously described, the phyCORE-connector is usually assigned a
single designator for its position (X1 for example). In this manner the
phyCORE-connector comprises a single, logical unit regardless of the
fact that it could consist of more than one physical socketed
connector. The location of row 1 on the board is marked by a white
triangle on the PCB to allow easy identification.