Sharp PC-E500S User manual

SHARP
1. GENERAL
The
PC-E500S
is
a
modified
version
of
the
PC-E500,
having
the
easy-to-read
FSTN
LCD.
The
major
changes
lie
in
the
resin
key-top
and
the
hard
cover
installation
method.
2. SPECIFICATIONS
* Model : PC-E500S
*
Display
:
40
digits
x
4
lines
(5
x
7
dot
matrix
LCD
Parts marked with "A\" is important for maintaining the safety SHARP CORPORATION
Arithmetic capacity
Arithmetic method
Programming ianguage -
CPU
System ROM
Memory capacity
Stacks
Basic arithmetic
functions
> Single precision;
display)
10 digits (mantissa) +
2 digits (exponent)
Double precision; 20 digits (mantissa) +
2 digits (exponent)
Calculation, however, is performed in
the single precision under the CAL
mode, the MATRIX mode, and the STAT
mode.
: According to the formula (with the
priority discrimination function)
BASIC
: CMOS 8 bit CPU
: 512K byte
> System area .........ee About 3.8K byte
Fixed variable (A - Z) area......... 312 byte
Program data area ............... 28,600 byte
: Totali45 byte
Subroutine ..............6. 4 byte for one step
FOR-NEXT ............-- 21 byte for one step
REPEAT-UNTIL......... 7 byte for one step
WHILE-WEND........... 8 byte for one step
SWITCH-CASE-DEFAULT-ENDSWITCH
Per reece here animes 9 byte for one step
. Basic functions;
Four arithmetic rules
Functional;
Trigonometric, inverse trigonometric, hy-
perbolic, inverse hyperbolic, logarithmic,
exponential, angular transformation,
power raising, power root, coordinate
transformation, square root, ratio of in-
tegers, absolute value, signed function,
ratio of the circumference, and others.
of the set. Be sure to replace these parts with specified ones
for maintaining the safety and performance of the set.
SERVICE
MANUAL
As
sg
a
CODE:
007PCE500SSME
mopeL
PC-E500S
¢ Editing functions
Serial I/O
Communication mode
Communication speed
Parity bit
Word length
Stop bit
Connector
Output signal level
Interface signal
Memory protection
Operating temperatures
Power source
Battery life
Power consumption
External dimensions
Weight
Accessories
> Horizontal cursor control (<, >)
Insertion (INS)
Deletion (DEL, BS)
Line up and down (T, 1)
:
Advance
sync
(asynchronous)
system,
half-duplex/full-duplex
mode
-
300,
600,
1200,
2400,
4800,
9600
bps
: Even, odd, none
: 7, 8 bits
: 1, 2 bits
:
15-pin
connector
(from
connection
with
an external device)
: C-MOS level (4 ~ 6V)
INPUT
0.2...
cere
eessee
ener
eee
enters
RD,
CS,
CD
OUMOUT
occtesiaehs
eoceseca
SD,
RS,
RR,
ER
QHETS
....csccccrccccsconscre
er
seerones
SG,
FG,
VO
:
Battery
backup
(The
program
and
data
in
memory
are
protected
when
the
_ power is off.)
:0°C ~ 40°C
:
Operating;
6V
=
(DC),
Alicaline
battery
(UM4) x 4
Memory
protection;
3V
=;
(DC),
Lithium
battery
(CR2016)
x
1
:
Approx.
70
hours
under
continuous,
nor-
mal
use.
(10
minutes
of
operation
or
pro-
~
gram
execution
per
hour
under
tempera-
ture
of
20
C
with
50
minutes
of
display-
ing.)
The
battery
life
depends
on
the
operat:
ing conditions and usage.
0.09W
: 220mm (W) x 202.5mm (D) x 14mm (F)
(with the hard cover opened)
220mm (W) x 104.5mm (D) x 19mm (F)
(with the hard cover closed)
:
340
g
(including
the
batteries)
:
UM4
battery
x
4
pcs.,
Instruction
manual,
CR2016
battery
*
ipcs.,
screwdriver
(for
replacing
the
memory
backup
battery)
This
document
has
been
published
to
be
used
for
after
sales
service
only.
The
contents
are
subject
to
change
without
notice.

PC-E500S
3. System composition
@)
Cassette
interface
Ft
aa
ee
et
foe
RS-232C
CE-124
Printer & cassette interface]
Pocket computer
PC-E500S
Level converter
CE-130T
Personal Soniplter
CE-126P ¥ RAM card CE-135T euaae
eee
evel
bye)
mE!
Sense
-
required.)
is
CE-2H16M
(16K
byte)
\
CE-2H32M
(32K
byte)
Mark
><
shows
the
cable
©) i eHeehl (oalseyie) which is required according
b
to
the
model.
Pocket disk drive
CE-140F
4. PC-E500S system biock diagram
Voltage
Detecter
IRQ
| LCD LE7766Q
| V1-V6 | ,
DC/DC VEE | Common Columu Columu
Carver: Driver » Driver —® Driver
| HD61203 | HD61202 HD61202
REG ka + |
VDD
=
|
|
|_| Adrr. AO-A17 15
Ceralock
|
PU
___¥Datadob7
| +t
D
29MHz_|
scezoiscor
ceoces
|
#
SST
PCS
—
ee)
hh
KOO~KO10
|
,
1S
=
| =-— CEO rt
EH ez | pam
pe
Ty
boot
td
eee
aK
ROM
AT256
Coe
|
BF
SEES ERRER
Key Matrix
ino

5. Memory map
hy
aad
eae
&HOO000
oe
Coenen
&H10000
.
|
64KB
ead
RAM
card
es
&H20000
=
4M-ROM
CE3
(2Mb)
32KB
16KB
4
Reh
eayhece
gH40000
Fb
RAM
card
RAM
card
ai
&H47FFF
|
CE1
&H4FFFF
r
7
a
CEO
&HB0000
|
RAM
|
(32KB)
a
ea
&HCO0000
!
4M-ROM
CE2
OM)
re
&HFFFFF
§. LSI description
CPU
(SC62015)
pin
signal
description
Pin
No.
|
Signal
name
Signal
description
1
x1
O
Ceramic
oscillation
output
2
AZ
|
|
Ceramic
oscillation
input
3
X38
O
|
CR
oscillation
output
4
x4
|.
|
CR
oscillation
input
5
“YDD
re)
Display
power
(convertor)
control
output
6
|
VCC
POWER
(+)
electrode
input
pin
7
|
RESET
|
Reset
input.
Reset
at
HIGH
level.
8
GND
POWER
(-)
electrode
input
pin
9
TEST
|
|
|
Test
input
10
Ci
|
|
Cassette
signal
input
pin
11
CO
oO
|
Cassette
signal
output
pin
12
ON
|
|
ON
key
input
pin.
Normally
pulled
down
to
LOW
level.
13
WR
O
|
Write
clock.
Normally
HIGH.
14
MRQ
|
—_—
_
(Reserved)
15
K1i0
|
|
oo
| | 4 KEY input pin
2 2 | 2
22
K17
|
|
|
23
DIOO
/O
!
:
|
:
Data
bus
3
|
pio7
|
vo
|
31
|
AO
|
O
|
|
Address
bus
49
A18
O
|
50
VDISP
—
(Reserved)
51
|
VA
=
4
52
oD
O
|
Clock
output
pin
for
display
chip
53
KO15
O
SIO
PRQ
(Reserved)
54
KO14
0
HIGH
with
the
ER
OPEN
command
from
SIO
A
PC-E500S

LPO PE CMAN BCITEI Ak AGATA LCWAT'T 2 ENTERS ER MAR TATA YT TH APE SCTE NTS RT SSP GACT AR NEA WR RI AEE TEN CNT CEPT AL ANG
55
56
57
58
59
60
61
62
63
64
65
66
67
68 |
69
70
74
(72
73
2
82
83
84
86
87
88
89
20
(of
ces OE —~$ Gh cn
Le-9)
to O
85
ooh
1
<2)
PC-E500S
| Pin No. | Signal name
i i nip eS ae a re er a SS ue a a tt
KO13 ©
KO12
KO14
KO10
IRQ
oOUT
CE7
CE6
CES
CE4
CE3
CE2
CEt
CEO
oA.
DIS
HA
RD
KO9
2
KOO
RXD
iT} oH
GQ dd
wethe
mom ot om owt in
a)
ae)
VO
O
e)
.
O
|
OO |
~O}; | |] | ooo]
es HO a te
I-—-- OO |
---O-O0O
| Signal description
SIO RR (Can be received in the main body.)
SIO RS (Main body send request)
Key strobe signal
Low battery detection input pin
(Reserved)
ROM card chip select signal (Active HIGH), 10000~1F FFF
Display chip select signal (Active HIGH), 0O0000~03FFF and 08000~OBFFF
(Reserved)
| Internal ROM chip enable signal, COOOO0~FFFFF
| RAM card chip enable signal, 40000~7FFFF
Internal RAM chip enabie signal, 80000~BFFFF
|
(Reserved)
|
| Key sirobe signal
| SIO RD (Receive data)
| SID SD (Send data)
|
|
CE-140F data input pin
|
i
_ 11 pin DIN, P-ch open output
ae pin DOUT, P-ch open ouipul
| 14 pin [02, P-ch open output
; 11 pin iO1, P-ch open output
| 11 pin ACK
| 11 pin BUSY, P-ch open output
: (Reserved)
- Display power (convertor) contro! signal
, Low battery vailage contro! signal
| SIC CS (Remote station transmission enabie)
| SIOCD (Remoie station send request)
_ | SIO PAK (Reserved)
ee Te
eT et nt RHR |,

7. Low battery detection circuit
This model is equipped with the low battery detection circuit, the
operations of which are described below. (Location Nos. of the parts
are different from the actual ones.)
As
shown
in
the
figure
below,
the
output
of
the
voltage
detecting
IC
[LBIC
(RH5VA39A)]
turns
HIGH
when
input
voltage
VIN
exceeds
detecting
voltage
VD.
When,
on the
contrary,
VIN
falls
below
VD,
the
output
turns
LOW.
The LBIC (RH5VA39A) detects two levels; the CAU level and the
STOP level. For that reason, a voltage applied to the input pin (2 pin)
is
divided
by
R1
and
R2,
and
R2
is
turned
on/off
by
the
CAU
signal
of
G.A.
When the power voltage falls below the CAU level, as shown in Fig.
3,
the
BATT
symbol
lights
up.
When
it
falls
further
below
the
STOP
level, the BATT symbol goes off.
To detect the CAU level, the CPU E3 is turned on (LOW) and the
CPU
IRQ
pin
state
is
checked.
(If
the
IRQ
pin
is
at
LOW,
the
symbol
lights up.) :
When
the
CAU
level
is
detected,
the
CAU
pin
is
turned
off
(HIGH).
(When
the
CAU
E3
is
turned
off,
resistance
is
not
divided,
rising
the
potential
at
BIC
2
pin
and
turning
the
output
from
LOW
to
HIGH.)
Then
the
CPU
IRQ
pin
is
checked
again
to
check
the
STOP
level.
After
detecting
the
STOP
level,
ON
key
and
RESET
key
are
made
invalid.
7
VCC VCC [Fig. 1]
Ag no ePuL
i {
res LB A
CPU E3__ hoicel | IRQ
B
(V) TIN
oo
Power voltage (V)
\.
Voltage
detection
IC
operation
Symbol!
lights
up.
[Fig. 2] [Fig. 3]
Low battery detection circuit check
CAU level VCC-GND: 4.2V - 4.6V
STOP level VCC-GND: 3.8V - 4.2V
8. Current consumption check
Power source: 11-pin connector, +5V - OV applied to VCC (2 pin) -
GND (3 pin)
Current:
At
ON
(BASIC
mode
with
">"
displayed),
3.29
mA
or
less.
At
OFF
(Power
OFF),
22.8
uA
or
less.
Reference
PC-E500S5
[__[eseration | display |
DC-DC =
| converter 3
pvoo | 075m A
TC4S81F
| TC3WO1F
§-1.
Current
consumption
and
low
battery
voltage
detection
Ammeter
Turn on the main DC
| = _ power (+6.3V 40.1 V). a
Ee While pressing ON key,
press RESET key.
* Press Y key to initialize
the internal RAM.
Press PF1 key to go into
the BASIC mode.
*
Check
">"
display
and
|
check
the
current
value.
|
(The
current
should
be
|
3.77
mA
or
less.)
Set
the
DC
power
to+4.1)*
Check
that
the
BATT
|
+0.05V.
symbol
lights
up.
:
|
4
|°
Set
the
DC
power
to,*
Check
that
the
display
is
+3.7V+ 0.1V. out
4
i
eee ne ewww we ee eee ew eee eee
5
Return
the
DC
power
to
|
*
Check
that
the
display
is
|
+6.3V
+
O.1V.
|
out
and
check
—
the
|
:
current.
(The
—
current
|
|
|
should
be
22.8nA.)
1
6
|
*
Disconnect
the
1i-pin
|
|
connector.
|
|
the 11-pin connector with |
a 3.9KQ resistor for 6 |
sec. |
Note:
if
there
are
any
data
or
program,
save
them
in
advance
to
this
check.

PC-E500S
8-2. Backup current detection
Ammeter
DC power
+3V
[ [Operating procedure
1 1° Set the DC power to
+3.0V +0.1V.
* Apply a probe to the |* Check the current value.
backup battery terminal (0.1 nA ~ 2.38 LA)
of the set. (Be careful not |
to mistake the DC power
polarity. The positive (+)
terminal should be
brought into contact with
the battery terminal from
the side, not from the
above, and the negative
(-) terminal should be
connected with the
soldered section.)
* Disconnect the probe.
&-3. Built-in RAM memory protection function check
@ Release the RAM card cover lock switch and turn off the power.
@ Set the builtin RAM memory protection switch to B and remove
one UM4 battery.
@ Connect 2 pin ana 3 pin of the jii-pin connector with a 3.9KQ
resistor for 6 sec.
+ Connecting time: 6 sec
@ Install the UM4 battery which was previously removed to the
original position, set the RAM card lock switch to the lock position,
and press RESET key.
© Check that "NO MEMORY" is displayed. (Check of the memory
protection switch function)
© Set the built-in RAM memory protection switch to A and press ON
key.
@® Check that "MAIN MENU” is displayed. (Check of the memory
protection function)
9. Diag
Entering the diag mode: Turn of the power, keep pressing
key and CJ key, press key.
Release key, then release | SH!
FT] key and LJ Key.
Diag Menu
1 diag
4:aging2
7:ESD
2:LB
5:RAM
8:diag(menu)
S:aging 1
6:FCC
ee (1) Diag check
e Key input (5) LB check
3 key oe (3) Aging 1
4 key input (4) Aging 2
(5) RAM check
6 Key input (6) FOC check
(key input >) Esp check
(8)
| 8 key input
(1) Diag check
Main menu
| 1 key
‘oe
LCD check
Cross-stitch display 1 (LCD left upper corner lights up.)
| ENTER key |
Cross-stitch display 2 ( Inverted cross-stitch display 1)
ENTER key
ance line display 14
| ENTER key
Slanted line dispiay 2 (Inverted sianted-iine display 1)
ENTER key
Rain drop display (Lower half of the screen)
ENTER key
@ ROM check
a
|
i * ROK check
i
PC-E560S Ver, 08
om peg are ere
OK
Ss
|
| * ROM OK! *
} CE key
{
ierror |
ppeme—> | x ROM error! x
PC-E500S Ver. 08
x
ET Corwin any OME
aaa EES |
i The second line
{ inverted display
Jaddress = XXxXxxxX-XXxxxxxh ! Error address
} check sug xxh (true) xxh (err ) | Sum data
ca atel
C-CE key twice.
|
I

PC-E500S
@)
RAM
check
©
Card
RAM
check
—_eeea
ee
—_—a—a—a——y
|}
$$$
|
*
ROM
OK!
*
}
Card
present
—————
|
x
RAM
check
*
PC-E500S Ver. 08
x CARD RAM check x xxKbytes
i aie Ra ey
a
a
a
aan
ER
|
aaa
|
Card
capacity
display
fone»
|
x
ROM
OK!
*
|
The
third
line
inverted
aces
|
{
*
RAM
error!
*
[
display
[
|
address
xxxxxxh
data
xxh(true)
xxh(err)
|
Error
address,
data
OK
|
C-CE
key
twice.
!
*
NO
CARD
*
|
|
|
|
|
|
ENTER
key
* RAM OK! *
To (7) KEY check
[
| * ROM OKI *
} PC-E500S Ver. 08
RN EE coeeehe
VRS emer teats ceri fei eo AT
| ENTER key
-——
—_—_—a—o
ee
end
1
lerror
|
i
}———>
|
*
CARD
RAM
error!
*
xxkbytes
|
The
second
line
| inverted display
|
address
xxxxxxh
data
xxh(true)
xxh(err)
|
Error
address.
cata
Pe
|
OK
|
C-CE
key
twice
ee
a,
iene Tet en Cee
@) 11 pin check
* CARD ROM OK! x
* LIPIN check x
el
en ee
eee
ee
catEEEEE
SSIES
|
ENTER
key
|
$$
$<
$
$< <$
$<
I
|
—_——
|
jerror
|
|
The
second
line
f————>
|
*
JIPIN
error!
*
|
inverted
display
|
check
No.xx
xx
(true)
xx
(error)
|
Error
No.,
data
eas
C-CE
key
twice.
——_— eee ae
OK
—_—————
7 KEY check
————n
nn
een
i
* 1IPIN OKI x
|
|
KEY
Menu
i
|
|
: Ful key check
| ENTER key
1
2: Simplicity key check
EXXKKKKKAKKAKKKAKKAKK
|
|
1
key:
All
keys
check
2
key:
Simple
key
check
&
15
pin
check
A
SC«i
rer
;
|
|
t
|
|
*
I5PIN
check
*
|
a
|
|
[
|
|
*
KEY
check
*
| | |
|
|
|
eK
j
"x"
of
the
pressed
key]
|
Da
nr
|
|
is
displayed.
[
|
i
xxx
|
Indicates
the
key
to
|
|
j
———
oe
La
nner
HE
Pressed.
i |
lerror
| |
The
second
line
|
Correctkey
|
|
jum
|
x
I5PIN
error!
*
|
inverted
display
eee
eee
EE
EEE
{
j
|
check No.xx
xx
(true)
xx
(error)
[Error
No..
data
|
}
incorrect
key
|
i
Es,
|
|
Bie
eee
|
|
*
KEY
error!
*
|
The
first
line
|
40K
|
C-CE
key
twice.
i
[|
rocacex
[inverted
|
————<—
| |
|
display
|
|
| i |
|
xxx
|
|
|
x
J5PIN
OKI
*
| |
t
Ba
end
|
|
|
|
+
All
key
end
IPress
the
correct
key.
|
a
|
|
La
rh
|
*
KEY
OK!
*
|
|
|
ENTER
key
|
¥
j |
'
er
en
ee
ee
ae
RE
|
|
ENTER
key
‘
To Main menu

PC-E500S
(2) LB check
* Low Battery check *
|
|
|
|
a ne |
| Caution lavel
Low Battery check *
| x
* Low Battery! * BATT symbol lights up.
Pa
[ Fatal level
{
Power off
(3) Aging 1
|
Cross-stitch 1 (LCD left upper corner lights up.)
Cross-stitch 2 (inverted cross-stitch 1}
|
Ne
j counter xxxxxxxx j Rotation display
} * ROM check * |
{ [
| PC-E500S Ver. 08 |
|
|
lerror | counter xxxxXxxxx
b> | * ROM error! *
Sree ie se eee ee
counter XXXXXXXX
| * ROM OK! *
H
|
PC-E500S Ver. 08
an ee erErKY ONY
l
H
|
|
j
|
ean
‘
[ae
8
E counter XXXXXXXX
fox ROM OK! x
i %* RAM check *
|
PC-E500S Ver. 08
|
ferror | counter xXxXXxXxxx
p> | ROM OK! x
| * RAM error! *
ee ee ee |
OK | C-CE key twice
Le ee
counter XXXXXXXX
* ROM OKI x
* RAM OK! *
ees ear ee
|
|
{
ee ee eee
|
ete NONI nee ROUND STS: ANGLO SY I GEAR FORE CIES QUNIEI AICATEL MIRESET RIA OH NRE AREY CED SEO YAM UGLY MOORE SERN Bl ONS "ROT SERED MEN Ne AMEE SOC STR NPP Coren? el GEES GRSRUTAG SERENE SERPS NCI eatery Suri Slee® MLE SEI ERE GENET EUTEY
j The second line
j inverted display
j
laddress
©
XXXXxXxX-xxxxxxh
!
Error
address
|
[check
sum
xxh
(true)
xxh
(err
)
1
Sum
data
|
Marereteerrnseein
lnc
remnants
$ 0K C-CE key twice
i The third fine inverted
| display
| address xxxxxxh data xxh(true) xxh(err) | Error address, data
(4) Aging 2
OCR REMIT TET HE EEE AAMT CMR SENATE LOC TOE ECTS SCA COD MN ANE ON SON ST ONS OE A A A a a a a A A Te A Sat PA OLE Clinimieh AMS A SP
ABOU TA CeMPrED NANTES EWA RUE GG) Ket CHAP ARETE cmH MNCS ETE
|
Cross-stitch 1 (LCD fett upper corner lights up.)
Cross-stitch 2 (Inverted cross-stitch display 1)
—
a aaa TS |
counter XXXXXXXX Rotation display
|
|
| |
ee ee ne
4 About 50 sec later
SS. ee er
f counter xXxXXxXXxxx | Rotation display
| x ROM check * |
| |
j |
PC-E500S Ver. 08
[
[
ferror | counter xXxxXXxXxxx
bp———> | x ROM error! *
jaddress = XXXXXX~XXKXXXh
} check sum xxh (true) xxh (err )
j The second line
| inverted display
| Error address
| Sum data
OK
2 |
| counter xxxXxxXxxx
| * ROM OKI x
|
|
O-CE key twice
PC-E500S Ver. 08
|
i —_____-—--__
{
|
| counter xxxXxXxxXxx
} x ROM OKI x
| * RAM check x
| PC-E500S Ver. 08
|
{
i
ferror | counter xXxxxxxxx
p> | « ROM OK! x
| « RAM error! *
I display
|
pO
} t
{
¥
OK ; C-CE key twice
OTE AW UIE ERE ETERS TACTEM =| PASAT SBE
counter XXXXXXXX
* ROK OK! x
* RAM OK! x
a KIN Ae wl eT
RUNS SADR -C RETO SEIS
(5) RAM check
RAM WRITING |
et SED GH se
RAM VERIFING !
ee a ld
; error
on RAM VERIFY
oe ae
*
RAM
error!
*
j
display
baddress xxxxxxh date xxh(true) xxh(err) | Error address, data
| C-CE key twice
4
To Main menu
So ere mre Loe
jae]
as)
| winute FAIT
Oc ce ee
Merinee sraremtht Mpeeete: Spm
|
| The third line inverted
| address xxxxxxh data xxh(true) xxh(err) | Error address, data
| The third line inverted

RAW YERIFING !
feet
|
I
|
ee
ferror |
p———> | RAM VERIFY
|
*
RAM
error!
*
|
display
|
address
xxxxxxh
data
xxh(true)
xxh(err)
|
Error
address,
data
|
fe en on
OK
|
C-CE
key
twice
OO
i
4
RAM
WRITING
|
To
Main
menu
re ae se
RAM VERIFING !
ee OS es
j display
laddress
xxxxxxh
data
xxh(true)
xxh(err)
|
Error
address,
data
OK
|
C-CE
key
twice
{
To Main menu
[
|
|
| error
eee | RAN VERIFY
{|
*
RAM
error!
*
i
display
i
}address
xxxxxxh
data
xxh(true)
xxh(err)
|
Error
address,
data
i
Gea
4
OK
|
C-CE
key
twice
eee
|
+
+
RAK
OK!
*
To
Main
menu
RCRD Nerney MPEDetHS Neca AM"
|
|
|
ee
eens
| ENTER key
To Main menu
(6) FCC check
erro
-nkn—_—_—
ee
|
|
————
|
HHHHHHHHHHHBHAHHHHHHHWHHAHAKHAKHHHHHH
|
|
HHHHHHHHHHAHHHRH
HARE
ARH
|
|
HHHH
HHH
HHAHHAHRAH
HARA
RRR
|
|
HHHHHHHHHAHHABHHH
HARB
HAAR
|
Koper
senspensnseeersaceerssnee
One
line
of
“"HHHH---HHHH"
is
printed
in
the
CE-126P.
One
line
of
"HHHH---HHHH"
is
printed
in
the
CE-515P.
ncn
nerd
|
|
|
|
|
|
|
|
| The third line inverted
| The third line inverted
{ The third line inverted
eee
PC-E500S
(7) ESD check
ESD menu
CL ——————————_——L—
|
ESD
Menu
|
|
i:write
MAIN
RAM
2:write
CARD
RAM
j
|
3:read
MAIN
RAM
4:read
CARD
RAM
|
S:write/read MAIN 6:write/read CARD |
fern
ronal
] 1 key input
write MAIN RAM
| 2 key input
write CARD RAM
| 3 key input
read MAIN RAM
| 4 key input
fp—————————) read CARD RAM
| 5 key input
write/read MAIN RAM
| 6 key input
write/read CARD RAM
@ write MAIN RAM
SSS
|
| MAIN RAM WRITING !
|
a
t
To ESD menu
@ write CARD RAM
ns
|
CARD RAM WRITING ! XXKbytes
TONE TCE STH
ee
ea
ee
Se
4
To ESD menu
@ read MAIN RAM
MAIN RAM VERIFING !
erent CHEE ere aT
eres Aire idee CRT
error
|
|
j
MAIN
RAM
VERIFY
i
The
third
ling
invertes
{
*
RAM
error!
*
i
display
{address
xxxxxxh
data
xxh(true)
xxhCerr)
|
Error.address,
data
+
OK
|
C-CE
key
twice
To
ESD
menu
L
To ESD menu

PC-E5008
® read CARD RAM
—————
+} Card present
CARD RAM VERIFYING ! xxKbytes
ee ee is eS SE ED Se
Card capacity display
No card
* NO CARD x
ee ne dN |
y ENTER key
To ESD menu
ta mr a |
error |
f-——> | CARD RAM VERIFY xxKbytes | The third fine inverted
| | * RAM error! * i display
| J address xxxxxxh data xxh(true) xxh(err) | Error address, data
NT
40K | C-CE key twice
To ESD menu
To ESD menu
©) write/read MAIN RAM
ern! |
i |
i a aa TEES |
i | [
1 | MAIN RAM WRITING | |
i | |
1 | i
j CR OL |
i {
[Et eT |
1 | [
} | MAIN RAM VERIFING ! |
i | {
I | |
i ee TTT |
i i
| l
| | ————— ee ee ee ee gE
{ lerror | |
i pome——> | WAIN RAM VERIFY | The third line inverted
[
|
|
*
RAM
error!
*
1
display
| }address xxxxxxh data xxh(true) xxh(err) | Error address, data
a eee ea) eee
es OK | C-CE key twice
Interrupt with C-CE key. (To ESD menu} \
To ESD menu
© write/read CARD RAM
|
CARD RAM WRITING ! xxKby tes
CARD RAM VERIFING ! xxKbytes
a a revel nS
error |
} CARD RAK VERIFY xxKbytes | The third line inverted
| * RAM error! * j display
| address xxxxxxh data xxh(true) xxh(err) } Error address, data
ee |
eA Mp | Semi GA SEE TD SR HOON SG A A ST CH NA AT SERMON) pti MAMA AACMAERES WORT
ret CE rele ee
|
bed (kK | C-CE key twice
interrupt with C-CE key. (To ESD menu)
1
To ESD menu
tie
(8) Diag check (menu form)
Perform each check of (1) diag check individually.
Diag menu
fe ee eee ee
| * check list 2 *
|
| 1: LCD check 2: ROM check |
| 3: RAM check 4: KEY check |
} 5: lipin check 6: 15pin check |
| 1 key input
(1) LCD check of (1) diag.
| 2 key input
pe ——————_ (2) ROM check of (1) diag.
| 3 key input
(3) RAM check of (1) diag.
| 4 key input
{7} KEY check of (1) diag.
| 5 key input
(4) 11 pin check of (1) diag.
j 6 key input
(5) 15 pin check of (1) diag.
After completion of each check, the controi returns to the diag menu.
wa — PRQ|
CN2
&
fo
T1PIN