SOLTEK SL-54U5 Use and care manual

ii
Notice to End Users
This UserÕs Guide & Technical Reference is for assisting system
manufacturers and end users in setting up and installing the
mainboard.
Every effort has been made to ensure that the information in this
manual is accurate. Soltek Computer Inc. is not responsible for
printing or clerical errors. Information in this document is subject
to change without notice and does not represent a commitment on
the part of Soltek Computer Inc.
No part of this manual may be reproduced, transmitted, translated
into any language in any form or by any means, electronic or
mechanical, including photocopying and recording, for any purpose
without the express written permission of Soltek Computer Inc.
Companies and products mentioned in this manual are for
identification purposes only. Product names appearing in this
manual may or may not be registered trademarks or copyrights of
their respective companies.
SOLTEK COMPUTER INC. PROVIDES THIS MANUAL ÒAS ISÓ
WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OR
CONDITIONS OF MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE. IN NO EVENT SHALL SOLTEK COMPUTER
INC. BE LIABLE FOR ANY LOSS OR PROFITS, LOSS OF BUSINESS, LOSS
OF USE OR DATA, INTERRUPTION OF BUSINESS, OR FOR INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES OF ANY
KIND, EVEN IF SOLTEK COMPUTER INC. HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES ARISING FROM ANY DEFECT OR
ERROR IN THIS MANUAL OR PRODUCT.
© Copyright 1998 Soltek Computer Inc. All right reserved
Web site: http://www.soltek.com.tw
email: [email protected]
Edition: October 1998
Version: 3.0
SL–54U5, 54U1 SERIAL

Contents iii

iv
Contents
Chapter 1: Introduction --------------------------------------- 1
Features -------------------------------------------------------------------------1
CPU ------------------------------------------------------------------------1
Chipset -------------------------------------------------------------------- 1
L2 Cache ------------------------------------------------------------------1
Main Memory ----------------------------------------------------------- 1
BIOS ------------------------------------------------------------------------ 2
I/O Function -------------------------------------------------------------2
Other Functions --------------------------------------------------------- 2
Mainboard Setting for Pentium MMX-200----------------------------- 3
Chapter 2: Hardware Setup---------------------------------- 4
CPU VCORE Voltage Setting---------------------------------------------- 4
JP3: CPU VCore Voltage Setting -----------------------------------4
AGP Driver for Win95 Installation --------------------------------------5
Requirement -------------------------------------------------------------5
Installation Procedure -------------------------------------------------5
Intel Pentium MMXÐ166/200/233 CPUs ------------------------------6
AMD K6 CPU Settings------------------------------------------------------7
AMD K6 Ð 166/200/233/266/300 and K6-2 266 CPUs ------- 7
AMD K6-2 Ð 250/300/333/350/380/400 CPU Settings ------------8
Cyrix/IBM 6x86MX Ð PR200/233/266 CPUs ------------------------- 9
IDT C6 Ð 200/225 CPUs -------------------------------------------------- 10
Intel Pentium/AMD K5 Ð 133/166/200 CPUs---------------------- 10
System Memory Configuration----------------------------------------- 11
Jumper Settings ------------------------------------------------------------- 11
JP2: Clear CMOS Data ---------------------------------------------- 11
JP17, JP18: CPU Dual/Single Voltage Select ------------------ 12
SW1: 4~6: Bus Ratio Select----------------------------------------- 12
JP1, JP6: SDRAM Clock Setting----------------------------------- 13

Contents v
JP7, JP8: Chipset Clock Settings ---------------------------------- 13
IDE LED Activity Light: (J1 pin1Ð4)------------------------------ 14
Infrared Port Module Connector (J1 pin6Ð10) ----------------- 14
J1 pin12, 13: ATX Power Button ---------------------------------- 14
J1 pin14, 15: Reserved ----------------------------------------------- 14
Speaker Connector (J2 pin1Ð4) ------------------------------------ 14
Reset Switch (J2 pin5, 6)--------------------------------------------- 14
Power LED and Keylock Switch (J2 pin8Ð12)------------------ 14
Turbo LED (J2 pin14, 15)-------------------------------------------- 15
USB: USB Connector ------------------------------------------------ 16
J1 Switch Signal Summary ----------------------------------------- 17
J2 Switch Signal Summary ----------------------------------------- 18
Chapter 3: BIOS Setup ---------------------------------------19
Standard CMOS Setup ---------------------------------------------------- 20
BIOS Features Setup ------------------------------------------------------- 22
Chipset Features Setup --------------------------------------------------- 25
Power Management Setup ----------------------------------------------- 28
PnP/PCI Configuration Setup ------------------------------------------ 30
Load Setup Defaults ------------------------------------------------------- 33
Integrated Peripherals ---------------------------------------------------- 34
Supervisor/User Password---------------------------------------------- 37
IDE HDD Auto Detection ------------------------------------------------ 38
Save & Exit Setup ---------------------------------------------------------- 38
HDD Low Level Format -------------------------------------------------- 38
Exit Without Saving ------------------------------------------------------- 39

Introduction 1
Chapter 1
Introduction
Features
CPU
1. Supports Intel Pentium P54C/MMX (P55C) CPUs at 133
~ 233 MHz;
2. Supports Cyrix/IBM 6x86(L) CPUs at PR133+~ PR250+
MHz and 6x86MX/MII CPUs at PR166+~ PR350+MHz;
3. Supports AMD K5: PR133 ~ PR200MHz, AMD K6: 166 ~
300MHz, and AMD K6-2: 250 ~ 400MHz;
4. Suports IDT C6: 200 ~ 225MHz;
5. Provides SOCKET 7 ZIF Socket;
6. Supports 66/75/83/95/100/112/124/133 MHz CPU clock;
7. Supports CPU voltage auto detect and switching circuit.
Chipset
1. VIA Apollo MVP3 chipset;
2. PCI Rev 2.1 and APM1.1/1.2 compliant.
L2 Cache
1. Onboard supports 512k or 1MB write back cache with
Pipelined Burst SRAMs.
Main Memory
1. Memory range from 4MB (minimum) to 768MB
(maximum) with DRAM Table Free configurations;
2. Supports Fast Page Mode/EDO/SDRAM;
3. Supports 2pcs 72pin SIMM sockets and 2 pcs of 168pin
DIMM sockets (3.3V unbuffered type).

2
BIOS
1. AWARD Plug and Play BIOS;
2. Supports Advanced Power Management Function;
3. Flash Memory for easy upgrade.
I/O Function
1. Integrated USB (Universal Serial Bus) controller with
two USB ports;
2. Supports 2 IDE channels with 4IDE devices (including
120MB IDE floppy);
3. Provides PCI IDE Bus Master function;
4. One floppy port;
5. Two high speed 16550 FIFO UART ports;
6. One parallel port with EPP/ECP/SPP capabilities;
7. PS/2 mouse connector;
8. Infrared module connector.
Other Functions
1. AT Form Factor with 22cm x 24cm;
2. 3 PCI Master slots, 3 ISA slots, and 1 AGP slot;
3. Supports SCSI/CD-ROM Boot function.
Note: 1. Make sure that the SDRAM module not only has
to be 168 pin DIMM but designed for 3.3V
unbuffered SDRAM as well. Double check with
the SDRAM supplier before install any
SDRAMs. The mainboard manufacturer has no
obligation to any damage of the board by using
the incorrect specification of SDRAM.
2. Do not mix EDO and SDRAM together for the
system stability.
3. For 100MHz CPU environment, the SDRAM
must compliant PC-100 specification,
otherwise, the system maybe unstable.

Introduction 3
Mainboard Setting for Pentium MMX-200
The default settings of the following figure is for the INTEL
Pentium MMX-200, Vcore: 2.8V.
ISA3 ISA2 ISA1
PCI2 PCI1
PCI3
W83877F/TF
MS1 KB1
AT Power Con
ATX Power Con
VT82C586B
SIMM1 SIMM2
DIMM1 DIMM2
IDE2
IDE1
LPT
FDC Con
COM2COM1
FLASH BIOS
Li
BAT
Clock
Gen
1
JP2
1
CPU
FAN
PCI SLOTS
ISA SLOTS
MMX-200 CPU
Pipelined
SRAM
Pipelined
SRAM
USB
AGP Slot
VIA
MVP3
1
2
3
4
5
6
ON
JP3
78
12
J2 HD/LED IR PWR/SW
J1 T/LEDKEYLOCKRESETSPK
TAG
SW1
Off On
On
Off On
Off
12
1516
1
JP1
1
JP6
JP7
JP8
1
JP17 JP18
Figure 1–1. SL–54U5/54U1 Motherboard Layout
Note: Double Check JP1, JP6 ~ JP8 if system can not be
boot up.

4
Chapter 2
Hardware Setup
CPU V
CORE
Voltage Setting
JP3: CPU V
Core
Voltage Setting
3.1V
3.5V
Pentium (P54C)
6x86
K5
VCore
Voltage
3.0V 3.4V
2.9V
K6Ð166/200
6x86MX (MII)
3.3V
IDT C6
2.8V
MMX, 6x86L
3.2V
K6Ð233
VCore
Voltage
2.4V
2.0V
VCore
Voltage
2.5V
2.6V
2.7V
2.1V
2.2V
K6-266
(or higher)
K6-2
2.3V
VCore
Voltage
JP3 JP3 JP3 JP3
CPU Type VCore
Pentium (P54C), 6x86, K5 3.52V
MMX (P55C), 6x86L 2.8V
IDT C6 3.3V
K6-166/200, 6x86MX/MII 2.9V
K6-233 3.2V
K6-266 (or higher), K6-2 2.2V

Hardware Installation 5
Note: 1. Refer to the table above to choose the correct
voltage for the CPU everytime that you install a
CPU.
2. Make sure that your JP3 is matched with the
CPU voltage, otherwise will damage the CPU or
make the system unstable.
3. When the new CPU is announced and is not
listed on this manual, please refer to the above
table, select the correct voltage setting for it.
AGP Driver for Win95 Installation
Requirement
¥ Microsoft Windows95OSR2.1 (OSR2.0 with USB upgrade)
¥ Apollo MVP3 AGP VxD Driver
¥ AGP VGA Card with Driver
¥ DirectX 5.0 (or higher) DDK or SDK
Installation Procedure
Step1 Go to the next step if you are running
Win95OSR2.0/2.1, and if not, install Windows95
4.00.950B or later version
Step2 Install USBSUPP.EXE program (USB upgrade)
Step3 Install Microsoft DirectX 5.0 (or higher) DDK or
SDK
Step4 Install AGP driver for Windows95
Step5 Install Apollo MVP3 AGP VxD Driver, run
ÒSETUP.EXEÓ program
To make sure if the Apollo MVP3 AGP driver is properly
installed, boot up the system and run the ÒRegeditÓ to check
if the following path with VIAGARTD exists:

6
ÒHKEY_LOCAL_MACHINES\System\CurrentControlSet\
Services\VxDÓ.
Follow the below procedure to check if the AGP driver is
capable to activate:
1. Activate ÒControl Panel,Ó
2. Click ÒDirectX,Ó
3. Click ÒDirectDraw,Ó and
4. Check if there are some values in ÒBitÓ and ÒOverlays.Ó
If there are some values, the AGP is able to activate.
Intel Pentium MMX–166/200/233 CPUs
1 Off
2
On
3
On
4
5
On
On
6 Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
MMX–166
Off
On
On
Off
On
Off
MMX–200
Off
Off
Off
On
On
Off
MMX–233
Intel MMX CPUs
JP3
78
12
SW1
(2.8V)
1
JP1
1
JP6
JP7
JP8
1
JP17 JP18
Figure 2–1. CPU Type Configuration

Hardware Installation 7
AMD K6 CPU Settings
AMD K6 – 166/200/233/266/300 and K6-2 266 CPUs
1 Off
2
On
3
On
4
On
5
On
6 Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
K6–166 K6–200 K6–233
Off
On
On
Off
On
Off
Off
Off
Off
On
On
Off
1
2
3
4
5
6
ON
K6-2-266
K6–266
Off
On
Off
On
On
On
1
2
3
4
5
6
ON
K6–300
Off
On
On
On
On
On
AMD K6 CPUs
JP3
78
12
SW1
JP3
78
12
JP3
78
12
JP3
78
12
(2.9V) (2.2V) (3.2V)
1
JP1
1
JP6
JP7
JP8
K6–166
K6–200 K6-2-266 K6–266/300 K6–233
1
JP17 JP18
Figure 2–2. CPU Type Configuration
Note: 1. K6–233 CPU is 3.2V. Please check its spec
before using it.
2. K6–266/300 is 2.2V CPU. Make sure that its
specification before using it.

8
AMD K6-2 – 250/300/333/350/380/400 CPU
Settings
Off
On
On
Off
Off
Off
1
Off
Off
Off
2
3
Off
Off
4
5
On
6
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
K6-2–333
(95MHz x 3.5)
Off
On
Off
Off
Off
Off
1 Off
2
On
3
On
4
5
Off
Off
6 Off ON
K6-2–250
(100MHz x 2.5)
K6-2–300
(100MHz x 3.0)
Off
Off
Off
Off
Off
Off
K6-2–350
(100MHz x 3.5)
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
On
On
Off
On
Off
Off
K6-2–380
(95MHz x 4.0)
K6-2–400
(100MHz x 4.0)
AMD K6-2
CPUs
JP3
78
12
SW1
(2.2V)
1
JP1
1
JP6
JP7
JP8
1
JP17 JP18
Figure 2–3. CPU Type Configuration
Note: 1. JP1 and JP6 are used to set the SDRAM clock
the same as the AGP clock (66MHz), however
in the 100MHz Bus Clock environment, make
sure that the SDRAM is compliant with PC-100
spec., otherwise JP1 and JP6 should be set
as above.
2. K6 2-266 setting is the same as K6-266.
3. Only the new model clock generator (e.g.,
Winbond W83194R-37, ICS 9148AF-58,
PhaseLink PLL52C66-29), supports 95MHz,
please check with your dealer before using
K6 2-333 CPU.

Hardware Installation 9
Cyrix/IBM 6x86MX – PR200/233/266 CPUs
MII – 300/333/350 CPUs
1 Off
2
On
3
On
4
On
5
On
6 Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
6x86MX–PR200
(66MHz x2.5)
6x86MX–PR233
(66MHz x 3.0)
6x86MX–PR266
(75MHz x 3.0)
Off
On
On
Off
On
Off
1 Off
2
On
3
4
Off
5
Off
On
6 Off
ON
1
2
3
4
5
6
ON
6x86MX–PR200
(75MHz x 2.0)
6x86MX–PR233
(75MHz x2.5)
Off
On
On
On
Off
Off
Off
Off On
Off On
Off
1
2
3
4
5
6
ON
6x86MX–PR266
(83MHz x 2.5)
Off
On
On
On
Off
Off
Cyrix/IBM
6x86MX/MII
CPUs
JP3
(2.9V)
78
12
SW1
1
JP1*
1
*JP6
JP7
JP8
1 Off
2
3
4
On
5
On
6 Off
Off
Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
MII–300
(66MHz x 3.5)
MII–333
(66MHz x 4.0)
MII–350
(83MHz x 3.5)
Off
On
On
On
Off
On
1
2
3
4
5
6
ON
MII–333
(83MHz x 3.0)
Off
On
Off
Off On
Off
Off
Off
Off
Off On
Off
1 Off
Off 2
3
4
5
On
On
6 Off
Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
MII–300
(75MHz x 3.0)
MII–333
(75MHz x 3.5)
MII–350
(100MHz x 3.0)
Off
Off On
Off
Off
Off
1
2
3
4
5
6
ON
MII–333
(100MHz x 2.5)
Off
On
Off
Off
On
Off
Off
Off
Off
Off
On
Off
JP7
JP8
1
For 66/75MHz
JP7
JP8
1
For 83MHz
JP7
JP8
1
For 100MHz
1
JP17 JP18
Figure 2–4. CPU Type Configuration
*: See notes on page 8.

10
IDT C6 – 200/225 CPUs
1 Off
2
3
4
5
On
On
6
Off On
Off
Off
Off
ON
1
2
3
4
5
6
ON
C6-200
Off
Off On
On
C6-225
IDT C6
CPUs
JP3
78
12
SW1
(3.3V)
1
JP1
1
JP6
JP7
JP8
1
JP17 JP18
Figure 2–5. CPU Type Configuration
Intel Pentium/AMD K5 – 133/166/200 CPUs
1 Off
2
On
3
On
4
On
5
On
6 Off
ON
1
2
3
4
5
6
ON
1
2
3
4
5
6
ON
Pentium–166
K5–PR166 Pentium–200 K5–PR200 Pentium–133 K5–PR133
Off
On
On
Off
On
Off
Off
On
Off
On
Off
Pentium/K5 CPUs
JP3
78
12
SW1
On
1
JP1
1
JP6
JP7
JP8
(3.5V)
1
JP17 JP18
Figure 2–6. CPU Type Configuration

Hardware Installation 11
System Memory Configuration
This Apollo MVP3 motherboard supports 72-pin SIMMs and
168pin DIMMs (3.3V unbuffered type) of 4MB, 8MB, 16MB,
or 32MB to form a memory size between 4MB to 1GB (total
of 6 rows are supported).
The Apollo MVP3 chipset supports ÒTable FreeÓ
configuration so that DRAM module can be installed at any
capacity.
Note: 1. Do not recommend to mix EDO and SDRAM
together for the system stability.
2. For 100MHz CPU environment, the SDRAM must
compliant PC-100 specification, otherwise the
system maybe unstable.
Jumper Settings
JP2: Clear CMOS Data
Clear the CMOS memory by shorting this jumper on 2Ð3
momentarily; then remove the cap to retain new settings.
COMS Data JP2
Retain Data
(default)
3
1
Clear Data
3
1

12
JP17, JP18: CPU Dual/Single Voltage Select
Single
Votage
Dual
Votage
Pentium P54C, K5,
6x86, IDT
MMX, 6x86L/6x86MX,
K6, K6-2, MII
JP17/JP18
3
1
CPU Type
3
1
Note: Wrong setting of JP17/JP18 will damage the CPU.
Please double check before powering on the
system.
SW1: 4~6: Bus Ratio Select
SW1: 1~3: CPU Clock Setting
Set the SW1 jumper according to your CPU Bus Ratio and
CPU Clock.
ON
Off
6
5
4
Off
Off
On On
On On
1.5x or
3.5x
ON
6
5
4
Off
Off
2.0x 2.5x 3.0x
ON
6
5
4
Off
ON
Off
6
5
4
Off
SW1: 4~6
CPU Bus
Ratio Setting
On
On
Off
66MHz 75MHz
ON
3
2
1
ON
Off
3
2
1
On
On
83MHz
ON
Off
3
2
1
Off
Off
100MHz
ON
Off
3
2
1
Off
112MHz
ON
3
2
1
On
Off
95MHz
ON
On
On
On Off
124MHz
ON
On
On
133MHz
ON
3
2
1
Off
On
On
3
2
1
Off
Off
CPU Bus
Ratio Setting
ON
6
5
4
Off
On
On
On Off
On Off
4.0x
ON
6
5
4
On
On
4.5x 5.0x 5.5x
ON
6
5
4
On
ON
Off
6
5
4
On
SW1: 4~6
CPU Bus
Ratio Setting
SW1: 1~3
Note: Only the new clock generator supports 95MHz.
Please check with your dealer before using it.

Hardware Installation 13
JP1, JP6: SDRAM Clock Setting
SDRAM
Clock
AGP Clock
(66MHz)
CPU Clock
(default)
SDRAM clock
synchronous with
AGP clock.
SDRAM clock
synchronous with
CPU clock.
JP1 JP6
31
31
13
13
Note
Note: The default settings for JP1 and JP6 are set the way
that SDRAM clock is synchronized with CPU clock, if
CPU is 100MHz clock and SDRAM can't comply
with CPU clock, then, use the “SDRAM
asynchronous with CPU” setting (i.e., SDRAM clock
is always 66MHz), or you need to change SDRAM
so that it is compliant with 100MHz spec.
JP7, JP8: Chipset Clock Settings
JP7 and JP8 settings must depend on the CPU clock. The
system will not boot up with wrong setting.
Chipset
Clock
60/66/75 MHz
(÷2)
83 MHz
(÷2.5)
100 MHz
(÷3)
JP7
JP8
31
JP7
JP8
31
JP7
JP8
31
JP7
JP8

14
IDE LED Activity Light: (J1 pin1–4)
This connector connects to the hard disk activity indicator
light on the case.
Infrared Port Module Connector (J1 pin6–10)
The system board provides a 5-pin infrared connectorÑIR1
as an optional module for wireless transmitting and
receiving. Pin 6 through 10 are Transmit, GND, Receive
(low speed), Receive (high speed), and Vcc, respectively.
J1 pin12, 13: ATX Power Button
Toggle this switch to turn on/off the system.
J1 pin14, 15: Reserved
Speaker Connector (J2 pin1–4)
The speaker connector is a 4-pin connector for connecting
the system and the speaker. (See the following drawing for
jumper position.)
Reset Switch (J2 pin5, 6)
The system board has a 2-pin connector for rebooting your
computer without having to turn off your power switch.
This prolongs the life of the systemÕs power supply.
Power LED and Keylock Switch (J2 pin8–12)
The keylock switch is a 5-pin connector for locking the
keyboard for security purposes. (See the following drawing
for jumper position, and pin1~3 is connected to power LED
and pin 4~5 is connected to keylock switch.)

Hardware Installation 15
Turbo LED (J2 pin14, 15)
Connect the caseÕs turbo LED to this connector.
J1
HD/LED IR Power Button
J2
T/LEDKEYLOCKRESETSPK
J1
HD/LED IR Power
Button
J2
T/LEDKEYLOCKRESETSPK
Reset Power
LED
SPK Turbo
LED
J2
IR CON
HD/LED
J1
Power
Button
Keylock
1234 678910 12131415
123456 89101112 1415

16
USB: USB Connector
This jumper connects to the USB cable to provide USB
device.
1
USB
MS1
COM1/2
GND
D1–
D1+
Vcc
GND
Vcc
D0+
D0–
GND
16 15
21
GND
TX
DTR
RX
RING
RTS
CD
N.C.
CTS
DSR
12345
678910
GND
N.C.
Mouse
Data
+5v
Mouse
Clock
N.C.
MS1 Top View COM1/2 (Top View)