Teridian 73S1217F User manual

Simplifying System Integration
TM
73S1217F
Evaluation Board User Guide
August 17, 2009
Rev. 2.4
UG_1217F_040

73S1217F Evaluation Board User Guide UG_1217F_040
2 Rev. 2.4
© 2009 Teridian Semiconductor Corporation. All rights reserved.
Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation.
Simplifying System Integration is a trademark of Teridian Semiconductor Corporation.
Microsoft, Windows and Vista are registered trademarks of Microsoft Corporation.
Signum is a trademark of Signum Systems Corporation.
Keil is a trademark of ARM®Ltd.
Linux is a registered trademark of Linus Torvalds.
Slackware is a registered trademark of Patrick Volkerding and Slackware Linux, Inc.
Fedora is a registered trademark of RedHat, Inc.
All other trademarks are the property of their respective owners.
Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expressly
contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms
and Conditions. The company assumes no responsibility for any errors which may appear in this
document, reserves the right to change devices or specifications detailed herein at any time without
notice and does not make any commitment to update the information contained herein. Accordingly, the
reader is cautioned to verify that this document is current by comparing it to the latest version on
http://www.teridian.com or by checking with your sales representative.
Teridian Semiconductor Corp., 6440 Oak Canyon, Suite 100, Irvine, CA 92618
TEL [phone], FAX [phone], http://www.teridian.com

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 3
Table of Contents
1Introduction ...................................................................................................................................4
1.1 Evaluation Kit Contents.........................................................................................................5
1.2 Evaluation Board Features....................................................................................................5
1.3 Recommended Equipment and Test Tools............................................................................5
2Evaluation Board Basic Setup......................................................................................................6
2.1 Connecting the Evaluation Board with an Emulation Tool......................................................7
2.2 Loading User Code into the Evaluation Board .......................................................................8
3Using the USB CCID Application................................................................................................10
3.1 Driver and Host Demonstration Software Installation...........................................................10
3.1.1 Driver and Software Installation on a Linux System....................................................11
3.2 Frequently Asked Questions...............................................................................................11
4Evaluation Board Hardware Description....................................................................................13
4.1 Jumpers, Switches and Modules.........................................................................................13
4.2 Test Points .........................................................................................................................18
4.3 Schematic...........................................................................................................................19
4.4 PCB Layouts.......................................................................................................................20
4.5 Bill of Materials ...................................................................................................................26
4.6 Schematic Information ........................................................................................................29
4.6.1 Reset Circuit..............................................................................................................29
4.6.2 Oscillators .................................................................................................................29
4.6.3 LCD ..........................................................................................................................30
4.6.4 USB Interface............................................................................................................30
4.6.5 Smart Card Interface .................................................................................................31
5Ordering Information...................................................................................................................32
6Related Documentation...............................................................................................................32
7Contact Information.....................................................................................................................32
Revision History..................................................................................................................................33
Figures
Figure 1: 73S1217F / 1210F Evaluation Board.........................................................................................4
Figure 2: 73S1217F Evaluation Board Basic Connections........................................................................6
Figure 3: 73S1217F Evaluation Board Basic Connections with ADM-51 ICE............................................7
Figure 4: EmulatorWindow Showing RESET and ERASE Buttons...........................................................9
Figure 5: Emulator Window Showing Erased Flash Memory and File Load Menu.....................................9
Figure 11: 73S1217F Evaluation Board Jumper, Switch and Module Locations......................................17
Figure 12: 73S1217F Evaluation Board Electrical Schematic.................................................................19
Figure 13: 73S1217F Evaluation Board Top View (Silkscreen)...............................................................20
Figure 14: 73S1217F Evaluation Board Bottom View (Silkscreen)..........................................................21
Figure 15: 73S1217F Evaluation Board Top Signal Layer ......................................................................22
Figure 16: 73S1217F Evaluation Board Middle Layer 1 – Ground Plane.................................................23
Figure 17: 73S1217F Evaluation Board Middle Layer 2 – Supply Plane .................................................24
Figure 18: 73S1217F Evaluation Board Bottom Signal Layer .................................................................25
Figure 6: External Components for RESET............................................................................................29
Figure 7: Oscillator Circuit......................................................................................................................29
Figure 8: LCD Connections....................................................................................................................30
Figure 9: USB Connections ...................................................................................................................30
Figure 10: Smart Card Connections.......................................................................................................31
Tables
Table 1: Flash Programming Interface Signals.........................................................................................8
Table 2: Evaluation Board Jumper, Switch and Module Description .......................................................13
Table 3: Evaluation Board Test Point Description...................................................................................18
Table 4: 73S1217F Evaluation Board Bill of Materials............................................................................26

73S1217F Evaluation Board User Guide UG_1217F_040
4 Rev. 2.4
1 Introduction
The Teridian Semiconductor Corporation (TSC) 73S1217F Evaluation Board is used as a platform to
demonstrate the capabilities of the 73S1217F Smart Card Controller devices. It has been designed to
operate either as a standalone or a development platform.
The 73S1217F Evaluation Board can be programmed to run any of the Teridian turnkey applications or a
user-developed custom application. Teridian provides its USB CCID application preloaded on the board
and an EMV testing application on the CD.
Applications can be downloaded through the In-Circuit-Emulator (ICE) or through the TSC Flash
Programmer Model TFP2. As a development tool, the evaluation board has been designed to operate in
conjunction with an ICE to develop and debug 73S1217F based embedded applications.
Figure 1: 73S1217F / 1210F Evaluation Board

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 5
1.1 Evaluation Kit Contents
The 73S1217F Evaluation Kit contains the following:
•73S1217F Evaluation Board: 4-layer, rectangular PWB as shown in Figure 1(identification number
E1217FN12B1 Rev B), containing the 73S1217F with the preloaded USB CCID application.
•USB cable, A-B, male/male, 2 meters (Digi-key AE9932-ND).
•5 V DC power supply.
•CD containing documentation (data sheet, and user guides), Software API libraries, evaluation code
and utilities.
1.2 Evaluation Board Features
The 73S1217F Evaluation Board (see Figure 1) includes the following:
•USB 2.0 full speed interface
•RS-232 interface
•Dual smart card interface
•ICE/Programmer interface
•2 line x 16 character LCD module
•6 x 5 keypad
•Real Time Clock (RTC) capability
•1 LED
1.3 Recommended Equipment and Test Tools
The following equipment and tools (not provided) are recommended for use with the 73S1217F
Evaluation Kit:
•For functional evaluation: PC with Microsoft®Windows®XP or Vista®, or a workstation with Linux®,
equipped with a USB and or serial (RS-232) port.
•For software development (MPU code)
Signum™ ICE (In Circuit Emulator): ADM-51. Refer to
http://signum.temp.veriohosting.com/Signum.htm.
Keil™ 8051 C Compiler Kit: CA51. Refer to http://www.keil.com/c51/ca51kit.htm and
http://www.keil.com/product/sales.htm.

73S1217F Evaluation Board User Guide UG_1217F_040
6 Rev. 2.4
2 Evaluation Board Basic Setup
Figure 2shows the basic connections of the evaluation board with the external equipment.
The power supply can come from three sources:
•A regulated lab power supply connected to the banana plugs J2, J3 and J5.
•Any AC-DC converter block, able to generate a DC power supply of 2.7 V min / 6.5 V max / 400 mA.
•The +5 V coming from the USB bus when connected to a computer or hub, able to support USB-powered
devices. In this case the ON/OFF switch, S33, has no effect and power is always on. When the
board is powered from the USB bus, the application is bus-powered and the embedded application
must be designed for this.
The communication with an external host can be accommodated by either:
•A standard USB2.0 full speed interface or
•A standard RS-232 serial interface (TX/RX only).
The board is loaded by default with the USB CCID application. Refer to Section 3for information on
setting up and running this application.
Figure 2: 73S1217F Evaluation Board Basic Connections

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 7
2.1 Connecting the Evaluation Board with an Emulation Tool
The 73S1217F Evaluation Board has been designed to operate with an In-Circuit-Emulator (ICE) from
Signum Systems (model ADM-51). Figure 3shows the connections between the ICE and the evaluation
board. The Signum System pod has a ribbon cable that must be directly attached to connector J11.
Signum Systems offers different pod options depending on user needs. The standard pod allows users to
perform typical emulator functions such as symbolic debugging, in-line breakpoints, memory
examination/modification, etc. Other pod options enable code trace capability and/or complex
breakpoints at an additional cost.
Figure 3: 73S1217F Evaluation Board Basic Connections with ADM-51 ICE

73S1217F Evaluation Board User Guide UG_1217F_040
8 Rev. 2.4
2.2 Loading User Code into the Evaluation Board
Hardware Interface for Programming
The signals listed in Table 1are necessary for communication between the TFP2 or ICE and the
73S1217F.
Table 1: Flash Programming Interface Signals
Signal Direction Function
E_TCLK Output from 73S1217F Data clock
E_RXTX Bi-directional Data input/output
E_RST
1
Bi-directional Flash Downloader Reset (active low)
1
The E_RST signal should only be driven by the TFP2 when enabling these
interface signals. The TFP2 must release E_RST at all other times.
The signals in Table 1, along with 3.3 V and GND, are available on the emulator header J11. Production
modules may be equipped with much simpler programming connectors, e.g. a 5x1 header.
Programming of the flash memory requires either the Signum Systems ADM51 in-circuit emulator or the
TSC Flash Programmer Model TFP2 provided by Teridian.
Loading Code with the In-Circuit Emulator
If firmware exists in the 73S1217F flash memory, the memory must be erased before loading a new file
into memory. In order to erase the flash memory, the RESET button in the emulator software must be
clicked followed by the ERASE button (see Figure 4).
Once the flash memory is erased, a new file can be loaded using the Load command in the File menu.
The dialog box shown in Figure 5makes it possible to select the file to be loaded by clicking the Browse
button. Once the file is selected, pressing the OK button loads the file into the flash memory of the IC.
At this point, the emulator probe (cable) can be removed. Once the 73S1217F device is reset using the
reset button on the evaluation board, the new code starts executing.
Loading Code with the TSC Flash Programmer Model TFP2
Follow the instructions given in the TSC Flash Programmer Model TFP2 User’s Manual.

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 9
Figure 4: Emulator Window Showing RESET and ERASE Buttons
Figure 5: Emulator Window Showing Erased Flash Memory and File Load Menu
RESET
BUTTON
ERASE
BUTTON

73S1217F Evaluation Board User Guide UG_1217F_040
10 Rev. 2.4
3 Using the USB CCID Application
The USB CCID firmware is pre-installed on the 73S1217F Evaluation Board. To operate correctly, it
requires a PC with the appropriate driver to be connected through its USB port. When powered-up, the
board is able to run the CCID-USB demonstration host application which allows:
•Smart card activation and deactivation, in ISO or EMV mode.
•Smart card APDU commands to be exchanged with the smart card inserted in the board.
•Starting a test sequence in order to test and evaluate the board performance against an EMV test
environment.
3.1 Driver and Host Demonstration Software Installation
Installation on Windows XP
Two drivers are available for use with Windows XP:
•The standard Microsoft Windows XP driver and
•The Teridian provided driver that adds additional features beyond the capabilities of the Microsoft
driver.
See the 73S1215F, 73S1217F CCID Application Note for further details on the differences between the
two drivers.
When using the 73S1217F transparent reader – dual slot with keypad and LCD evaluation board, the
Microsoft provided driver should not be used as this driver does not support the second slot nor the LCD
display and keypad.
The Microsoft CCID driver included in the CD is used by Teridian for testing. Check with
Microsoft for the latest driver upgrades.
Follow these steps to install the drivers and software on a PC running Windows XP:
•Extract “12xxF CCID+DFU Vy.yy Release.zip” (where y.yy is the latest version of the firmware
release).
oCreate an install directory. For example: “C:\TSC\”.
oUnzip “12xxF CCID+DFU Vy.yy Release.zip” to the just created folder. All applications and
documentation needed to run the board with a Windows PC will be loaded to this folder.
•Connect the USB cable between the host system and the 73S1217F Evaluation Board. The power
LED light should now come on.
•The host system should recognize the board and start the Add New Hardware Installation Wizard.
When the wizard prompts, select the Teridian driver file.
oTo use the Teridian supplied driver, select the ccidtsc-xp.inf file located in the “C:\TSC\12xxF
CCID+DFU Vy.yy Release\USB-CCID Firmware\CCID USB\CCID+DFU USB Drivers\XP 32 -
CCID” subdirectory. The ccistsc-xp.inf and ccidtsc-xp.sys files must be in the same directory on
the host.
•Follow the prompts until the process is completed.
•Run “CCID-DFU_USB_vy.yy.exe” (located in the path - C:\TSC\12xxF CCID+DFU C:\TSC\12xxF
CCID+DFU V2.00 Release\Host Applications\Windows App\Bin\Release Release\Host
Applications\Windows App\Bin\Release) on the host system to execute the host demonstration
application.
At this point the application window should appear. For additional information regarding the use of the
Teridian Host application, refer to the 73S12xxF USB-CCID Host GUI Users Guide (UG_12xxF_037).

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 11
To use the Windows standard driver, select the usbccid.inf file located in the “CCID USB
XPDriver” subdirectory. The uscccid.inf and usbccid.sys files must be in the samedirectory on
the host.
3.1.1 Driver and Software Installation on a Linux System
Teridian has tested the 73S1217F Evaluation Board with Linux CCID driver v1.3.2 and PCSC-Lite v.1.4.4
(middleware) on two distributions of Linux: Slackware®6 with kernel 2.4.16, and Fedora®7 with kernel
2.6.23. Refer to the 73S1215F, 73S1217F CCID USB Linux Driver Installation Guide (UG_12xxF_041)
for details on installation and usage on a Linux system.
3.2 Frequently Asked Questions
Windows
Q The PC/SC application starts but it shows a “No Reader Found” message.
A: Follow these steps to make sure:
1. The board has powered up properly (USB is securely connected and there is power applied to the
board).
2. Control Panel – System – Hardware – Device Manager – Smart Card Readers shows: “Teridian
Semiconductors USB CCID Smart Card Reader...” And there is no yellow “!” or red “X”.
3. Smart Card Service has started by going to ‘Control Panel – Administrative Tools – Services –
Smart Card’. Look under the “status” column and if it shows “stopped”, hit the restart or start
button to start it.
4. If all of the above look ok, hit the refresh button on the CCIDUSB.exe application.
Q: There is a yellow “!” on the Teridian driver shown on the Device Manager menu.
A: This usually means the driver did not complete the driver enumeration process. Push the reset button
on the evaluation board a few times. If the board is connected to the host via a USB HUB, remove the
HUB and try connecting the board directly to the PC USB port to make sure the driver and the board
can enumerate with the USB host. If the problem persists, check the driver on the PC to make sure it
is at least version 6.0.0.2. Contact your Teridian Sales Representative for the latest version of the
driver. Sometimes, rebooting the PC Host to clear up any previous USB problem will help.
Q: There is a red “X” on the Teridian driver shown on the Device Manager menu.
A: This usually means the smart card driver has been disabled. Highlight and right click on the driver to
re-enable.

73S1217F Evaluation Board User Guide UG_1217F_040
12 Rev. 2.4
Q: The Teridian Smart Reader is nowhere to be found on the Device Manager menu and there is an
“unknown USB device” found where the Teridian evaluation board should be.
A: This usually means the demo board is properly powered up but there is no enumeration taking place.
If the board is connected to a USB HUB, remove the HUB and connect the board directly to the PC
USB port. Or move it to a different USB port on the system. If the problem persists and it is
absolutely sure that the evaluation board is properly powered up, it is possible that there is no
firmware in the part. Contact a Sales Representative for reprogramming of Flash.
Q: The Teridian driver is loaded. What to do to replace it with the Microsoft Generic USB CCID driver?
A: Right click on the Teridian Driver in the Device Manager Menu, select “Update Driver..”. Select “No,
Not this time” on the next menu, “Install from a list or specific location”, “Don’t Search, I will choose the
driver to install”. If the next menu does not show the Microsoft Generic USB CCID driver, select
“Have Disk” and browse to where the driver file resides (usually in the “CCID USB XPDriver” folder)
and select the file. Follow through with the installation wizard.
Linux
Q: How can I see debug messages from PCSC-Lite when I run pcscd from the command line?
A: Before invoking pcscd, open the file /usr/local/pcsc/drivers/ifd-ccid.bundle/Contents/Info.plist in an
editor, and set ifdLogLevel to 7. Save the change. Then run the command “pcscd –f –d” in a console.
Nowpcscd runs in foreground and should display many messages in the console. These messages
show information about the smart card readers that have been detected, and whether or not a smart
card is present in the reader. Also shown in the messages are the data exchanges between the host
(Linux) and the smart card reader. The most important messages are the error messages that pcscd
displays when a critical error has occurred. If fewer messages are desired, set IfdLogLevel to 3 or 1.
Q: When I run command “pcscd –f –d”, I get an error message that says “file /var/run/pcscd.pub already
exists. Another pcscd seems to be running”.
A: Only one instance of pcscd (PCSC-Lite Daemon) should be running at any time. If you receive this
error message when invoking thepcscd program, pcscd is probably running already. If your intention
is to restart pcscd, first terminate the pcscd that is currently running. Run the command “ps aux |grep
pcscd” to obtain the PID (Process ID) of the currently running pcscd. For example, you may see
output similar to the following:
[root@localhost ~]# ps aux | grep pcscd
root 3380 0.1 0.0 74588 1752 pts/2 Sl+ 16:06 0:02 pcscd –f –d
[root@localhost ~]#
The PID of the currently running pcscd in this case is 3380. Next run the command “kill 3380” to stop
pcscd. Now start pcscd again by entering the command “pcscd –f –d”.
Q: When I start the program pcsc_scan, I receive an error message saying “PCSC Not Running”.
A: The pcsc_scan program requires the services provided by pcscd. Hence the PCSC-Lite daemon
pcscdshould be already running before pcsc_scan can start. Run pcscd first, and then invoke
pcsc_scan.

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 13
4 Evaluation Board Hardware Description
4.1 Jumpers, Switches and Modules
Table 2 describes the73S1217F Evaluation Board jumpers, switches and modules. The Item # in Table 2
references Figure 11.
Table 2: Evaluation Board Jumper, Switch and Module Description
Item
#
Schematic
and
Silkscreen
Reference
Default
setting Name Use
1 J2, J3, J5 No
Connect Banana plugs for
external regulated
power supply
Must be used to connect an external power
supply. These inputs are intended to allow
control of the input supply voltage of the board.
JP5 must be in position “EXT VPC” when using
VPC and JP8 must be in position “EXT” when
using the VBAT power supply inputs.
The evaluation board is sensitive to the polarity:
One red plug is +2.7/6.5 V for external VPC and the other red plug is +4.0/6.5 V for VBAT. The
black plug is ground.
2 JP2 VP 73S8010R VPC select Selects VPC power supply source for the
73S8010R device between VP on the
73S1217F and +5 V from JP1 pin 2.
3 J11 No
Connect In-Circuit Emulator
connector This connector must be used when using an external
In-Circuit Emulator (SIGNUM 8052 ADM51
ICE). Refer to the electrical schematic for pin
assignment.
4 PJ1 No
Connect DC jack Plug to connect an external DC block. Must be
used in conjunction with appropriate settings of
S1, JP1 and JP6 (see details above).
Power supply features are:
Voltage: 2.7 V min / 6.5 V Max
Current: 400 mA
5 J6 Connect USB connector Standard USB socket. Requires a standard
USB 1.1 or 2.0 device cable to connect to a
computer.
6 JP23 Inserted USB interrupt jumper Jumper allows the VBUS (after level c
onversion)
to connect to USR7 (configured for interrupt).
Remove this jumper if not needed and USR7
can be used for another purpose.
7 JP6 Shutdown RS-232 Xcvr enable
jumper Selects between VDD (always enabled) and a test point (with pull down) to allow the RS232
transceiver chip to be shut down.
8 P1 No
Connect DB9 RS232 female
socket This socket allows connection of an RS232 cable to a computer. Use a crossed wired
(RX/TX) cable. The evaluation board has an
on-board level shifter (U7) to allow direct
connection to a computer.
Connection to an RS232 link is required when
using the pre-downloaded USB CCID
application.

73S1217F Evaluation Board User Guide UG_1217F_040
14 Rev. 2.4
Item
#
Schematic
and
Silkscreen
Reference
Default
setting Name Use
9 JP3 Not
Inserted RS-232 Xcvr power Power supply jumper for the RS232 transceiver
chip. Can be removed to obtain accurate power
measurements.
10 D2, D3 LEDs:
Serial link activity These LEDs (D2, D3) reflect the activity on the
serial link (RS232 or serial).
D2 reflects the activity on the RX line (Data
going TO the 73S1217F)
D3 reflects the activity on the TX line (Data
coming FROM the 73S1217
F)
11 U5 LCD Module On-board LCD module:
•2 lines of 16 characters, each character dot
matrix is 5x7.
•Includes an embedded Hitachi HD44780
LCD driver, controlled from the on-board
73S1217F USR interface.
12 RV1 Adjustable resistor to
adjust LCD brightness Can be used to adjust the brightness of the on- board LCD module.
13 S2 to S26,
S27 to S32 On-board keypad 5x6 keyboard directly connected to the on-board 73S1217F IC (68-pin only). The assignment of
the keys, as silk-printed on the PCB, is the one
supported by the TSC Application Programming
Interface.
14 – Board reference and
serial number
Should be mentioned in any communication with
Teridian when requesting support.
15 D8 VDD power indicator Indicates when the 73S1217F is turned on (VDD
= 3.3 V).
16 S33 ON/OFF switch Switch used to turn on and off the 73S1217F.
The switch is overridden when VBUS is applied
(VDD is always on).
When VDD is on and the switch is pressed, the
73S1217F will activate the OFF_REQ signal
and the 73S1217F must set the SCPWRDN or
PWRDN bits to shutoff VDD.
17 JP7 ON/OFF Power ON/OFF select
jumper This jumper will select between the ON/OFF switch and ground. When the switch is
selected, the VDD power will toggle between on
and off (see item #16). When ground is
selected, the VDD will turn on automatically
upon application of VPC to the 73S1217F.
18 – Breadboard area This breadboard area allows engineers to add
their own circuitry / connection of peripherals
when prototyping and developing a 73S1217F
based application. User I/Os, GPIOs, interrupt
pins and power supply pins are located close to
this area to allow easy connection.
19 JP9 OFF_REQ INT3 select Selects the source for INT3 between the
73S8010R and the OFF_REQ pin on the
73S1217F. Should be set opposite of JP21.

UG_1217F_040 73S1217F Evaluation Board User Guide
Rev. 2.4 15
Item
#
Schematic
and
Silkscreen
Reference
Default
setting Name Use
20 JP21 8010R
INT INT2 select Selects the source for INT2 between the
73S8010R and the OFF_REQ pin on the
73S1217F. Should be set opposite of JP9.
21 JP13 Not
Inserted Jumper: USR7/SDA
select This jumper selects which signal is connected to the daughter board connector pin USR7:
•In position “USR7”, the 73S1217F USR7
signal is connected to the daughter card pin
USR7.
•In position “SDA”, the I2C SDA signal is
connected to the daughter card pin USR7.
This allows the SDA line to connect to an
SDA pin on a 73S8010R daughter card.
22 JP14 Not
Inserted Jumper: USR7/SDA
select This jumper allows the on board 73S8010R AUX2 pin to be connected to USR5 if needed. If
not needed, the jumper should be removed.
23 U4 On board 73S8010R The board contains a built-in 73S8010R that is
connected to the external smart card interface of
the 73S1217F. This device can be
disconnected from the 73S1217F if not used, by
removing jumpers JP12 and JP21.
24 J7,J8 Optional 73S80xxX
Daughter Board
interface
When developing applications that require more
than 2 smart card interfaces, an optional
daughter board can be populated to use the
73S1217F external smart card interface (lines
SCIO and SCK), in conjunction with the
USR(0:7) port and the INT2 interrupt input of the
73S1217F). Refer to the electrical schematic for
pin assignment.
25 J9, J10 SIM / SAM and Smart
Card connectors –
external interface (#2)
Allows the evaluation board to communicate
with a smart card using either the standard
(credit card size) or SIM/SAM format. This slot
is connected to the 73S1217F external card
interface # 2.
Note that J10 is wired is parallel to the smart
card connector J9 (underneath the PCB). Both
connectors cannot be populated at the same
time.
26 JP11 Not
Inserted Jumper: USR6/SCL
select This jumper selects which signal is connected to the daughter board connector pin USR6:
•In position “USR6”, the 73S1217F USR6
signal is connected to the daughter card pin
USR6.
•In position “SCL”, the I2C SCL signal is
connected to the daughter card pin USR6.
This allows the SCL line to connect to an SCL
pin on a 73S8010R daughter card.
27 JP10 Not
Inserted Jumper: USR6/AUX1
select This jumper allows the on board 73S8010R AUX1 pin to be connected to USR6 if needed. If
not needed the jumper should be removed.

73S1217F Evaluation Board User Guide UG_1217F_040
16 Rev. 2.4
Item
#
Schematic
and
Silkscreen
Reference
Default
setting Name Use
28 S27 Reset button Evaluation board main reset: Asserts a
hardware reset to the on-board 73S1217F IC.
29 JP12 Inserted LED0 jumper
In normal use, a jumper must be inserted in this
header to connect the LEDs to the LED pins of
the 73S1217
F. This jumper can be replaced by
a µA / mA-meter to measure the actual current
drawn by the LED output of the 73S1217F.
30 JP15 GND Jumper: security fuse
control This jumper should be removed at all times. Connecting the jumper will allow the security
fuses to be blown under firmware control. Refer
to the 73S1217F Data Sheet for further
information about the security fuse.
31 JP20 Not
Inserted Analog select Selects the analog input between TP32 and the
VBAT input voltage (via resistor divider).
32 JP8 Not
Inserted VBAT select Selects the VBAT input between an external
supply on J3 or the unregulated 5 V on PJ1.
33 J1, J4 SIM / SAM and Smart
Card connectors –
internal interface (#1)
Allows the evaluation board to communicate
with a smart card using either the standard
(credit card size) or SIM/SAM format: This slot
is connected to the 73S1217F built-in card
interface # 1.
J1 is wired in parallel to the smart card
connector J4 (underneath the PCB). Both
connectors cannot be used at the same time.
34 JP4 Inserted VDD jumper
The VDD supply jumper can be replaced with a
current meter to measure the power
consumption on VDD.
35 JP1 VBUS Jumper:
5V power supply
selection
This jumper selects the 5.0 V power supply. It
selects either the unregulated 5 V supply from
PJ1 or the 5.0 V from the USB VBUS:
•In position “5V UNREG”, the evaluation
board 5.0 V is powered from the PJ1
connector.
•In position “VBUS”, the evaluation board is
powered from the USB VBUS.
36 JP5 Not
Inserted Jumper: VPC power supply
selection
This jumper selects the VPC power supply. It
selects either the power supply connected to
plug J2 or the5 V unregulated supply on the
PJ1 connector.
•In position “5V UNREG”, the evaluation
board VPC is connected to 5 V coming in on
PJ1.
•In position “EXT VPC”, the evaluation board
VPC is powered from the voltage applied on
the plug J2.

UG_1217F_040 73S1217F Evaluation Board User’s Guide
Rev. 2.4 17
1 2 3 4 5 6
7
8 9 10 11
12
13
24 23 22
21
20
19
18 17 16 15 14
25
26
27
28
29
30
32
31
33
34
35
36
Figure 6: 73S1217F Evaluation Board Jumper, Switch and Module Locations

73S1217F Evaluation Board User’s Guide UG_1217F_040
18 Rev. 2.4
4.2 Test Points
The test point numbers listed in Table 3refer to the test point numbers shown in the electrical schematic
and in the silkscreen of the PCB (see Section 5 73S1217F Evaluation Board Schematics, PCB Layouts
and Bill of Materials).
Table 3: Evaluation Board Test Point Description
Test
Point # Name Use
TP1 LIN Test point to monitor Inductor operation.
TP2 Shutdown Test point to control the enable input on the RX-232 transceiver chip.
TP4 VPC Single-pin test point. VPC signal directly connected to the 73S1217F and its
decoupling capacitors. Can be used to measure integrity of the power
supply of the DC-DC converters of the 73S1217F.
TP6 VDD
2-pin test point, with one ground and one VDD signal directly connected to
the 73S1217F and its decoupling capacitors. Can be used to measure the
integrity of the digital power supply of the 73S1217F, or to add a decoupling
capacitor.
TP10 Smart Card
Contacts –
Interface #1
Header for measurement of the card signals, close to the card connectors.
Contains the card signals VCC1, RST1, CLK1, C81 and C41. Each contact
has its own ground pin on the header.
TP11 to
TP17 GND Ground test points. Can be used for grounding of lab equipment probes.
TP18 Card Detect –
Interface #1 Card detect signal coming directly from the card connectors.
TP21 USR(7:0) Standard 9/8-bit user I/O port of the 73S1217F.
Some of the user I/Os are shared by the extension 73S80xx
daughter board when using an external smart card interface, and
the LCD interface. Only one should be used at a time.
TP22 USB TP22 has 4 pins, connected to the USB D+ and D- wires, as well as 2
grounds.
TP24 VBUS +5 V USB bus. Can be used as a test point for USB voltage presence.
TP25 Smart Card
Contacts –
Interface #2
Header for measurement of the card signals, close to the card connectors.
Contains the card signals VCC2, RST2, CLK2, C42 and C82. Each contact
has its own ground pin on the header.
TP27 ROW[0:5] The row pins used for the keypad interface.
TP29 COL[0:4] The column pins used for the keypad interface.
TP30 INT2
INT3 Interrupt input #2 and #3 of the 73S1217F. This header is close to the
breadboard area for easy wiring.
TP31 RX, TX The TX and RX serial UART I/O signals (3.3 V digital logic level).

UG_1217F_040 73S1217F Evaluation Board User’s Guide
Rev. 2.4 19
4.3 Schematic
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
J12 PROTO TYPE AREA
1 2 3
JP16
1
TP1
1
TP4
R8
10
Y1
12.000MHz
1 2
S27
SW
VDD
OSC_OUT_12OSC_OUT_12OSC_IN_12OSC_IN_12
OSC_OUT_12
OSC_IN_12
OSC_OUT_32
OSC_IN_32
1
G5
1
2
3
JP9
GND
COL4
1
2
3
JP21
+C28
4.7uF
COL1
COL3
COL2
COL0
RST_EMUL
C30
0.1uF
1 2 3
JP2
1
2
3
4
5
6
TP27
HEADER 6
5V
R34
1M
+
C29
1uF
GND
GND
4
1
G6
ANALOG IN
RXD
8010R INT
SIO
IO
POWER
1
2
TP31
RXD
VCC
TXD
SCLK
C39
22pF
USR7
USR2
VBAT (4.0 - 6.5VDC)
J3
Banana
L1
10uH
GND
VBAT
EXT
+5VDC
VPC
ROW4ROW4
8
RESET
VP
DNI
3
1
2
3
JP15
HEADER 3_0
F3
TERIDIAN LOGO
GND
C18
1uF
USR7
STATUS INDICATOR
+C27
10uF
VBAT
SELECT
SCx_CLK and Vcc tracks
should be routed away
from other Smart card
signalsand should be
surrounded by GND.
SMARTCARD
SLOT #2
USR5
RXD
C14, C15, C16, C18,
C20 and C21 should be
located close to the
Smart Card Connector
INT2
2
MOUNT HOLES FOR STAND OFFS
1 2
34
TP22
HEADER 2X2
DNI
1
2
3
4
5
6
7
8
9
10
J7
TSM_110_01_L_SV
C37
VDD
11
22
33
PJ1
+5VDC
VDD
INT3
TXD
VBAT
VDD 68
RESET
1
SEC
2
ISBR
3
SCL
5
SDA
6
NC/X32OUT
7
NC/X32IN
8
GND
9
X12IN
10
X12OUT
11
COL0
12
COL1
13
COL2
14
ANAIN
15
COL3
16
RXD
17
TXD
18
COL4
19
USR7
20
ROW0
21
ROW1
22
USR6
23
ROW2
24
GND
25
NC/DP
26
NC/DM
27
VDD
28
USR5
29
USR4
30
USR3
31
USR2
32
ROW3
33
USR1
34
USR0 35
ROW4 36
ROW5 37
ERST 38
TCLK 39
VDD 40
TBUS3 41
GND 42
RXTX 43
TBUS2 44
SCLK 45
TBUS1 46
SIO 47
INT3 48
INT2 49
TBUS0 50
TEST 51
OFF_REQ 52
PRES 53
VP 54
CLK 55
GND 56
RST 57
VCC 58
C8/AUX2 59 C4/AUX1 60
I/O 61
VBUS 62
ON_OFF 63
VBAT 64
VPC 65
LIN 66
GND 67
SLUG 69
LED0
4
U6
1217/10
1
2
3JP13
1
2
3
JP11
SCL
SDA
R16R17 R15
D8
LED
VDD
R35
680
TBUS[1]
VPC
+5VDC
UnReg
.
USR1
GND
CLK
1
6
2
7
3
8
4
9
5
P1
DB9_RS232
C43
1000pF
+5V SOURCE
SELECT
SCx_CLK and Vcc tracks
should be routed away
from other Smart card
signalsand should be
surrounded by GND.
C33
0.1uF
INT2
B
SIO
TBUS[0]
UP
ROW5ROW5ROW5ROW5ROW5ROW5
RXTX
1 2 3
JP1
These test pins should be located between two rows (4
pads each) of SC connector and signal pins locate within
5mm from pads.
CLK track should be routed away from RST and C4.
F2
F
CLK
1
TP2
Y2
32.768kHz
SC8
C32
0.1uF
C35
0.1uF
+5V
C2 should be as
close as possible
to pin 66
5V
ISYNC/BRKRQ
C34
0.1uF
(RED)
ON_OFF
X
CLR
INT3
W
C1
1
C2
2
C3
3
C5
4
C6
5
C7
6
SW1
7
SW2
8
J1
SIM/SAM Connector
USR7/SDA
USR0
LCD
BRIGHTNESS
ADJUST
VDD
VPC (2.7-6.5VDC)
C8
USR3
CARD DET
VPC
EXTERNAL POWER
SUPPLY
USR5
GND
VBUS
OPTIONAL LCD DISPLAY SYSTEM
16 CHARACTER BY 2 LINES
Z
30-SWITCH
KEYPAD
C3, C4 and C5
should be as
close as possible
to VDD pins on U6
C31
0.1uF
5 VDC
UnReg
VCC
ROW1ROW1ROW1ROW1ROW1ROW1
F1
C16
0.47uF
(BLK)
1 2
JP3
HEADER 2
INT2
TXD
USR1
VDD
1
G7
1 2
3 4
5 6 7 8
910 11 12
TP25
HEADER 2 x 4
VDD
/
SCLK
+5VDC
UnReg
DNI
ROW0
1
2
TP6
5V
D- 2
D+ 3
GND 4
VCC 1
GND 5
GND 6
J6
USB_CONN_4
C22
22pF
VDD
C3
0.1uF
C4
0.1uF
ROW5
C5
0.1uF
VDD
ROW4
1 2
JP4
HEADER 2
+C2
10uF
+C7
10uF
C38
22pF
1 2
3 4 56 7 8
910 11 12
TP10
HEADER 2 x 4
C1
1
C2
2
C3
3
C5
4
C6
5
C7
6
SW1
7
SW2
8
J10
SIM/SAM Connector
1
TP18
SEC
1
G8
VO
3VDD
2
DB0
7
NC
15
GND
1
RS
4
R/W*
5
E
6
DB7
14 DB6 13 DB5 12 DB4
11 DB3 10 DB2
9DB1
8
U5
MDL-16265
TXD
RXD
ROW3 ROW2 VBUS ROW1 ROW0 COL4
R2 24
COL3
VDD
USR2
USR7
12 34 56 78 910 1112 1314 1516 1718 1920
J11
Emulator IF
USR3
USR1
USR0
USR5
USR6
USR4
SAD0
1
SAD1
2
SAD2
3
GND
4
N/C
5
VPC
6
N/C
7
AUX2
12
N/C
8
N/C
9
PRES
10
I/O
11
AUX1
13
GND
14 CLK 15
RST 16
VCC 17
VDD_ADJ 18
SCL 19
SDA 20
VDD 21
GND 22
INT 23
AUX2UC 28
AUX1UC 27
XTALOUT 25
XTALIN 24
I/OUC 26
73S8010R
U4
COL2
COL1
COL0
1
2
TP30
INT2
INT3
TCLK
1 2
JP10
HEADER 2
1
2
JP14 HEADER 2
1
TP35
1
G9
VDD
ROW2ROW2ROW2ROW2ROW2ROW2
C1+ 28
C1- 25
C2+ 1
C2- 3
T1IN 24
T2IN 23
T3IN 22
T4IN 19
T5IN 17
R1OUTBF 16
R1OUT 21
R2OUT 20
R3OUT 18
GND
2MBAUD
15
SHDNB
14 ENB
13 R3IN
11 R2IN
9R1IN
8
T1OUT
5
T2OUT
6
T3OUT
7
T4OUT
10
T5OUT
12
V-
4
V+
27
VCC 26
U7
MAX3237CAI
R4 100k
R13
3k
R12
3k
SCLSCL
R11 62
1
G1
VDD
R19 62
R18 62
R14 62
Unpopulated
& unlabled
R20 62
R21 62
R23 62
1 3
S2
SW_MOM
R22 62
USR4 USR1 USR2
USR0 USR5 USR3
USR6
VDD
VDD
ROW3ROW3ROW3ROW3ROW3ROW3
C20
27p
VCC
1
RST
2
CLK
3
C4
4
GND
5
VPP
6
I/O
7
C8
8
SW-1
9
SW-2
10
J9
Smart Card Connector
C41
22pF
C15
27p
C21
27p
SDA
SCL
GNDGND
C17
0.1uF
VBATVBATVBAT
R5
200k
VDD
OSC_OUT_32OSC_OUT_32OSC_OUT_32OSC_OUT_32
1 2 3
JP6
USR6USR6USR6USR6
R25
10k
(RED)
USR6/SCL
GND
GND USR0
+3.3V
SC4
VBUSVBUS
INT3
ROW5
ANALOG SELECT
GND
USR2
ON_OFF
C
1
D+
SCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCLSCL
1 3
S3
SW_MOM
GND
1
TP11
1 3
S4
SW_MOM
EXT
VPC
Length and width of USB D+ and D- tracks
should be matched and routed away from
smart card CLK and VCCs
Place R11, R14, R18,
R19, R20, R21, R22
and R23 close to U6
IO
1 3
S5
SW_MOM
ROW3
C40
22pF
1 3
S6
SW_MOM
USR4
6
Layout TP10 & TP25 as 8x2 header and TP23 and TP26 as 4x2
header. Populate 2pin header to every other rows such as
pin1-2, pin5-6, pin9-10 and pin13-14 for TP10 and TP25.
PWR_ON
+C1
10uF
SERIAL
PORT
C4
ROW1
5
1 3
S33
SW_MOM
DOWN
8010 VPC
SELECT
1 2 3
JP7
GND
OSC_IN_32OSC_IN_32OSC_IN_32OSC_IN_32
C42
22pF
GND
GND
GND
E
SDASDASDASDASDASDA
R3 24
7
OFF_REQ
C14
27p
ENTER
ROW2
Y
D+
9
VBATVBAT
VBUS_MONVBUS_MONVBUS_MONVBUS_MONVBUS_MONVBUS_MON
1
TP12
USR7
AUX1
D4
LED
AUX2
AUX1
LED0
AUX2
VDD
R10
10k
J2
Banana
1
2
3
JP5
1 3
S7
SW_MOM
1 2
JP12
HEADER 2
1
TP13
1 3
S12
SW_MOM
5V
1 3
S17
SW_MOM
1 3
S22
SW_MOM
13
S28
SW_MOM
1 3
S8
SW_MOM
1 3
S13
SW_MOM
1 3
S18
SW_MOM
1 3
S23
SW_MOM
1 3
S29
SW_MOM
1
TP14
1 3
S9
SW_MOM
1 3
S14
SW_MOM
1 3
S19
SW_MOM
R26
10k
1
SY M1
Logo
1 3
S24
SW_MOM
1 3
S30
SW_MOM
1 3
S10
SW_MOM
1 3
S15
SW_MOM
1 3
S20
SW_MOM
1
TP15
1 2
JP23
HEADER 2
1 3
S25
SW_MOM
1 3
S31
SW_MOM
1 3
S16
SW_MOM
1 3
S11
SW_MOM
1 3
S21
SW_MOM
1 3
S26
SW_MOM
1 3
S32
SW_MOM
1
TP16
VPC
USR1
USR0
USR2
1 2
D1
MBR0520L
1
TP17
USR3
USR4
USR5
5V
AUX2
GND
INT2
AUX1
5V
SIO
SCLK 1
2
3
4
5
6
7
8
9
10
J8
TSM_110_01_L_SV
C23
22pF
VCC
1
RST
2
CLK
3
C4
4
GND
5
VPP
6
I/O
7
C8
8
SW-1
9
SW-2
10
J4
Smart Card Connector
C24
22pF
C25
22pF
1
G2
GND
SHUTDOWN
SMARTCARD
SLOT #1
SC I/F EXPANSION
C4
USR1
TXD
INT2
USR2
GND
+5VDC
VBUS
1 2 3
JP20
J5
Banana
USR7 USR6
TBUS[2]
USR5
TBUS[3]TBUS[3]
USR4 USR3
1
2
3
4
5
6
7
8
TP21
HEADER 8
DNI
R24
10k
DNI
1
TP3
0VP
D
ON/CE
D-
USR4
COL2 COL3COL1COL1COL0
R6 0
1
TP32
R1 0
1
G3
R7 680
R9 680
RXD
1
TP24
DPLUS
DMINUS
VDD
COL4
GND
D2
LED
VDD
D3
LED
DNI
VBUS_MONVBUS_MONVBUS_MONVBUS_MONVBUS_MONVBUS_MON
VBAT
RST
D-
R27
0
1 2 3
JP8
RST
GND
C28 should
be as close
as possible
to pin 55
VCC tracks should be
wider than 0.5mm.
+5V
DPLUS
DMINUS
USR6
+5V
USR5
GND
C8
A
USR3
SEC
USR0
D5
5.1V
1
G4
+5VDC
1
2
3
4
5
TP29
HEADER 5
ROW5
ROW3
ROW0
ROW2
ROW4
ROW1
C26
0.1uF
8010 VPC
SELECT
5V
13
2
CW
RV1
10K
VP
+5V
Figure 7: 73S1217F Evaluation Board Electrical Schematic

73S1217F Evaluation Board User’s Guide UG_1217F_040
20 Rev. 2.4
4.4 PCB Layouts
Figure 8: 73S1217F Evaluation Board Top View (Silkscreen)