Texas Instruments AM263P Series User manual

EVM User's Guide: AM263P1, AM263P1-Q1, AM263P2, AM263P2-Q1,
AM263P4, AM263P4-Q1
AM263Px Control Card Evaluation Module
Description
The AM263Px Control Card Evaluation Module
(EVM) is an evaluation and development board for
the Texas Instruments Sitara™ AM263Px series of
microcontrollers (MCUs). This EVM provides an easy
way to start developing on the AM263Px MCUs with
on-board emulation for programming and debugging
as well as buttons and LED for a simple user
interface. The control card also enables header pin
access to key signals through the use of a high speed
edge connector (HSEC) baseboard docking station for
rapid prototyping.
Features
• Powered through 5 V, 3 A USB type-C input
• Multirail power supply designed for safety-relevant
applications
• One RJ45 ethernet ports with on-board Industrial
Ethernet PHY
• Additional ethernet add-on board connector for an
automotive or industrial ethernet PHY
• On-board XDS110 debug probe
• 180 pin HSEC interface for rapid prototyping
• Three push buttons:
– PORz
– User interrupt
– RESETz
• LEDs for:
– Power status
– User testing
– Ethernet connection
– I2C driven array
• CAN connectivity with on-board CAN transceiver
• Hardware resolver for accelerated motor position
sensing with two additional SAR ADC's
• Dedicated FSI connector
• TI test automation header
• MMC interface to micro SD card connector
• On-board memory
– 1 GB QSPI NAND flash
– 256 MB OSPI NOR flash
– 1 MB I2C EEPROM
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1 Evaluation Module Overview
1.1 Introduction
The AM263Px Control Card was developed to enable easy and rapid prototyping of the AM263Px and all of the
peripherals. There are several on-board transceiver and PHYs to enable the many interfaces of the AM263Px
SoC (System on a Chip). This user's guide details the design of the EVM and how to properly use each
interface. The user's guide also details many important aspects of the board including but not limited to pin
header descriptions, test points, and mux/switch signal routing.
Preface: Read This First
1.1.1.1 Sitara MCU+ Academy
Texas Instruments offers the MCU+ Academy as a resource for designing with the MCU+ software and tools
on supported devices. The MCU+ Academy features easy-to-use training modules that range from the basics of
getting started to advanced development topics.
1.1.1.2 Important Usage Notes
Note
The E1 version of the AM263Px Control Card only includes signal routing for the PRU-ICSS MDIO.
To make use of the CPSW MDIO, blue-wire modifications need to be made. Without the blue-wire
fix, the ethernet PHY connected to the RGMII2 interface does not function properly with the
on-board ethernet PHY. As a result of the blue-wire fix, the TCAN1043 (U29) cannot be used
simultaneously with the on-board ethernet PHY. For additional information, refer to Section 5.1.A.
Note
The AM263Px Control Card requires a 5 V, 3 A power supply to function. While a USB type-C cable
is included, A 5 V, 3 A power supply is not included in the kit and must be ordered separately The
Belkin USB-C Wall Charger is known to work with the Control Card and supplied type-C cable. For
more information on power requirements, refer to Section 2.2. If there is an insufficient power input,
then the red LED (LD1) glows. For more information on power status LEDs, refer to Section 2.2.2.
Note
TMDSCNCD263P includes a PMIC U7, which can exceed 55℃ case temperature during normal
operation. This user guide's statement and the PCB warning sticker from the table below have been
added to alert users to these higher temperature components.
Caution
Hot surface.
Contact can cause burns.
Do not touch!
Note
External power supply or power accessory requirements:
• Nominal output voltage: 5-VDC
• Max output current: 3000 mA
• Efficiency Level V
Note
TI recommends using an external power supply or accessory which complies with applicable regional
safety standards such as (by example) UL, CSA, VDE, CCC, PSE.
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1.2 Kit Contents
The Sitara AM263Px Control card development kit contains the following items:
• AM263Px Sitara series control card development board
• Type-A to Micro-B USB cable (1 meter length)
• USB Type-C cable (1 meter length)
Note
The maximum length of the IO cables shall not exceed 3 meters.
Not included:
• HSEC 180-pin Baseboard Docking Station
• Standoffs
• USB Type-C 5-V/3-A AC/DC supply and cable
1.3 Device Information
The AM263Px Sitara Arm® Microcontrollers are built to meet the complex real-time processing needs of next
generation industrial and automotive embedded products. The AM263Px MCU family consists of multiple
pin-to-pin compatible devices with up to four 400 MHz Arm® Cortex™-R5F cores. As an option, the Arm
R5F subsystem can be programmed to run in lockstep or dual-core mode for a multiple functional safety
configurations. The industrial communications subsystem (PRU-ICSS) enables integrated industrial Ethernet
communication protocols such as PROFINET®, TSN, Ethernet/IP™, EtherCAT™ (among many others), standard
Ethernet connectivity, and even custom I/O interfaces. The family is designed for the future of motor control and
digital power applications with advanced analog sensing and digital actuation modules.
The multiple R5F cores are arranged in cluster subsystems with 256KB of shared tightly coupled memory (TCM)
along with 3MB of shared SRAM, greatly reducing the need for external memory. Extensive ECC is included
for on-chip memories, peripherals, and interconnects for enhanced reliability. Granular firewalls managed by the
Hardware Security Manager (HSM) enable developers to implement stringent security-minded system design
requirements. Cryptographic acceleration and secure boot are also available on AM263Px devices.
For additional information, refer to the AM263Px data sheet (SPRSP81).
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1.3.1 HSEC 180-pin Control Card Docking Station
The TMDSHSECDOCK 180-pin docking station is available for purchase through Texas Instruments. The
docking station is a baseboard that enables rapid prototyping. There is a power switch on the docking station
that determines whether power to the control card is supplied by the 5 V connector or USB connector.
Note
The docking station power switch must to be toggled to the EXT-ON side to meet the power
requirements of the AM263Px Control Card. EXT-ON indicates that the power is being sourced from
the Barrell connector of the Control Card Dock. The mini-USB (USB-ON) connector does not meet the
power requirements of the AM263Px Control Card.
The AM263Px Control Card has a power mux (TPS2121RUXT) that supplies power from the type-C connection
as long as the voltage supplied by the type-C connection is equal to or greater than the voltage supplied by the
HSEC docking station. Therefore, if both a type-C connection is present and the control card is connected to a
powered HSEC docking station, then the power mux routes the type-C supplied voltage to VMAIN of the control
card. If there is no type-C connection and voltage is being supplied through the HSEC docking station, then the
power mux routes that voltage to VMAIN of the control card.
For more information on the docking station, refer to the Informational Guide.
1.3.2 Security
The AM263Px Control Card features a High Security, Field Securable (HS-FS) device. An HS-FS device has
the ability to use a one time programming to convert the device from HS-FS to High Security, Security Enforced
(HS-SE).
The AM263Px device leaves the TI factory in an HS-FS state where customer keys are not programmed and has
the following attributes:
• Does not enforce the secure boot process
• M4 JTAG port is closed
• R5 JTAG port is open
• Security Subsystem firewalls are closed
• SoC Firewalls are open
• ROM Boot expects a TI signed binary (encryption is optional)
• TIFS-MCU binary is signed by the TI private key
The One Time Programmable (OTP) keyrwriter converts the secure device from HS-FS to HS-SE. The OTP
keywriter programs customer keys into the device eFuses to enforce secure boot and establish a root of trust.
The secure boot requires an image to be encrypted, which is optional, and signed using customer keys, which is
verified by the SoC. A secure device in the HS-SE state has the following attributes:
• M4, R5 JTAG ports are both closed
• Security subsystems and SoC firewalls are both closed
• TIFS-MCU and SBL need to be signed with active customer key
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2 Hardware
2.1 Component Identification
Figure 2-1. E1 Component Identification
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2.2 Power Requirements
The AM263Px Control Card is powered from a 5 V, 3 A USB type-C input or from a 5 V, 3 A HSEC connection
supplied by the docking station. The following sections describe the power distribution network topology that
supply the AM263Px Control Card, supporting components and the reference voltages.
Power supply designs that are compatible with the AM263Px Control Card:
• When using the USB type-C input:
– 5 V, 3 A power adapter with USB-C receptacle
– 5 V, 3 A power adapter with captive USB-C cable
– PC USB type-C port that has Power Delivery classification
• Thunderbolt
• Battery behind USB logo
Figure 2-2. USB Type-C Power Delivery Classification
• When using the HSEC DC barrel jack power input:
– A power adapter that is at least 15 W
Power supply designs that are NOT compatible with the AM263Px Control Card:
• When using USB type-C input:
– Any USB adapter cables such as:
• Type-A to type-C
• micro-B to type-C
• DC barrel jack to type-C
– 5 V, 1.5 A power adapter with USB-C captive cable or receptacle
– PC USB type-C port not capable of 3 A
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2.2.1 Power Input Using USB Type-C Connector
The AM263Px Control Card can be powered through a USB type-C connection. The USB Type-C source is
capable of providing 3 A at 5 V and advertises the current sourcing capability through the CC1 and CC2
signals. On this EVM, the CC1 and CC2 from the USB type-C connector are interfaced to the port controller
IC (TUSB320LAIRWBR). This device uses the CC pins to determine port attach/detach, cable orientation, role
detection, and port control for Type-C current mode. The CC logic detects the Type-C current mode as default,
medium, or high depending on the role detected.
The Port pin is pulled down to ground with a resistor to configure the IC in upward facing port (UFP) mode.
VBUS detection is implemented to determine a successful attach in UFP mode. The OUT1 and OUT2 pins
are connected to a NOR gate. Active low on both the OUT1 and OUT2 pins advertises high current (3A) in
the attached state which enables the load switch (TPS22965DSGT) to provide the VBUS_MAIN supply which
powers other regulators that create the power rails for the device.
In UFP mode, the port controller IC constantly presents pull-down resistors on both CC pins. The port controller
IC also monitors the CC pins for the voltage level corresponding to the Type-C mode current advertisement
by the connected DFP. The port controller IC de-bounces the CC pins and waits for VBUS detection before
successfully attaching. As a UFP, the port controller device detects and communicates the advertised current
level of the DFP to the system through the OUT1 and OUT2 GPIOs.
The power requirement of the AM263Px Control Card is 5 V at 3 A. If the source is not capable of providing
the required power, then the output at the NOR gate becomes low that disables the VBUS_MAIN power switch.
Therefore, if the power requirement is not met, all power supplies except VSYS_TA_3V3 remains in the off state.
The board gets powered on completely only when the source can provide 5 V at 3 A.
Figure 2-3. Type-C CC Configuration
Table 2-1. Current Sourcing Capability and State of USB Type-C Cable
OUT1 OUT2 Advertisement
H H Default current in unattached state
H L Default current in attached state
L H Medium current (1.5A) in attached state
L L High current (3.0A) in attached state
The AM263Px Control Card includes a power supply based on a Power Management Integrated Chip (PMIC) for
each of the power rails. During the initial stage of the power supply, 5 V supplied by the type-C USB connector is
used to generate all of the necessary voltages required by the PMIC and subsequently the rest of the board via
the PMIC LDO outputs. For more information about the PMIC, refer to Section 2.2.5.
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2.2.2 Power Status LEDs
Multiple power-indication LEDs are provided on-board to indicate to users the output status of major supplies.
The LEDs indicate power across various domains as shown in the table below.
Table 2-2. Power Status LEDs(1)
Name Default Status Operation Function
LD1 OFF Type-C CC Logic Power Error Indication. Type-C connection not supplying
5 V @ 3 A
LD2 ON VMAIN_12V0 Power indicator for VMAIN 12 V supply
LD3 ON VSYS_3V3_LDO1 Power indicator for PMIC LDO 3.3 V supply
LD4 ON VSYS_1V2_PG Power Good indicator for 1.2 V supply rail
LD5 ON VSYS_TA_3V3 Power indicator test automation header 3.3 V supply
LD6 OFF USER_LED0 User Programmable Red LED
LD7 OFF USER_LED1 User Programmable Green LED
LD8 OFF PMIC_SAFE_OUT2 Safety Error indicator output from PMIC
LD9 OFF XDS110_PROG_STAZ1 LED glows after XDS configuration
LD10 OFF XDS110_PROG_STAZ2
LD19 OFF SAFETY_ERROR Safety error output status pin from AM263Px
LD20 ON VCC_1V8_LDO4 Power indicator PMIC LDO 1.8 Vsupply
LD21 ON VDD_5V0_LDO3 Power indicator for PMIC LDO 5.0 V supply
LD22 ON VSYS_3V3_LDO2 Power indicator for PMIC LDO 3.3 V supply
(1) LD[19:22] are not included in the E1 version of the Control Card.
Figure 2-4. E1 Power Status LEDs
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2.2.3 Power Tree
Figure 2-5. Power Tree
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2.2.4 Power Sequence
Figure 2-6. Power Sequence Diagram
Note
LDO[2:4]_OUT and PLDO[1:2]_OUT and the associated power supplies are intentionally not included
in this diagram since these LDO outputs are not powered on by default and require a SPI write to
enable these supply rails.
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2.2.5 PMIC
The AM263Px Control Card makes use of a multirail power supply for microcontrollers in safety-relevant
applications (TPS6538600QDCARQ1). The PMIC integrates multiple supply rails to power the MCU, CAN, and
other on-board peripherals.
Figure 2-7. PMIC
Note
BB_OUT and LDO1_OUT are powered on by default. LDO[2:4]_OUT and PLDO[1:2]_OUT are not
powered on by default and require a SPI write to enable these supply rails.
The PMIC supports wake-up from WAKE1 (VMAIN_12V0) or wake-up from a CAN transceiver (INH).
An independent voltage monitoring unit inside the PMIC monitors undervoltage and overvoltage on all internal
supply rails and regulator outputs of the battery supply. All supplies are protected with current limiting and
overtemperature warning and shutdown.
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2.3 Functional Block Diagram
Figure 2-8. AM263Px Control Card E2 Block Diagram
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2.4 Reset
Figure 2-9 shows the reset architecture of the AM263Px Control Card.
Figure 2-9. Reset Architecture
The AM263Px SoC has the following resets:
• PORz is the Power-On-Reset for the MAIN Domain.
• WARMRESETn is the Warm Reset to MAIN Domain.
Figure 2-10. PORz Reset Signal Tree
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The PORz signal is driven by a 3-input AND gate that generates a power on reset for the MAIN domain when:
• The PMIC drives the NRES, MCU Reset output signal low.
• The 1.2 V buck regulator outputs a low signal for the power good signal.
• The user push button (SW10) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_PORZn) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the PORz signal connects to the PMOS drain which
is tied directly to ground.
The PORz signal is tied to:
• AM263Px SoC PORz input
• OSPI Flash Reset
• On-board Gigabit Ethernet PHY reset
• Ethernet add-on board connector
• BOOTMODE buffer output enable
• High-Speed Edge Connector (HSEC)
Figure 2-11. WARMRESETn Reset Signal Tree
The WARMRESETn signal creates a warm reset to the MAIN domain when:
• The user push button (SW12) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_RESETz) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the RESETz signal connects to the PMOS drain
which is tied directly to ground.
The WARMRESETn signal is tied to:
• AM263Px SoC WARMRESETN output
• RESETz signal created from push button + PMOS logic
• IO Expander reset
• Micro SD reset
• HSEC
The AM263Px Control Card also has an external interrupt to the SoC, INTn, that occurs when:
• The user push button (SW11) is pressed.
• The Test Automation Header outputs a logic LOW signal (TA_GPIO1) to a P-Channel MOSFET gate which
causes V_GS of the PMOS to be less than zero and so the INTn signal connects to the PMOS drain which is
tied directly to ground.
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2.5 Clock
The AM263Px SoC requires a 25-MHz clock input for XTAL_XI. All reference clocks required for the SoC and the
three Ethernet PHY's are generated from a single four output clock buffer (LMK1C1103PWR), which is sourced
from a single 25-MHz LVCMOS Oscillator by default. A clock buffer is used for level translation from 3.3 V to 1.8
V.
The Control Card also requires a 16-MHz clock source for the TM4C129 microcontroller for UART-USB JTAG
support.
Figure 2-12. Oscillator Clock Tree
Alternatively, the SoC clock input can be sourced from a single 25-MHz crystal. To use the crystal there must be
resistors mounted and unmounted. When the Crystal is used as a clock source then the AM263Px CLKOUT0
signal is used to source the four output clock buffer for the Ethernet PHY reference clock signals.
Figure 2-13. Crystal Clock Tree
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The following table describes the proper resistors to be mounted and DNI'd for each clock source configuration.
Table 2-3. Clock Source
Clock Source Mounted DNI
25-MHz LVCMOS Oscillator (default) R273, R176 R178, R179, R271
25-MHz Crystal R178, R179, R271 R273, R176
2.6 Boot Mode Selection
The bootmode for the AM263Px is selected by a DIP switch (SW6) or the test automation header. The test
automation header uses an I2C IO expansion buffer to drive the bootmode when PORz is toggled. The
supported boot modes are as shown in Table 2-4.
Table 2-4. Supported Boot Modes
Boot Mode/Peripheral Boot Media/Host Notes
QSPI(4S), 50 MHz Flash Memory ROM configures OSPI controller in QSPI 4S mode and downloads
image from external flash, supports UART fallback boot mode if any
failures.
UART External Host ROM configures UART0 with baud rate of 115200bps and downloads
image from external PC terminal using x-modem protocol.
QSPI(1S), 50 MHz Flash Memory ROM configures OSPI controller in QSPI 1S mode and downloads
image from external flash, supports UART fallback boot mode if any
failures.
OSPI(8S), 50 MHz Flash Memory ROM configures OSPI controller in 8S mode and downloads image from
external flash, supports UART fallback boot mode if any failures.
xSPI (1S->8D) , 25 MHz, SFDP QSPI Flash / External Host ROM configures OSPI controller in xSPI 8D mode ,Reads SFDP table
for read command and downloads image from external flash, Flashes
with SFDP are of JEDEC standard Rev D only supported.
DevBoot N/A No SBL. Used for development purposes only.
Figure 2-14. SW3 Switch Positions
Table 2-5. Boot-Mode Selection Table
Boot Mode
SPI0_D0_pad
(SOP3)
SPI0_CLK_pad
(SOP2) OSPI_D1 (SOP1) OSPI_D0 (SOP0)
QSPI(4S), 50 MHz 0 0 0 0
UART 0 0 0 1
QSPI(1S), 50 MHz 0 0 1 0
OSPI(8S), 50 MHz 0 0 1 1
xSPI (1S->8D) , 25 MHz, SFDP 1 1 0 0
DevBoot 1 0 1 1
Unsupported Boot Mode All other combinations not defined above.
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2.7 JTAG Path Selection
The AM263Px Control Card allows for JTAG connections to the SoC through the on-board XDS110 or an
external emulator via the HSEC docking station. A switch (SW1) is used to drive the select line of a mux (U30)
to determine the JTAG path for the SoC. The following image shows proper switch position for SW1 for the two
JTAG paths.
Figure 2-15. JTAG Path Switch Position
2.8 Header Information
This version of the AM263Px has 11 different headers. For the locations of each header, refer to Section 2.1.
The signal details for each header pin is detailed below.
• PMIC Headers
– For more information about the PMIC, refer to Table 2-6.
Table 2-6. PMIC
Designator Pin 1 Pin 2 Pin 3
J2 VCC_PLDO2 NC DGND
J3 VCC_PLDO1 NC DGND
J20 VMAIN_12V0 PMIC_WKUP1 N/A
J21 TCAN_WAKE DGND N/A
• Test Automation Bootmode Control Header
– For more information about the Test Automation Header, refer to Table 2-7.
Table 2-7. Test Automation Header
Designator Pin 1 Pin 2
J12 TA_GPIO3 DGND
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• MCAN Header
– For more information about the MCAN interface, refer to Table 2-8.
Table 2-8. MCAN Header
Designator Pin 1 Pin 2 Pin 3
J5 MCAN4_CAN_H DGND MCAN4_CAN_L
J21 TCAN_WAKE DGND N/A
J22 PMIC_WKUP2 MCAN INH N/A
• FSI Header
– For more information about the FSI Interface, refer to Table 2-9.
Table 2-9. FSI Header
Designato
r
Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10
J6 FSIRX2_C
LK
FSITX2_C
LK
DGND DGND FSIRX2_D
ATA0
FSITX2_D
ATA0
FSIRX2_D
ATA1
FSITX2_D
ATA1
DGND VSYS_3V3
A
• PRU-ICSS IEP Headers
– For more information about the PRU-ICSS, refer to Table 2-10.
Table 2-10. PRU-ICSS IEP Headers
Designator Pin 1 Pin 2
J19 PR0_IEP0_EDIO_DATA_IN_OUT_31 DGND
J18 PR0_IEP0_EDC_SYNC_OUT1 DGND
J17 PR0_IEP0_EDIO_DATA_IN_OUT_30 DGND
J16 PR0_IEP0_EDC_SYNC_OUT0 DGND
• LIN Headers
– For more information about the LIN interface, refer to Table 2-11.
Table 2-11. LIN Headers
Designator Pin 1 Pin 2 Pin 3
J10 VLIN LIN DGND
J9 VBAT_LIN DGND N/A
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2.9 GPIO Mapping
Table 2-12. E2 GPIO Mapping Table
SI No. GPIO Description GPIO Pin Name Functionality Net Name Active Status
1 Interrupt To SoC GPIO21 LIN2_RXD Interrupt SOC_INTn LOW
2 Interrupt To Ethernet PHY connector GPIO66 EPWM12_A Interrupt ICSSM2_PWDN/INTn LOW
3 User Defined LED GPIO67 EPWM11_B GPIO USER_LED1 PREFERABLE
4 Interrupt on-board ethernet PHY GPIO68 EPWM12_B Interrupt ICSSM1_INT LOW
5 User Defined LED GPIO20 LIN2_TXD GPIO USER_LED0 PREFERABLE
8 Reset input to on-board ethernet PHY GPIO35 RGMII1_TXC Reset GPIO_ICSSM1_RST LOW
9 Reset input to ethernet connector GPIO36 RGMII1_TX_CTL Reset GPIO_ICSSM2_RST LOW
10 Interrupt to SoC from PMIC GPIO29 RGMII1_RXC Interrupt PMIC_INTn LOW
11 Select for OSPI/QSPI Mux GPIO37 RGMII1_TD0 MUX SEL OSPI/QSPI_MUX_SEL PREFERABLE
IO Expander 01
12 Reset input to OSPI P00 Reset GPIO_OSPI_RSTn LOW
13 Enable control to clock buffer P01 Enable CLK_BUF_EN HIGH
14 Select line for ICSS MII1 HSEC Mux P02 Mux Selection ICSSM1_MUX_SEL SW16
15 Select line for ICSS on-board PHY/ P03 Mux Selection ICSSM2_MUX_SEL SW15
16 Select line for OSPI and HSEC UART P04 Mux Selection FSI_MUX_SEL PREFERABLE
17 Select line for ADC MUX P05 Mux Selection ADC3_MUX_SEL PREFERABLE
18 Select line for ADC MUX P06 Mux Selection ADC4_MUX_SEL PREFERABLE
19 Enable control to SD load switch P07 Load SW Enable GPIO_uSD_PWR_EN High
20 Select line for ADC MUX P10 Mux Selection ADC5_MUX_SEL PREFERABLE
21 Select line for I2C0 MUX P11 Mux Selection I2C0_MUX_SEL PREFERABLE
22 Select line for SPI1 MUX P12 Mux Selection SPI1_MUX_SEL PREFERABLE
23 Select line for UART2 MUX P13 Mux Selection UART2_MUX_SEL PREFERABLE
24 Enable control to 1.7V LDO P14 LDO Enable VPP_LDO_EN PREFERABLE
25 Select line for LIN/UART MUX P15 Mux Selection LIN_MUX_SEL PREFERABLE
26 Select line for ADC MUX P16 Mux Selection ADC1_MUX_SEL PREFERABLE
27 Select line for ADC MUX P17 Mux Selection ADC2_MUX_SEL PREFERABLE
28 HSEC GPIO P20 GPIO HSEC_GPIO PREFERABLE
29 Standby signal for MCAN Transceiver P21 MCAN Standby MCAN1_STB High
30 MDIO Signal selection for on-board PHY P22 Mux Selection MDIO/MDC_MUX_SEL1 High
31 MDIO signal selection for Ethernet add on board P23 Mux Selection MDIO/MDC_MUX_SEL2 High
32 Select line for ICSS MII0 HSEC Mux P24 Mux Selection ICSSM0_MUX_SEL SW14
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2.10 Push Buttons
The control card supports multiple user push buttons that provide reset inputs and user interrupts to the
processor.
Figure 2-16. Push Buttons
Table 2-13 lists the push buttons that are placed on the top side of the AM263Px control card board.
Table 2-13. Control Card Push Buttons
Push Button Signal Function
SW11 INTn User Interrupt signal
SW10 PORz SoC PORz reset input
SW12 RESETn SoC warm reset input
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20 AM263Px Control Card Evaluation Module SPRUJ86 – OCTOBER 2023
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