Texas Instruments TPS54233 User manual

User’s Guide
TPS54233 Step-Down Converter Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................2
1.1 Background........................................................................................................................................................................ 2
1.2 Performance Specification Summary.................................................................................................................................2
1.3 Modifications...................................................................................................................................................................... 3
2 Test Setup and Results.......................................................................................................................................................... 3
2.1 Input / Output Connections................................................................................................................................................ 3
2.2 Efficiency............................................................................................................................................................................4
2.3 Output Voltage Load Regulation........................................................................................................................................ 5
2.4 Output Voltage Line Regulation......................................................................................................................................... 6
2.5 Load Transients..................................................................................................................................................................6
2.6 Loop Characteristics.......................................................................................................................................................... 7
2.7 Output Voltage Ripple........................................................................................................................................................ 7
2.8 Input Voltage Ripple........................................................................................................................................................... 8
2.9 Powering Up.......................................................................................................................................................................8
3 Board Layout.........................................................................................................................................................................10
3.1 Layout.............................................................................................................................................................................. 10
3.2 Estimated Circuit Area......................................................................................................................................................11
4 Schematic and Bill of Materials...........................................................................................................................................12
4.1 Schematic........................................................................................................................................................................ 12
4.2 Bill of Materials.................................................................................................................................................................13
5 Revision History................................................................................................................................................................... 13
List of Figures
Figure 2-1. TPS54233EVM-373 Efficiency.................................................................................................................................. 4
Figure 2-2. TPS54233EVM-373 Low Current Efficiency..............................................................................................................5
Figure 2-3. TPS54233EVM-373 Load Regulation....................................................................................................................... 5
Figure 2-4. TPS54233EVM-373 Line Regulation........................................................................................................................ 6
Figure 2-5. TPS54233EVM-373 Transient Response................................................................................................................. 6
Figure 2-6. TPS54233EVM-373 Loop Response........................................................................................................................ 7
Figure 2-7. TPS54233EVM-373 Output Ripple........................................................................................................................... 7
Figure 2-8. TPS54233EVM-373 Input Ripple.............................................................................................................................. 8
Figure 2-9. TPS54233EVM-373 Start-Up Relative to VIN ...........................................................................................................8
Figure 2-10. TPS54233EVM-373 Start-up Relative to Enable.................................................................................................... 9
Figure 2-11. TPS54233EVM-373 Eco-Mode Operation...............................................................................................................9
Figure 3-1. TPS54233EVM-373 Top-Side Layout..................................................................................................................... 10
Figure 3-2. TPS54233EVM-373 Bottom-Side Layout................................................................................................................ 11
Figure 3-3. TPS54233EVM-373 Top-Side Assembly.................................................................................................................11
Figure 4-1. TPS54233EVM-373 Schematic...............................................................................................................................12
List of Tables
Table 1-1. Input Voltage and Output Current Summary...............................................................................................................2
Table 1-2. TPS54233EVM-373 and Performance Specification Summary..................................................................................2
Table 1-3. Output Voltages Available...........................................................................................................................................3
Table 2-1. EVM Connectors and Test Points............................................................................................................................... 4
Table 4-1. TPS54233EVM-373 Bill of Materials.........................................................................................................................13
Trademarks
SWIFT™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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1 Introduction
This user's guide contains background information for the TPS54233 as well as support documentation for
the TPS54233EVM-373 evaluation module (HPA373). Also included are the performance specifications, the
schematic, and the bill of materials for the TPS54233EVM-373.
1.1 Background
The TPS54233 dc/dc converter is designed to provide up to a 2 A output from an input voltage source of 3.5
V to 28 V. Rated input voltage and output current range for the evaluation module are given in Table 1-1.
This evaluation module is designed to demonstrate the small printed-circuit-board areas that may be achieved
when designing with the TPS54233 regulator. The switching frequency is internally set at a nominal 300 kHz.
The high-side MOSFET is incorporated inside the TPS54233 package along with the gate drive circuitry. The
low drain-to-source on resistance of the MOSFET allows the TPS54233 to achieve high efficiencies and helps
keep the junction temperature low at high output currents. The compensation components are external to the
integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54233
provides adjustable slow start and undervoltage lockout inputs. The absolute maximum input voltage is 30 V for
the TPS54233EVM-373.
Table 1-1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54233EVM-373 VIN = 8 V to 18 V 0 A to 2 A
1.2 Performance Specification Summary
A summary of the TPS54233EVM-373 performance specifications is provided in Table 1-2. Specifications are
given for an input voltage of VIN = 15 V and an output voltage of 3.3 V, unless otherwise specified. The
TPS54233EVM-373 is designed and tested for VIN = 7 V to 28 V. The ambient temperature is 25°C for all
measurements, unless otherwise noted.
Table 1-2. TPS54233EVM-373 and Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
VIN voltage range 7 15 18 V
Output voltage set point 3.3 V
Output current range VIN = 8 V to 18 V 0 2 A
Line regulation IO = 1 A, VIN = 8V to 18 V ±0.025%
Load regulation VIN = 15 V, IO = 0 A to 2 A ±0.03%
Load transient response IO = 0.5 A to 1.5 A Voltage change –20 mV
Recovery time 400 μs
IO = 1.5 A to 0.5 A Voltage change 20 mV
Recovery time 400 μs
Loop bandwidth VIN = 15 V, IO = 1 A 9.0 kHz
Phase margin VIN = 15 V , IO = 1 A 70 °
Input ripple voltage IO = 2 A 250 mVpp
Output ripple voltage IO = 2 A 70 mVpp
Output rise time 3.5 ms
Operating frequency 300 kHz
Maximum efficiency TPS54233EVM-373, VIN = 8 V, IO = 0.4 A 91.2%
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1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54233. Some modifications
can be made to this module.
1.3.1 Output Voltage Set Point
To change the output voltage of the EVM, it is necessary to change the value of resistor R6. Changing the value
of R6 can change the output voltage above 0.8 V. The value of R6 for a specific output voltage can be calculated
using Equation 1.
6
0.8
10.2
0.8
= W ´
-
Out
V
R k
V V
(1)
Table 1-3 lists the R6 values for some common output voltages. Note that VIN must be in a range so that the
minimum on-time is greater than 160 ns, and the maximum duty cycle is less than 90%. The values given in
Table 1-3 are standard values, not the exact value calculated using Equation 1.
Table 1-3. Output Voltages Available
Output Voltage
(V)
R6 Value (kΩ)
1.8 8.25
2.5 4.75
3.3 3.24
5 1.96
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54233EVM-373 evaluation module.
The section also includes test results typical for the evaluation module and covers efficiency, output voltage
regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input / Output Connections
The TPS54233EVM-373 is provided with input/output connectors and test points as shown in Table 2-1. A power
supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The load must
be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be 2 A. Wire
lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input
voltages with TP2 providing a convenient ground reference. TP5 is used to monitor the output voltage with TP6
as the ground reference.
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Table 2-1. EVM Connectors and Test Points
Reference Designator Function
J1 VIN (see Table 1-1 for VIN range)
J2 2-pin header for enable. Connect EN to ground to disable, open to enable.
J3 2-pin header for slow start monitor and GND.
J4 VOUT, 3.3 V at 2 A maximum
TP1 VIN test point at VIN connector
TP2 GND test point at VIN
TP3 PH test point
TP4 Test point between voltage divider network and output. Used for loop response measurements.
TP5 Output voltage test point at OUT connector
TP6 GND test point at OUT connector
2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 0.5 A - 1 A and then decreases as the load
current increases towards full load. Figure 2-1 shows the efficiency for the TPS54233EVM-373 at an ambient
temperature of 25°C.
V = 3.3 V
O
0 0.5
I - Output Current - A
O
95
100
Efficiency - %
V = 8 V
IN V = 12 V
IN V = 15 V
IN
V = 18 V
IN
90
85
80
75
70
65
60
0.25 0.75 1 1.25 1.5 1.75 2
Figure 2-1. TPS54233EVM-373 Efficiency
Figure 2-2 shows the efficiency for the TPS54233EVM-373 at lower output currents between 0.01 A and 0.20 A
at an ambient temperature of 25°C.
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0 20 40 60 80 100 120 140 160 180 200
V = 18 V
IN
V = 12 V
IN V = 15 V
IN
V = 18 V
IN
50
55
60
65
70
75
80
85
90
95
100
Efficiency - %
I - Output Current - mA
O
Figure 2-2. TPS54233EVM-373 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-source
resistance of the internal MOSFET.
2.3 Output Voltage Load Regulation
The load regulation for the TPS54233EVM-373 is shown in Figure 2-3.
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
V = 15 V
IN
V = 18 V
IN V = 8 V
IN
Output Regulation - %
I - Output Current - A
O
V = 12 V
IN
Figure 2-3. TPS54233EVM-373 Load Regulation
Measurements are given for an ambient temperature of 25°C.
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2.4 Output Voltage Line Regulation
The line regulation for the TPS54233EVM-373 is shown in Figure 2-4.
-0.025
-0.020
-0.015
-0.010
-0.005
0
0.005
0.010
0.015
0.020
0.025
8 9 10 11 12 13 14 15 16 17 18
I = 1 A
O
V - Input Voltage -V
I
Output Regulation - %
Figure 2-4. TPS54233EVM-373 Line Regulation
2.5 Load Transients
The TPS54233EVM-373 response to load transients is shown in Figure 2-5. The current step is from 25% to
75% of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the
output.
VOUT
IOUT
Figure 2-5. TPS54233EVM-373 Transient Response
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2.6 Loop Characteristics
The TPS54233EVM-373 loop-response characteristics are shown in Figure 2-6. Gain and phase plots are shown
for VIN voltage of 15 V. Load current for the measurement is 1 A.
60
-60
Gain
180
-180
Phase
f - Frequency - Hz
10 1M
Figure 2-6. TPS54233EVM-373 Loop Response
2.7 Output Voltage Ripple
The TPS54233EVM-373 output voltage ripple is shown in Figure 2-7 . The output current is the rated full load of
2 A. Voltage is measured directly across the output capacitors.
VOUT
PH
Figure 2-7. TPS54233EVM-373 Output Ripple
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2.8 Input Voltage Ripple
The TPS54233EVM-373 input voltage ripple is shown in Figure 2-8 . The output current is the rated full load of 2
A. Voltage is measured directly across the input capacitors.
VIN
PH
Figure 2-8. TPS54233EVM-373 Input Ripple
2.9 Powering Up
The start-up waveforms are shown in Figure 2-9 and Figure 2-10. In Figure 2-9, the top trace shows VIN, and
the bottom trace shows VOUT. In Figure 2-10, the top trace shows EN (enable) whereas the bottom trace shows
VOUT. In Figure 2-10, the input voltage is initially applied and the output is inhibited by using a jumper at J2 to tie
EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the enable-threshold
voltage of 1.25 V, the start-up sequence begins and the internal reference voltage begins to ramp up at the
internally set rate toward 0.8 V and the output voltage ramps up to the externally set value of 3.3 V. The input
voltage for these plots is 15 V and there is no load.
VIN
VOUT
Figure 2-9. TPS54233EVM-373 Start-Up Relative to VIN
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VIN
VOUT
Figure 2-10. TPS54233EVM-373 Start-up Relative to Enable
VOUT
PH
Figure 2-11. TPS54233EVM-373 Eco-Mode Operation
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3 Board Layout
This section provides a description of the TPS54233EVM-373, board layout, and layer illustrations.
3.1 Layout
The board layout for the TPS54233EVM-373 is shown in Figure 3-1 through Figure 3-3. The topside layer of the
EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper.
The top layer contains the main power traces for VIN, VOUT, and VPHASE. Also on the top layer are connections
for the remaining pins of the TPS54233 and a large area filled with ground. The bottom layer contains ground
and a signal route for the BOOT capacitor. The top and bottom and internal ground traces are connected with
multiple vias placed around the board including ten vias directly under the TPS54233 device to provide a thermal
path from the top-side ground plane to the bottom-side ground plane.
The input decoupling capacitors (C1, C2, and C3) and bootstrap capacitor (C4) are all located as close to the
IC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC. The
voltage divider network ties to the output voltage at the point of regulation, the copper VOUT trace past the output
capacitor C9. For the TPS54233, an additional input bulk capacitor may be required, depending on the EVM
connection to the input supply.
Figure 3-1. TPS54233EVM-373 Top-Side Layout
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