WM8758B Production Data
w PD, Rev 4.4, January 2012
2
TABLE OF CONTENTS
DESCRIPTION....................................................................................................... 1
BLOCK DIAGRAM ................................................................................................ 1
FEATURES............................................................................................................ 1
APPLICATIONS..................................................................................................... 1
TABLE OF CONTENTS......................................................................................... 2
PIN CONFIGURATION .......................................................................................... 4
ORDERING INFORMATION.................................................................................. 4
PIN DESCRIPTION................................................................................................ 5
RECOMMENDED OPERATING CONDITIONS..................................................... 6
ELECTRICAL CHARACTERISTICS ..................................................................... 7
TERMINOLOGY ............................................................................................................ 12
HEADPHONE OUTPUT PERFORMANCE.......................................................... 13
POWER CONSUMPTION.................................................................................... 14
AUDIO PATHS OVERVIEW ................................................................................ 15
SIGNAL TIMING REQUIREMENTS .................................................................... 16
SYSTEM CLOCK TIMING ............................................................................................. 16
AUDIO INTERFACE TIMING – MASTER MODE.......................................................... 16
AUDIO INTERFACE TIMING – SLAVE MODE ............................................................. 17
CONTROL INTERFACE TIMING – 3-WIRE MODE ...................................................... 18
CONTROL INTERFACE TIMING – 2-WIRE MODE ...................................................... 19
INTERNAL POWER ON RESET CIRCUIT.......................................................... 20
RECOMMENDED POWER UP/DOWN SEQUENCE.................................................... 22
DEVICE DESCRIPTION ...................................................................................... 25
INTRODUCTION ........................................................................................................... 25
INPUT SIGNAL PATH ................................................................................................... 26
ANALOGUE TO DIGITAL CONVERTER (ADC) ........................................................... 33
INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC)............................................ 37
OUTPUT SIGNAL PATH ............................................................................................... 42
3D STEREO ENHANCEMENT...................................................................................... 49
ANALOGUE OUTPUTS................................................................................................. 49
DIGITAL AUDIO INTERFACES..................................................................................... 61
AUDIO SAMPLE RATES............................................................................................... 68
MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ................................................ 68
GENERAL PURPOSE INPUT/OUTPUT........................................................................ 70
OUTPUT SWITCHING (JACK DETECT)....................................................................... 72
CONTROL INTERFACE................................................................................................ 73
RESETTING THE CHIP ................................................................................................ 74
POWER SUPPLIES....................................................................................................... 75
POWER MANAGEMENT .............................................................................................. 75
POP MINIMISATION ..................................................................................................... 77
REGISTER MAP .................................................................................................. 78
DIGITAL FILTER CHARACTERISTICS .............................................................. 80
TERMINOLOGY ............................................................................................................ 80
DAC FILTER RESPONSES .......................................................................................... 81
ADC FILTER RESPONSES .......................................................................................... 81
HIGHPASS FILTER....................................................................................................... 82
5-BAND EQUALISER .................................................................................................... 83
