Xilinx FMC XM104 User manual

FMC XM104
Connectivity Card
User Guide
UG536 (v1.1) September 24, 2010

FMC XM104 Connectivity Card User Guide www.xilinx.com UG536 (v1.1) September 24, 2010
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Revision History
The following table shows the revision history for this document.
Date Version Revision
12/07/09 1.0 Initial Xilinx release.
09/24/10 1.1 Updated note about FMC cards in Table 1-1.

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UG536 (v1.1) September 24, 2010
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Preface: About This Guide
Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Additional Support Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Chapter 1: XM104
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Quick Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Necessary Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
System Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Board Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1. VITA 57.1 FMC HPC Connector J1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2. Multi-Gigabit Transceiver Data Port 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Multi-Gigabit Transceiver Data Port 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Multi-Gigabit Transceiver Data Port 2 - J11 SATA1 . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5. Multi-Gigabit Transceiver Data Port 3 - J12 SATA2 . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6. Multi-Gigabit Transceiver Data Ports [4:7] - J2 10GE Base-CX4 Connector. . . . . . . . . 15
7. 2 Kb EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8. PCA9543 IIC Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9. Clocking Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Silicon Labs Si5368 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table of Contents

4www.xilinx.com FMC XM104 Connectivity Card User Guide
UG536 (v1.1) September 24, 2010

FMC XM104 Connectivity Card User Guide www.xilinx.com 5
UG536 (v1.1) September 24, 2010
Preface
About This Guide
This document describes the FPGA Mezzanine Card (FMC) XM104 connectivity card,
referred to as the XM104 in this guide. Xilinx® supported evaluation (carrier) boards are
referred to simply as boards in this guide.
Guide Contents
This manual contains the following chapter:
•Chapter 1, XM104.
Additional Documentation
Prior to using the XM104, users should be familiar with Xilinx resources. See the following
locations for additional documentation on Xilinx tools and solutions:
• ISE® Design Suite: www.xilinx.com/ise
• Answer Browser: www.xilinx.com/support
• Intellectual Property: www.xilinx.com/ipcenter
The XM104 can be used with Xilinx FMC high pin count (HPC) boards and, with limited
functionality, FMC low pin count (LPC) boards. Board documentation, schematics and
PCB design files are available at www.xilinx.com/fmc.
Additional Support Resources
To find additional documentation, see the Xilinx website at:
www.xilinx.com/support/documentation/index.htm
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
www.xilinx.com/support/mysupport.htm

6www.xilinx.com FMC XM104 Connectivity Card User Guide
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Preface: About This Guide

FMC XM104 Connectivity Card User Guide www.xilinx.com 7
UG536 (v1.1) September 24, 2010
Chapter 1
XM104
Overview
This document describes the FPGA Mezzanine Card (FMC) XM104 connectivity module,
referred to as the XM104 in this guide. A Quick Start section and Board Technical
Description are combined within this document.
Quick Start
System Requirements
Hardware
Table 1-1 details the board validated to support the XM104. The ML605 board provides one
FMC high pin count (HPC) (J64) and one FMC low pin count (LPC) (J63) connector
interface. The XM104 connector must be installed on the HPC J64 connector of the ML605
board to have full functionality, as shown in Figure 1-1, page 9.
The XM104 can work on LPC FMC interfaces, but with limited functionality. Xilinx boards
containing LPC connectors are supported as follows:
• SP601 - Si5368 clock source only
• SP605 - Si5368 clock source and Data Port 0 (DP0) channel
• ML605 LPC (J63) - Si5368 and DP0 channel
• ML623 - Si5368 clock source only
• SP623 - Si5368 clock source only
Table 1-1: FMC Supported Boards
Xilinx Platform Part Number FMC HPC
Connector
FMC LPC
Connector
Virtex-6 FPGA ML605 Evaluation Kit EK-V6-ML605-G J64 J63
Notes:
While every effort has been made to comply with the FPGA Mezzanine Card Specification, Xilinx cannot
claim nor assume full compliance with the FMC/VITA-57-1 specification. Consequently, Xilinx cannot
claim nor support the usage of the XM104 on any other FMC (VITA-57.1) board.
Xilinx FMC cards are generally designed to implement expanded functionality for supported Xilinx
evaluation boards (SP601, SP605, or ML605) and thus might exceed the FMC card outline dimensions
discussed in the Single Width FMC Module Mechanical section of the FMC/VITA-57-1 specification.
Therefore, Xilinx FMC cards might not physically fit in a non-Xilinx evaluation board environment.

8www.xilinx.com FMC XM104 Connectivity Card User Guide
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Chapter 1: XM104
Software
Example designs that use this hardware are not provided at this time.
Package Contents
The following items are included in the XM104 shipment:
• XM104 card
• Four (4) mounting screws
•Two(2)standoffs
• Four (4) SMA-P to SMA-P cables
• Serial ATA loopback cable
• Serial ATA cable
• Welcome letter
Necessary Equipment
• Small Phillips screwdriver to secure the XM104 to the board
• PC with Internet access to download documentation, board files, and schematics
System Setup
Complete the following steps to install the XM104 to a Xilinx board. For additional
information on Xilinx boards, refer to the board’s user guide. See Additional
Documentation, page 5.
1. Turn off the DC power switch and disconnect the input power source from the board.
2. Remove the XM104 from the electrostatic device (ESD) bag.
3. Using a small Phillips screwdriver, remove the two screws from the bottom side of the
two standoffs on the XM104. These screws will be used to attach the board to the
standoffs attached to the XM104.
4. Install the XM104 to the ML605 FMC HPC connector J64. The XM104 hangs off the
edge of the board as shown in Figure 1-1, page 9.
5. Turn the attached board and XM104 such that the FPGA is facing the table. Install two
screws from the bottom side of board's FMC mounting holes into the two standoffs
attached to the XM104. Hand tighten the two mounting screws to the bottom of the
board.
6. Turn the attached board and XM104 unit over such that the Xilinx FPGA is visible.
7. Connect the input power source to the board. Turn the board power input switch to
ON.
The system is now ready for use.

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UG536 (v1.1) September 24, 2010
Quick Start
Technical Support
Xilinx offers technical support for this product only when used in conjunction with boards
listed in Table 1-1. For assistance with the XM104 and Xilinx boards, contact Xilinx for
technical support at www.xilinx.com/support.
X-Ref Target - Figure 1-1
Figure 1-1: Installation of XM104 to Board FMC HPC Connector
UG536_01_111609

10 www.xilinx.com FMC XM104 Connectivity Card User Guide
UG536 (v1.1) September 24, 2010
Chapter 1: XM104
Board Technical Description
The XM104 provides a number of connectors which break out the FPGA multi-gigabit
transceiver (MGT) interface signals to and from the board interface. Figure 1-2 shows a
block diagram of the XM104. Each MGT data port interface consists of two differential
pairs of MGT signals, one pair for the transmitter and one pair for the receiver. MGT Data
Ports 0 and 1 are each wired to four SMA connectors. MGT Data Ports 2 and 3 are each
wired to host Serial ATA connectors J11 and J12 respectively. MGT Data Ports 4 through 7
are wired to a 10GE Base-CX4 connector supporting a XAUI application interface. MGT
transmitter Data Ports 8 and 9 are electrically looped back to the board receiver ports 8 and
9 respectively. The ML605 does not support Data Port 8 and 9 interfaces.
Silicon Laboratories Si570 serial IIC bus reprogrammable LVDS clock source and a Si5368
any-rate precision clock multiplier and jitter attenuator integrated circuits provide a
variety of programmable differential clock sources to the board’s FGPA. The Si5368
integrated circuit receives three differential LVDS clock inputs from the board and outputs
five LVDS differential clock outputs to the FPGA.
A 2 Kb serial IIC EEPROM is also connected to the IIC interface of the board providing
non-volatile storage. The serial IIC interface also connects to the Si570 and Si5368
integrated circuits enabling the board’s FPGA to program the clock circuitry on the XM104.
X-Ref Target - Figure 1-2
Figure 1-2: XM104 Block Diagram
UG536_02_120309
2 Kb
EEPROM
Si5368
Any-rate Clock
Si570
Clock
156.25 MHz
Clock
Driver
Level
Shifter
IIC
IIC
Switch
GBTCLK1_M2C
GBTCLK0_M2C
CLK1_M2C
CLK2_M2C
CLK3_M2C
LA00_CC
LA01_CC
LA17_CC
MGT DataPort 0
SMA (4x) DP0
DP1
DP2
DP3
DP4-DP7
DP8-DP9
MGT DataPort 1
SMA (4x)
MGT DataPort 2
Serial ATA J11
MGT DataPort 3
Serial ATA J12
MGT DataPorts4-7
10GE Base-CX4 J2
J1 FMC HPC Interface
MGT DataPorts8-9
Electrical Loopback
CLK0_M2C
J3, J4, J5, J6
J7, J8, J9, J10
FS_OUT
CKOUT1
CKOUT2
CKOUT3
CKOUT4
CKIN1
CKIN2
CKIN3
CKIN4