Xilinx Virtex UltraScale FPGA VCU1287 User manual

VCU1287
Characterization Board
User Guide
UG1121 (v1.0) December 11, 2015

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Revision History
The following table shows the revision history for this document.
Date Version Revision
12/11/2015 1.0 Initial Xilinx release.
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Table of Contents
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Chapter 1: Introduction
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
FPGA Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 2: Board Setup and Configuration
Board Component Location. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 3: Board Component Descriptions
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Component Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Appendix A: Default Jumper Settings
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Appendix B: VITA 57.1 FMC Connector Pinouts
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Appendix C: Master Constraints File Listing
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
VCU1287 Board XDC Listing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Appendix D: System Controller
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Programmable Clocks Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PMBus Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Power Monitoring Data Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
FPGA Mezzanine Card (FMC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
GPIO Data Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
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Board EEPROM Data Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
FPGA CONFIG Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Appendix E: Additional Resources and Legal Notices
Xilinx Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Solution Centers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Please Read: Important Legal Notices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
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Chapter 1
Introduction
Overview
This user guide describes the components, features, and operation of the VCU1287
UltraScale® FPGA GTH and GTY transceivers characterization board. The VCU1287 board
provides the hardware environment for characterizing and evaluating the GTH and GTY
transceivers available on the UltraScale XCVU095-FFVB2104E FPGA. The VCU1287 board
schematic, bill-of-material (BOM), layout files, and reference designs are available online at
the VCU1287 Characterization Kit website.
FPGA Compatibility
The VCU1287 board is provided with the Virtex UltraScale XCVU095-FFVB2104E FPGA. The
board also supports other Virtex UltraScale device densities (XCVU080, XCVU125, and
XCVU160), as well as the Kintex® UltraScale XCKU115 device in the pin-compatible
FFVB2104 package. However, some transceivers available in large density devices are not
available in the XCVU095 device (for example, GTH QUAD_232 and QUAD_233).
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Chapter 1: Introduction
Block Diagram
The VCU1287 board block diagram is shown in Figure 1-1.
X-Ref Target - Figure 1-1
Figure 1-1: VCU1287 Board Block Diagram
Power In
12VDC
Board Utility Power
On-Board Power Regulation:
5.0V, 12A
3.3V, 40A
2.5V, 4A
System Controller
MGT Transceivers
QUAD 124
QUAD 125
QUAD 126
QUAD 127
QUAD 128
QUAD 129
QUAD 130
QUAD 131
QUAD 224
QUAD 225
QUAD 226
QUAD 227
QUAD 228
QUAD 229
QUAD 230
QUAD 231 UltraScale FPGA
XCVU095-FFVB2104E
Analog/Digital
Converter
(SYSMON)
FPGA Power Source
On-Board Regulation:
VCCINT 0.95V, 60A
VCCBRAM 0.95V, 7A
VCCAUX 1.8V, 8A
VCCO_HP 1.8V, 10A
VCCO_HR 1.8V, 2.5A
USB to UART
Bridge
Select I/O
Termination
I2C Bus
Management
FMC1 Interface
High Performance
I/O
FMC2 Interface
High Performance
I/O
FMC3 Interface
High Performance
I/O
GTY Power
Module
Interface for
Quads 124-131
GTH Power
Module
Interface for
Quads 224-231
MGT
Power Monitoring
Push Buttons,
DIP Switches,
And LEDs
User Clocks
SuperClock-2
Module Interface
12V
5V
3.3V
12V
5V
3.3V
PMBus
PMBus
PMBus
2.5V
5V
3.3V
VCCO_HP
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Chapter 1: Introduction
Board Features
The VCU1287 characterization board features are listed here. Detailed information for each
feature is provided in Chapter 3, Board Component Descriptions.
• UltraScale XCVU095-FFVB2104E FPGA
• BullsEye cable access to all 32 GTH and 32 GTY transceivers on the UltraScale
XCVU095-FFVB2104E FPGA
• Onboard power supplies for all necessary voltages
• Power connectors for optional use of external power supplies
• Digilent USB JTAG programming port
• System controller (Zynq-7000 AP SoC XC7Z010-CLG225 FPGA)
• Two MGT power modules supporting UltraScale FPGA GTY and GTH transceiver power
requirements
• A fixed 300 MHz 2.5V LVDS oscillator wired to multi-region clock capable (MRCC)
inputs
• Two pairs of differential MRCC inputs with SMA connectors
• SuperClock-2 module supporting programmable clock outputs
• Samtec BullsEye connector pads for the GTY and GTH transceivers and reference clocks
• General purpose DIP switches, LEDs, pushbuttons, and test I/O
• Three VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors
• USB-to-UART bridge
•I2Cbus
• PMBus connectivity to the boards digital power supplies
• Active cooling for the FPGA
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Chapter 2
Board Setup and Configuration
Board Component Location
Figure 2-1 shows the VCU1287 board component locations. Each numbered component
shown in the figure is keyed to Table 2-1. Table 2-1 identifies the components and links to
a detailed functional description of the components and board features in Chapter 3, Board
Component Descriptions.
IMPORTANT: Figure 2-1 is for visual reference only and might not reflect the current revision of the
board.
CAUTION! The VCU1287 board can be damaged by electrostatic discharge (ESD). Follow standard ESD
prevention measures when handling the board.
CAUTION! Do not remove the rubber feet from the board. The feet provide clearance to prevent short
circuits on the back side of the board.
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Chapter 2: Board Setup and Configuration
X-Ref Target - Figure 2-1
Figure 2-1: VCU1287 Characterization Board Components
11
19
26
27
28
29
20
19
38
37
23
151413
303132
12
19
22
19
21
17
40
25
16
18
1
5435
39
7
33
19
2
34
36
24 986
3
10
19
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Chapter 2: Board Setup and Configuration
Table 2-1: VCU1287 Board Components
Callout Reference Designator Feature Description
1U1Virtex UltraScale XCVU095-FFVB2104E Device
2SW1Power Switch
3 J28 12V mini-fit connector (12V Input Power)
4J37, J155, J38, J80, J39,
J82, J141, J142, J71
GTY transceiver connector pads Q124, Q125, Q126, Q127, Q128,
Q129, Q130, Q131, Q132 (MGT Transceivers and Reference
Clocks)
5J40, J88, J89, J41, J42,
J92, J43, J156, J143, J68
GTH transceiver connector pads Q224, Q225, Q226, Q227, Q228,
Q229, Q230, Q231, Q232, Q233 (MGT Transceivers and
Reference Clocks)
6U80
Digilent USB JTAG connector (micro-B receptacle) (A list of
jumpers and switches and their required positions for normal
board operation is provided in Appendix A, Default Jumper
Settings.)
7J2
Platform USB JTAG connector (alternate access for programming
cables) (A list of jumpers and switches and their required
positions for normal board operation is provided in Appendix A,
Default Jumper Settings.)
8J10
SD card connector (back-side of board) (A list of jumpers and
switches and their required positions for normal board
operation is provided in Appendix A, Default Jumper Settings.)
9SW13System Controller Configuration DIP Switches
10 SW4 System Controller Reset
11 J36 SuperClock-2 Module
12 U42 300 MHz LVDS Oscillator
13 DS17 FPGA DONE status LED (DONE LED)
14 DS3 FPGA INIT_B status LED (INIT LED)
15 SW7 FPGA PROG_B pushbutton (PROGRAM Pushbutton)
16 DS18 12V power status LED (Power Switch)
17
DS4, DS5, DS6, DS7,
DS8, DS9, DS10, DS11,
DS13, DS14, DS15,
DS28, DS29, DS30,
DS32
Status LEDs for FPGA logic, transceiver, and utility power
18 SW2 Power regulation inhibitor switch for onboard regulators (Using
External Power Sources)
19 J5, J18, J19, J20, J22,
J23, J26, J27, J67, J69
External power supply connectors (Using External Power
Sources)
20 J93, J138
Bank 124-132 GTY transceiver power supply module (Onboard
Power Regulation and A list of jumpers and switches and their
required positions for normal board operation is provided in
Appendix A, Default Jumper Settings.)
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Chapter 2: Board Setup and Configuration
Default Jumper and Switch Positions
A list of jumpers and switches and their required positions for normal board operation is
provided in Appendix A, Default Jumper Settings.
21 J46, J124
Bank 224-233 GTH transceiver power supply module (A list of
jumpers and switches and their required positions for normal
board operation is provided in Appendix A, Default Jumper
Settings.)
22 J21
FPGA and utility rails PMBUS connector (A list of jumpers and
switches and their required positions for normal board
operation is provided in Appendix A, Default Jumper Settings.)
23 J4
MGT rails PMBus connector (A list of jumpers and switches and
their required positions for normal board operation is provided
in Appendix A, Default Jumper Settings.)
24 J1 Connector for USB to Dual UART Bridge (mini-B receptacle)
25 J99 Active Heat Sink Power Connector
26
DS19, DS20, DS21,
DS22, DS23, DS24,
DS25, DS26
User LEDs (Active-High)
27 SW8, SW9 User Pushbuttons (Active-High)
28 SW3 User DIP Switches (Active-High) and I/O Header
29 J95 User DIP Switches (Active-High) and I/O Header
30 JA2 FMC1 connector (I2C Bus Management)
31 JA3 FMC2 connector (I2C Bus Management)
32 JA4 FMC3 connector (I2C Bus Management)
33 J73 ATX power connector (12V Input Power)
34 J13, J14, J84, J85 Differential SMA MRCC Pin Inputs
35 U38 System controller
36 J3 System controller JTAG connector
37 DS1, DS12, DS16, DS27 System controller status LEDs
38 SW5, SW6, SW10,
SW11, SW12 System controller GPIO pushbuttons
39 J6 JTAG chain select
40 DS2 PowerGood LED
Table 2-1: VCU1287 Board Components (Cont’d)
Callout Reference Designator Feature Description
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Chapter 3
Board Component Descriptions
Overview
This chapter provides a detailed functional description of the board’s components and
features. Table 2-1, page 10 identifies the components and links to the corresponding
detailed functional description in this chapter. Component locations are shown in
Figure 2-1, page 9.
Component Descriptions
Virtex UltraScale XCVU095-FFVB2104E Device
The VCU1287 board is populated with the UltraScale XCVU095-FFVB2104E FPGA at U1
(callout 1, Figure 2-1). For further information on UltraScale FPGAs, see UltraScale
Architecture and Product Overview (DS890) [Ref 1].
Power Management
12V Input Power
The VCU1287 board receives 12V main power through J28 (callout 3, Figure 2-1) using the
12V AC adapter that is provided with the VCU1287 board characterization kit. J28 is a 6-pin
(2 x 3), right angle, mini-fit connector.
CAUTION! When supplying 12V through J28, use only the power supply provided for use with this
board (Xilinx part number 3800033).
CAUTION! Do NOT use a 6-pin, PC ATX power supply connector with J28. The pinout of the 6-pin, PC
ATX connector is not compatible. J28 and the board will be damaged if an attempt is made to power it
from a PC ATX power supply connector.
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Chapter 3: Board Component Descriptions
12V power can also be provided through:
• Connector J73 (callout 33, Figure 2-1) which accepts an ATX hard drive 4-pin power
plug.
• Connector J27 (callout 19, Figure 2-1) which can be connected to a bench-top power
supply.
CAUTION! Because connector J73 provides no reverse polarity protection, use a power supply with a
current limit set at 6A maximum.
CAUTION! Do NOT apply 12V power to more than a single input source. For example, do not apply
power to J73 and J27 at the same time.
CAUTION! If J73 or J27 is used to supply the 12V input power, the board consumption should NOT
exceed 75W because of Q1 limitation.
Power Switch
The VCU1287 board main power is turned On or Off using switch SW1 (callout 2,
Figure 2-1). When the switch is in the ON position, power is applied to the board and the
green LED DS18 illuminates (callout 16, Figure 2-1).
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Chapter 3: Board Component Descriptions
Onboard Power Regulation
Figure 3-1 shows the onboard power supply architecture.
X-Ref Target - Figure 3-1
Figure 3-1: VCU1287 Board Power Supply Block Diagram
Maxim 15301 U24
1.8V at 8A max
Maxim 15301 U26
0.95V at 7A max
Maxim 15301 U27
1.8V at 10A max
Maxim 15301 U95
1.8V at 2.5A max
Maxim 15301 U29
2.5V at 4A max
Maxim 15301 U31
5.0V at 10A max
Maxim MAX20751EKX U23
MultiPhase Master
Maxim VT1697SBFXQ U118
0.95V at 20A max
Maxim VT1697SBFXQ U119
0.95V at 20A max
Maxim VT1697SBFXQ U120
0.95V at 20A max
VCCINT
VCCAUX
VCCBRAM
VCCO_HP
VCCO_HR
UTIL_2V5
UTIL_3V3
UTIL_5V0
12V PWR
IN
GTH Power Module
Quads 224-233
1.2V at 20A max
1.8V at 2.5A max
1.0V at 12.0A max MGTAVCC_R
MGTAVTT_R
MGTVCCAUX_R
GTY Power Module
Quads 124-132
1.2V at 20A max
1.8V at 2.5A max
1.0V at 12.0A max MGTAVCC_L
MGTVCCAUX_L
Maxim MAX20751EKX U30
MultiPhase Master
Maxim VT1697SBFXQ U132
0.95V at 13.33A max
Maxim VT1697SBFXQ U132
0.95V at 13.33A max
Maxim VT1697SBFXQ U133
0.95V at 13.33A max
MGTAVTT_L
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Chapter 3: Board Component Descriptions
The VCU1287 board uses power regulators and PMBus compliant digital PWM system
controllers from Maxim Integrated to supply the FPGA logic and utilities voltages listed in
Table 3-1. The board can also be configured to use an external bench power supply for each
voltage. See Onboard Power Regulation.
Table 3-1: Onboard Power System Devices
Device Part
Number
Reference
Designator Description Power Rail Net Name Voltage
FPGA Logic
Maxim
MAX20751EKX U23 MultiPhase master with PMBus interface controller (60A three phases at 20A/phase VCCINT 0.95V
Maxim MAX15301 U24 InTune digital point of load (PoL) controller, 8A VCCAUX 1.8V
Maxim MAX15301 U26 InTune digital point of load (PoL) controller, 7A VCCBRAM 0.95V
Maxim MAX15301 U27 InTune digital point of load (PoL) controller,
10A VCCO_HP 1.8V
Maxim MAX15301 U95 InTune digital point of load (PoL) controller,
2.5A VCCO_HR 1.8V
Utility
Maxim MAX15301 U29 InTune digital point of load (PoL) controller,
10A UTIL_2V5 2.5V
Maxim
MAX20751EKX U30 MultiPhase Master with PMBus Interface Controller (40A three phases at 13.33A/phase) UTIL_3V3 3.3V
Maxim MAX15301 U31 InTune digital point of load (PoL) controller,
12A UTIL_5V0 5.0V
GTY Transceivers (monitoring only)
INA226 U99 Current shunt and power monitor with I2C
interface MGTAVCC_L 1.0V
INA226 U97 Current shunt and power monitor with I2C
interface MGTAVTT_L 1.2V
INA226 U98 Current shunt and power monitor with I2C
interface MGTVCCAUX_L 1.8V
GTH Transceivers (monitoring only)
INA226 U50 Current shunt and power monitor with I2C
interface MGTAVCC_R 1.0V
INA226 U51 Current shunt and power monitor with I2C
interface MGTAVTT_R 1.2V
INA226 U52 Current shunt and power monitor with I2C
interface MGTVCCAUX_R 1.8V
System Controller
Maxim MAX15053 U13 Fixed LDO regulator SYS_1V0 1.0V
Maxim MAX15027 U33 Fixed LDO regulator VCC_1V2 1.2V
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Chapter 3: Board Component Descriptions
Using External Power Sources
Callout 19, Figure 2-1
Each voltage rail for the FPGA logic and MGT transceiver has an associated Euro-Mag
spring-clamp terminal block that can be used to provide power from an external source
(Table 3-2).
CAUTION! Do NOT apply power to any of the FPGA logic external power supply connectors without
first disabling the associated regulator or regulators. Failing to disable the regulator can damage the
board.
Each onboard FPGA logic regulator can be disabled using its respective power regulation
inhibitor dip switch (callout 18, Figure 2-1). A regulator is disabled when the power
regulation inhibitor switch is set to the ON position. Table 3-2 shows a list of external power
connections for the different power rails.
Maxim MAX15027 U25 Fixed LDO regulator VCC_1V8 1.8V
CAUTION! The output voltages of the Max15301 can be reprogrammed using the Maxim InTune Digital Power
Tool [Ref 5]. However, extreme caution must be taken when attempting to modify any of the onboard
regulators. An incorrectly programmed regulator can damage onboard components.
Notes:
1. The MAX20751EKX device has limited nonvolatile memory reprogramming saves (four counts).
Table 3-1: Onboard Power System Devices (Cont’d)
Device Part
Number
Reference
Designator Description Power Rail Net Name Voltage
Table 3-2: FPGA Logic and MGT Transceiver Rails
Power Rail Net
Name
External Supply
Connector (s)
Power Regulation
Jumper
FPGA Logic
VCCINT
J25
J22
VCCAUX J23
VCCBRAM J20
VCCO_HP J19
VCCO_HR J18
GTH Transceiver
MGTAVCC_R
J26
J15
MGTAVTT_R J16
MGTVCCAUX_R J17
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Chapter 3: Board Component Descriptions
Monitoring Voltage and Current
Voltage and current monitoring and control for Maxim power system is available through
either the VCU1287 board system controller or the MaximPower Tool software GUI. The
VCU1287 board system controller is the most convenient way to monitor the voltage and
current values for the power rails listed in Table 3-2. For details on how to use this built-in
feature, see Power Monitoring Data Menu in Appendix D, System Controller.
The VCU1287 board includes these PMBus connectors:
• J21 (callout 20, Figure 1-2), for use with the Maxim USB-to-PMBus interface dongle
(MAXPOWERTOOL002 [Ref 5]) and the InTune Digital Power GUI.
• J4 (callout 21, Figure 1-2) is used to connect to the MGT power module PMBus using
the Maxim USB-to-PMBus interface dongle (MAXPOWERTOOL002 [Ref 5]) and the
InTune Digital Power GUI.
Note: Use wires to connect the J4 pins to the Maxim MAXPOWERTOOL002 dongle as shown in
Figure 3-2.
GTY Transceiver
MGTAVCC_L
J67
J62
MGTAVTT_L J63
MGTVCCAUX_L J64
Notes:
1. The MGT power module must be removed before providing external power to any of
the transceiver rails (see FPGA Configuration).
Table 3-2: FPGA Logic and MGT Transceiver Rails (Cont’d)
Power Rail Net
Name
External Supply
Connector (s)
Power Regulation
Jumper
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Chapter 3: Board Component Descriptions
The onboard Maxim power controllers (U23, U24, U26, U27, U29, U30, U31, and U95) by
default are isolated from the MGT power modules PMBus. However, the two interfaces can
be linked by removing J8 next to the MGT power module PMBus connector J4. This
configuration is required when using Maxim power tools to monitor and control both the
FPGA power rails and the transceiver power rails using the Maxim InTune digital power GUI.
More information about the power system components used by the VCU1287 board is
available from the Maxim Integrated InTune digital power website [Ref 5].
X-Ref Target - Figure 3-2
Figure 3-2: Connecting MAXPOWERTOOL002 to J4
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X-Ref Target - Figure 3-3
Figure 3-3: MGT PMBus isolation
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VCU1287 Characterization Board www.xilinx.com 19
UG1121 (v1.0) December 11, 2015
Chapter 3: Board Component Descriptions
MGT Transceiver Power Module
There are two MGT transceiver power modules (callout 20 and 21, Figure 2-1). The GTY
power modules supply the MGTAVCC_L, MGTAVTT_L, and MGTVCCAUX_L power rails, which
connect to the FPGA GTY transceivers. The GTH power module supplies the MGTAVCC_R,
MGTAVTT_R, and MGTVCCAUX_R power rails, which connect to the FPGA GTH transceivers.
Two MGT power modules from Maxim Integrated are provided with the VCU1287 board for
evaluation. The modules can be plugged into connectors J138 and J93 or J46 and J124 in
the outlined and labeled power module locations shown in Figure 3-3 and Figure 3-4.
Table 3-3 lists the nominal voltage values for MGTAVCC_L, MGTAVTT_L, MGTVCCAUX_L,
MGTAVCC_R, MGTAVTT_R, and MGTVCCAUX_R power rails. It also lists the maximum current
rating for each rail supplied by MGT modules included with the VCU1287 board.
X-Ref Target - Figure 3-4
Figure 3-4: Maxim Integrated MGT Power Module
Table 3-3: MGT Power Modules
MGT Transceiver Rail Net Name Nominal Voltage Maximum
Current Rating
MGTAVCC_R 1.0V 12A
MGTAVTT_R 1.2V 20A
MGTVCCAUX_R 1.8V 2.5A
MGTAVCC_L 1.0V 12A
MGTAVTT_L 1.2V 20A
MGTVCCAUX_L 1.8V 2.5A
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VCU1287 Characterization Board www.xilinx.com 20
UG1121 (v1.0) December 11, 2015
Chapter 3: Board Component Descriptions
The MGT transceiver power rails can also be supplied externally. The external supply
connectors are described in Table 3-2.
CAUTION! The MGT Power Module MUST be removed when providing external power to the MGT
transceiver rails.
Information about the available MGT power modules included with the VCU1287 board
characterization kit is available from the vendor websites [Ref 5].
Active Heat Sink Power Connector
Callout 25, Figure 2-1
An active heat sink (Figure 3-5) is provided for the FPGA. A 12V fan is affixed to the heat
sink and is powered from the 3-pin friction lock header J99 (Figure 3-6).
X-Ref Target - Figure 3-5
Figure 3-5: Active FPGA Heat Sink
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