ADLINK Technology EGX-MXM-P2000 User manual

Leading EDGE COMPUTING
EGX-MXM-P2000
NVIDIA® Pascal™ GP107 Quadro® P2000
Embedded Graphics Module
User’s Manual
Manual Rev.: 1.0
Revision Date: November 21, 2019
Part No: 50-1Z300-1000

ii Revision History
Leading EDGE COMPUTING
Revision History
Revision Release Date Description of Change(s)
1.0 2019-11-21 Initial release

Preface iii
EGX-MXM-P2000
Preface
Copyright © 2019 ADLINK Technology Inc.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsi-
bility to global environmental preservation through
compliance with the European Union's Restriction
of Hazardous Substances (RoHS) directive and
Waste Electrical and Electronic Equipment
(WEEE) directive. Environmental protection is a
top priority for ADLINK. We have enforced mea-
sures to ensure that our products, manufacturing
processes, components, and raw materials have
as little impact on the environment as possible. When products are
at their end of life, our customers are encouraged to dispose of
them in accordance with the product disposal and/or recovery pro-
grams prescribed by their nation or company.
Battery Labels (for products with battery)
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iv Preface
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California Proposition 65 Warning
WARNING: This product can expose you to chemicals
including acrylamide, arsenic, benzene, cadmium,
Tris(1,3-dichloro-2-propyl) phosphate (TDCPP), 1,4-
Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC,
and vinyl materials, which are known to the State of California to
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vinyl materials, which are known to the State of California to cause
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to www.P65Warnings.ca.gov.
Trademarks
Product names mentioned herein are used for identification pur-
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of their respective companies.
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
NOTE:
NOTE:
Additional information, aids, and tips that help users perform
tasks.
CAUTION:
Information to prevent minor physical injury, component dam-
age, data loss, and/or program corruption when trying to com-
plete a task.
WARNING:
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.

Table of Contents v
EGX-MXM-P2000
Table of Contents
Revision History...................................................................... ii
Preface.................................................................................... iii
List of Tables......................................................................... vii
List of Figures........................................................................ ix
1 Introduction ........................................................................ 1
1.1 Overview.............................................................................. 1
1.2 Features............................................................................... 1
1.3 Specifications....................................................................... 2
1.3.1 Board Specifications................................................... 2
1.3.2 Memory Configuration ................................................ 3
1.3.3 Display Support and Options...................................... 3
1.3.4 OS Support................................................................. 3
1.3.5 Software Support........................................................ 3
1.3.6 Graphics Options........................................................ 4
1.4 Functional Block Diagram.................................................... 5
1.5 Layout and I/O ..................................................................... 6
1.5.1 MXM Connector Pin Definition ................................... 8
1.6 Thermal Policy ................................................................... 13
1.7 Unpacking Checklist .......................................................... 13
2 System Requirements...................................................... 15
2.1 Power Sequencing............................................................. 15
2.2 Module Power Up and Down ............................................. 16
2.3 Reset Requirements .......................................................... 16
2.4 Dual Mode DisplayPort Implementation ............................ 17
2.5 DVI/HDMI on DisplayPort Interface ................................... 18
2.6 Driver Installation ............................................................... 19

vi Table of Contents
Leading EDGE COMPUTING
2.7 Certifications & Agencies ................................................... 19
Important Safety Instructions............................................... 21
Getting Service...................................................................... 23

List of Tables vii
EGX-MXM-P2000
List of Tables
Table 1-1: Board Specifications................................................... 2
Table 1-2: Memory Configuration ................................................ 3
Table 1-3: Display Support and Options...................................... 3
Table 1-4: Graphics Module Display Options .............................. 4
Table 1-5: NVIDIA Link Display Types ........................................ 4
Table 1-6: MXM Connector Pin Definition ................................... 8
Table 1-7: Thermal Policy.......................................................... 13

viii List of Tables
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List of Figures ix
EGX-MXM-P2000
List of Figures
Figure 1-1: Functional Block Diagram........................................... 5
Figure 1-2: MXM Module Basic Dimensions................................. 6
Figure 1-3: MXM Module Detailed Dimensions and Layout......... 7
Figure 2-1: Power Sequencing ................................................... 15
Figure 2-2: Module Power Down ................................................ 16
Figure 2-3: Reset Sequencing .................................................... 16
Figure 2-4: Dual Mode DisplayPort Implementation ................... 17
Figure 2-5: DVI/HDMI on DisplayPort Interface .......................... 18

xListofFigures
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Introduction 1
EGX-MXM-P2000
1 Introduction
1.1 Overview
The EGX-MXM-P2000 module features advanced NVIDIA®
Quadro® Pascal™ architecture in the MXM 3.1 Type A form fac-
tor. The P2000 brings a new level of performance to visual graph-
ics and computing applications, fully integrating hardware
acceleration for both graphics and computing code, enabling hard-
ware acceleration for a wider class of software applications than
ever before.
The compact, module supports operability in an extended temper-
ature range of -40°C to 85°C, suitable for mission-critical harsh
environments. With its 768 CUDA core Pascal GPU, the EGX-
MXM-P2000 supports 4 FHD displays, offering a flexible and easy
solution for medical and gaming applications.
1.2 Features
XMXM 3.1 Type A form factor (82 x 70 mm)
X768 CUDA cores
X2.3 TFLOPS single precision (SP) peak performance
X4 GB GDDR5 memory
X96 GB/s maximal memory bandwidth
XSupport for up to 4 UHD displays
X58W Total Graphics Power (TGP)
X5 year performance warranty
XNvidia Quadro P2000 GPU
ZPackage 29 x 29 mm
ZBase Clock @1455 MHz
ZBoost Clock @1480 MHz

2Introduction
Leading EDGE COMPUTING
1.3 Specifications
1.3.1 Board Specifications
Table 1-1: Board Specifications
Graphics Core
Architecture NVIDIA® Pascal™ GP107
GPU Quadro® P2000
Display Outputs
4x DisplayPort 1.4 digital video outputs
Support for High Dynamic Range (HDR) video
4K at 98Hz with 10-bit color depth
Signal Interface MXM 3.1, PCI Express Gen3 x16 support
GPGPU Computing
CUDA Support
768 CUDA cores, 2.3TFLOPS SP Peak
CUDA Toolkit 8.0, CUDA Compute version 6.1
OpenCL™ 1.2, DirectX® 12, OpenGL 4.5, Vulcan 1.0
Memory
GDDR5 Memory 4GB
Memory Width 128-bit
Bandwidth 96 GB/s
Physical
Dimensions 87 (W) x 70 (D) x 4.8 (H) mm
Locking Mechanism Standard MXM 3.1 Type A
Environmental
Operating Temp. Standard: 0˚C to 55˚C, ETT: -40˚C to 85˚C
Storage Temp. -40˚C to 85˚C
OS
Supported OS Windows 7/10, Linux 64-bit

Introduction 3
EGX-MXM-P2000
1.3.2 Memory Configuration
Table 1-2: Memory Configuration
1.3.3 Display Support and Options
Table 1-3: Display Support and Options
1.3.4 OS Support
XWindows 7/10 (64-bit)
XLinux (64-bit)
1.3.5 Software Support
Supported software packages include:
XCUDA Toolkit 8.0
XCUDA Compute version 6.1
XOpenCL™ 1.2
XDirectX® 12
XOpenGL 4.5
XVulcan 1.0
Memory GDDR5@6Gbps
Configuration 256Mx32
Memory Bandwidth
128-bit
82 GB/s data rate
x32 GDDR5 DRAM device data width
Capacity To ta l 4 G B
DisplayPort
X1.2, 1.3, 1.4
XMax. pixel clock: 1050 MP/s
XMax. bandwidth: 25.9 GB/s/connector
HDMI 2.0 Max. resolution: 4096 x 2160 at 60 Hz
HDCP Support 1.3 (DP), 2.2 (DP, HDMI)

4Introduction
Leading EDGE COMPUTING
1.3.6 Graphics Options
The EGX-MXM-P2000 supports 4x DisplayPort by default. The
graphics module display options are as shown.
Table 1-4: Graphics Module Display Options
Table 1-5: NVIDIA Link Display Types
Item Detail
MXM Port DP_A DP_B DP_C DP_D
NVIDIA Link Link E Link F Link A Link B
Link Display Type
Link A DisplayPort, DVI (Single Link or Dual Link with Link B)
Link B DisplayPort, DVI (Dual Link with A)
Link C Reserved (on GPU chip)
Link D
Link E DisplayPort, HDMI
Link F DisplayPort

Introduction 5
EGX-MXM-P2000
1.4 Functional Block Diagram
Figure 1-1: Functional Block Diagram
(PWR_EN、PWR_GOOD、WAKE#)
PCIE
IFPA
IFPE
IFPB
IFPF
DP1.4
DP1.4
DP1.4
DP1.4
PCIE x16 Gen3
I2CS
PM
JTAG
SPI
SPI - VBIOS
MXM 3.1 Connector
P+SRC
P+5V
P+3V3
SPI
JTAG
I2CS
GDDR5 x32
memory down
GDDR5 x32
memory down
GDDR5 x32
memory down
GDDR5 x32
memory down
GDDR5
Channel A
GDDR5
Channel B
NVVDD-PH3
NVVDD-PH2
Power Supply
NVVDD-PH1
NVVDD-PH4
FBVDD Q
Power Supply
PEX _VDD
Power Supply
VDD_AON/MAIN
Power Supply
N18P-Q3 50W

6Introduction
Leading EDGE COMPUTING
1.5 Layout and I/O
All dimensions shown are in mm.
Figure 1-2: MXM Module Basic Dimensions
82
70
3.20 x6
6 x6

Introduction 7
EGX-MXM-P2000
Figure 1-3: MXM Module Detailed Dimensions and Component Layout
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8Introduction
Leading EDGE COMPUTING
1.5.1 MXM Connector Pin Definition
Primary Side (Underside) Secondary Side (Top Side)
Pin Signal PU/PD/NI Pin Signal PU/PD/NI
E1 PWR_SRC E2 PWR_SRC
E3 GND E4 GND
1 5V 2 PRSNT_R# 0ΩPD
3 5V 4 WAKE# NI
5 5V 6 PWR_GOOD NI
7 5V 8 PWR_EN
9 5V 10 27MHZ_REF NI
11 GND 12 GND
13 GND 14 LVDS_U_HPD NI
15 GND 16 JTAG_TESTEN
17 GND 18 PWR_LEVEL 100K PU
3.3V
19 PEX_STD_SW# NI 20 TH_OVERT# 100K PU
3.3V
21 VGA_DISABLE# NI 22 TH_ALERT# 100K PU
3.3V
23 PNL_PWR_EN 24 TH_PWM NI
25 PNL_BL_EN 26 GPIO0 NI
27 PNL_BL_PWM 28 GPIO1 NI
29 HDMI_CEC NI 30 GPIO2 NI
31 LVDS_L_HPD NI 32 SMB_DAT 10K PU
3.3V
33 LVDS_DDC_DAT NI 34 SMB_CLK 10K PU
3.3V
35 LVDS_DDC_CLK NI 36 GND
37 GND 38 OEM0 NI
39 OEM1 NI 40 OEM2 NI
41 OEM3 NI 42 OEM4 NI
43 OEM5 NI 44 OEM6 NI
45 OEM7 NI 46 GND
Table 1-6: MXM Connector Pin Definition

Introduction 9
EGX-MXM-P2000
47 GND 48 PEX_TX15#
49 PEX_RX15# 50 PEX_TX15
51 PEX_RX15 52 GND
53 GND 54 PEX_TX14#
55 PEX_RX14# 56 PEX_TX14
57 PEX_RX14 58 GND
59 GND 60 PEX_TX13#
61 PEX_RX13# 62 PEX_TX13
63 PEX_RX13 64 GND
65 GND 66 PEX_TX12#
67 PEX_RX12# 68 PEX_TX12
69 PEX_RX12 70 GND
71 GND 72 PEX_TX11#
73 PEX_RX11# 74 PEX_TX11
75 PEX_RX11 76 GND
77 GND 78 PEX_TX10#
79 PEX_RX10# 80 PEX_TX10
81 PEX_RX10 82 GND
83 GND 84 PEX_TX9#
85 PEX_RX9# 86 PEX_TX9
87 PEX_RX9 88 GND
89 GND 90 PEX_TX8#
91 PEX_RX8# 92 PEX_TX8
93 PEX_RX8 94 GND
95 GND 96 PEX_TX7#
97 PEX_RX7# 98 PEX_TX7
99 PEX_RX7 100 GND
101 GND 102 PEX_TX6#
103 PEX_RX6# 104 PEX_TX6
105 PEX_RX6 106 GND
Primary Side (Underside) Secondary Side (Top Side)
Pin Signal PU/PD/NI Pin Signal PU/PD/NI
Table 1-6: MXM Connector Pin Definition

10 Introduction
Leading EDGE COMPUTING
107 GND 108 PEX_TX5#
109 PEX_RX5# 110 PEX_TX5
111 PEX_RX5 112 GND
113 GND 114 PEX_TX4#
115 PEX_RX4# 116 PEX_TX4
117 PEX_RX4 118 GND
119 GND 120 PEX_TX3#
121 PEX_RX3# 122 PEX_TX3
123 PEX_RX3 124 GND
125 GND 126 KEY
127 KEY 128 KEY
129 KEY 130 KEY
131 KEY 132 KEY
133 GND 134 GND
135 PEX_RX2# 136 PEX_TX2#
137 PEX_RX2 138 PEX_TX2
139 GND 140 GND
141 PEX_RX1# 142 PEX_TX1#
143 PEX_RX1 144 PEX_TX1
145 GND 146 GND
147 PEX_RX0# 148 PEX_TX0#
149 PEX_RX0 150 PEX_TX0
151 GND 152 GND
153 PEX_REFCLK# 154 PEX_CLK_REQ#
155 PEX_REFCLK 156 PEX_RST#
157 GND 158 VGA_DDC_DAT NI
159 JTAG_TDO 160 VGA_DDC_CLK NI
161 JTAG_TDI 162 VGA_VSYNC NI
163 JTAG_TCLK 164 VGA_HSYNC NI
165 JTAG_TMS 166 GND
Primary Side (Underside) Secondary Side (Top Side)
Pin Signal PU/PD/NI Pin Signal PU/PD/NI
Table 1-6: MXM Connector Pin Definition