ADLINK Technology cPCI-6830 Series User manual

NuIPC
cPCI-6830 series
6U CompactPCI
Dual Tualatin / Pentium-III CPU Module
Recycled Paper
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©Copyright 2002 ADLINK Technology Inc.
All Rights Reserved.
Manual Rev. 1.00 November 12, 2002
Part No: 50-15013-100
Theinformationinthisdocumentissubjecttochangewithout prior notice in
order to improve reliability, design and function and does not represent a
commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or inability to
use the product or documentation, even if advised of the possibility of such
damages.
This document contains proprietary information protected by copyright. All
rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of the manufacturer.
Trademarks
PXI is registered trademarks of PXI Systems Alliance. Other product names
mentioned herein are used for identification purposesonly and may be
trademarks and/or registered trademarks of their respective companies.
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If you need any help or service, please contact us.
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Table of Contents •i
Table of Contents
List of Tables.............................................................................iii
List of Figures............................................................................iii
How to Use This Guide...............................................................iv
Introduction ................................................................................1
1.1 Unpacking Checklist............................................................................2
1.2 Features .................................................................................................3
1.3 Functional Blocks and Main Board....................................................4
1.3.1 CompactPCI Bus Interface...............................................6
1.3.2 Pentium III or Tualatin Processor...................................6
1.3.3 Interrupts..............................................................................6
1.3.4 PICMG 2.1 Hot Swap Support..........................................7
1.3.5 Power Ramp Circuitry........................................................7
1.3.6 Watchdog Timer.................................................................7
1.3.7 Ethernet Interfaces.............................................................7
1.3.8 Serial I/O..............................................................................8
1.3.9 IEEE-1284 Parallel Port/Printer Interface......................8
1.3.10 Universal Serial Bus (USB)..............................................8
1.3.11 IDE Controller and Floppy Interface Controller............8
1.3.12 Keyboard/Mouse Controller.............................................8
1.3.13 Software................................................................................9
1.4 Specifications......................................................................................10
1.5 Peripheral Connectivity......................................................................15
Jumpers and Connectors.......................................................... 16
2.1 cPCI-6830 Board Outline and Illustratoin......................................17
2.1.1 cPCI-6830 Front and top View.......................................17
2.1.2 cPCI-R6830 Top View.....................................................18
2.2 cPCI-6830 Connector Pin Assignments........................................19
2.2.1 VGA Connector.................................................................19
2.2.2 USB Connectors...............................................................20
2.2.3 PS/2 Keyboard & Mouse Connector.............................20
2.2.4 Ethernet (RJ-45) Connector...........................................21
2.3.5 Parallel Port Connector...................................................22
2.2.6 Serial Ports........................................................................23
2.2.7 Floppy Connector.............................................................24
2.2.8 IDE Connector..................................................................25
2.2.9 CompactPCI P1/J1: 64-bit PCI......................................26
2.2.10 CompactPCI P2/J2: 64-bit PCI arbitration signals....27
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ii •Table of Contents
2.2.11 cPCI P3/J3 Connector.....................................................28
2.2.12 CompactPCI P4/J4 Connector......................................29
2.3 cPCI-6830 Jumper Setting................................................................30
2.3.1 Switch and Jumper Pins..................................................30
2.4 Switch Description..............................................................................31
2.4.1 SW1 (Reset)......................................................................31
2.4.2 Clear CMOS.......................................................................31
2.4.3 LAN1 and LAN2 Dipswitches on RTM..........................32
Getting Started......................................................................... 33
3.1 CPU Installation.................................................................................33
3.2 Memory Installation............................................................................34
3.3 HDD Installation..................................................................................34
3.3.1 HDD Installation for cPCI-6830.....................................35
3.3 BIOS Configuration Overview...........................................................35
3.4 Operating System Installation..........................................................36
Driver Installation ..................................................................... 37
4.1 Chipset Drivers Installation..............................................................38
4.1.1 Driver Installation on Windows 2000............................38
4.1.2 Driver Installation on Windows 98.................................39
4.1.3 Driver Installation on Windows NT................................40
4.2 VGA Driver Installation.......................................................................41
4.2.1 VGA Driver Installation for Windows 98/2000/NT.......41
4.3 LAN Driver Installation.......................................................................42
4.3.1 Software and Driver Support..........................................42
4.3.2 INTEL 82559 Driver Installation on Windows 2000...43
4.3.3 VIA VT8233 Driver Installation on Windows 2000.....44
4.3.4 Intel 82559 Driver Installation on Windows 98...........45
4.3.5 VIA VT8233 Driver Installation on Windows 98..........46
4.3.6 Intel 82559 Driver Installation on Windows NT.........47
4.3.7 VIA VT8233 Driver Installation on Windows NT.........48
Utilities...................................................................................... 49
5.1 Watchdog Timer Overview................................................................50
5.1.1 Using the Watchdog in an Application.........................51
5.2 Hardware Doctor Utility......................................................................52
5.3 Intel Preboot Execution Environment (PXE)...................................52
Warranty Policy........................................................................ 53
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List of Tables and Figures •iii
List of Tables
Table 1: Peripheral Connectivity Table..............................................15
Table 2: VGA Connector Pin Definition..............................................19
Table 3: USB Connectors Pin Definition...........................................20
Table 4: PS/2 Keyboard & Mouse Connector Pin definition..........20
Table 5: Ethernet Connector Pin Definition......................................21
Table 6: Ethernet Amber LED Status.................................................21
Table 7: Ethernet Green LED Status .................................................21
Table 8: Parallel Connector Pin Definition.......................................22
Table 9: COM1 Pin Definition..............................................................23
Table 10: COM2 Pin Definition..............................................................23
Table 11: Floppy Connector Pin Definition.........................................24
Table 12: IDE Connector Pin Definition...............................................25
Table 13: CompactPCI J1 Pin Definition.............................................26
Table 14: CompactPCI J2 Pin Definition.............................................27
Table 15: cPCI P3/J3 Connector Pin Assignment.............................28
Table 16: CompactPCI P4/J4 Connector Pin Assignment..............29
Table 17: Switch Cross-Reference Table...........................................30
Table 18: Clear CMOS RTC RAM.........................................................31
Table 19: Setting LAN1 and LAN2 Access..........................................32
List of Figures
Figure 1: Functional Block Diagram......................................................4
Figure 2:Main Board Drawing................................................................5
Figure 3: CPCI-6830 Front and Top View..........................................17
Figure 4: cPCI-R6830 Top View...........................................................18
Figure 5: Watchdog Timer Architecture..............................................50
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iv•How to Use This Guide
How to Use This Guide
This manual is intended to assist users to configure the cPCI-6830 6U
CompactDual Tualatin CPUsystemcontroller. It is divided into5 chapters.
Chapter 1, “Introduction”, gives an overview of the product features,
applications, and specifications.
Chapter 2,“Connectors and Jumpers”, this chapter outlines all the
connectors and its pin definitions.
Chapter 3,“Getting Started”,this chaptergivesasummaryofwhat is
required to setup an operational system using the
cPCI-6830. Hardware installation and BIOS overview is
discuss.
Chapter 4,“Driver Installation”, provides step-by-step instructions of
how to install the software drivers successfully.
Chapter 5, “Utilities,” explains the operation of theWDT, PXE booting
and Hardware Doctor .
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Introduction •1
1
Introduction
The cPCI-6830 is positioned within the 6U cPCI product line as the next
generation host CPU board with the highest computing performance
poweredbydual Intel Tualatin/Pentium III CPU. The CPU module supports
a front side bus (FSB) of 133MHz and a CPU clock of 1.26GHz featuring
64-bit/66MHz cPCI bus with up to 3GB high performance DDR host SDRAM
support.
ThecPCI-6830providesstandard I/Os including RS-232, Printer Port, USB,
EIDE, Triple Ethernets, removable CompactFlash socket, VGA and optional
AC97 audio interface. The cPCI-6830 is designed to meet the needs of
applications which require the highest computing performance and high
reliability. It’s the ideal solution for telecommunications, Internet, and
industrial control applications.
The cPCI-6830 occupies a single 6U high Eurocard slot. Though the
cPCI-6830ishighlyintegrated,itscapabilitiescanbeextendedwithoptional
boards available from ADLINK. Expansion boards are available to add IDE
daughter boards such as CompactFlash. For more information about
options and accessories, please visit ADLINKS web page at
http://www.adlinktech.com.tw
This chapter is designedto give you an overview of the cPCI-6830 CPU
module. The chapter covers the following topics:
•Unpacking andChecklist
•Features
•Specifications
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2•Introduction
1.1 Unpacking Checklist
Check the shipping carton for any damages. If the shipping carton and
contents are damaged, notify the dealer for a replacement. Retain the
shipping carton and packing material for inspection by the dealer. Obtain
authorization before returning any product to ADLINK.
Check the following items are included in the package, if there is any
missing items, contact your dealer:
•The cPCI-6830 module (May be equipped with different speed or
capacity of CPU, RAM, and HDD).
•This User’s Manual
•ADLINK CD
•cPCI-R6830 Rear I/O transitionboard is optional and may not be
included in the package
Note: The package of the cPCI-6830 OEM version non-standard
configuration, functionality or package may vary according to the
different configuration requests
CAUTION: Thisboard must beprotected fromstatic dischargeand physical
shock. Never remove any of the socketed parts except at a
static-free workstation. Use the anti-static bag shipped with the
product to handle the board. Wear a wrist strap grounded through
one of the system's ESD Ground jacks when servicing system
components.
!
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Introduction •3
1.2Features
•PICMG 2.0 CompactPCI Specification R3.0 Compliant
•PICMG 2.1 CompactPCI Hot-Swap Specification R2.0 Compliant
•PICMG 2.16 CompactPCI Packet Switching Backplane R1.0
Compliant
•Standard 6U form factor with 2-slot (8TE/HP) space
•Design for Dual Intel Socket-370 Tualatin/Pentium-III CPU
•Supports 66/100/133MHz Front Side Bus (FSB) frequency
•Supports up to Intel FC-PGA2 Tualatin CPU at 1.26GHz
•Three184-pin DIMM sockets support up to 3GB DDR266 SDRAM
with ECC support
•Supports 64-bit CompactPCI with 66MHz
•Dual EIDE interface.
•Supports4bus-masterPCIdeviceson64-bit/66MHz CompactPCI
bus peripheral slots
•Supports 7 bus-master PCI devices on 64/32-bit @33MHz
CompactPCI bus peripheral slots
•Build-in two USB ports, two serial ports, one parallel port
•Optional VGA with resolution up to 1600x1200 in 32-bit true color
•On-boardtriple10/100MbpsEthernetports,twoRJ-45portonfront
faceplate by Intel 82559 controller with one RJ-45 port on rear I/O
transition module by VT8233 built-in controller.
•Supports Intel pre-boot execution environment (PXE) for remote
boot.
•Optional SoundBlaster Pro compatible AC97 audio on rear I/O
transition module (only for big quantity OEM project)
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4•Introduction
1.3 Functional Blocks and Main Board
The following topics provide an overview of the cPCI-6830’s main features
as shown in the functional block diagram below and also the main board.
Functional Block Diagram
Figure 1: Functional Block Diagram
Audio
AC97 Link
Tualatin
CPU1 Tualatin CPU2
VT8633T
DDR DIMM x 3
VPX
PCI Bus 1
64bit/66MHz
VT8233
IDEx2
KB/MS
USBx2
V Link
PHY
VT6103
32bit/33MHz (PCI Bus 0)
82559
LAN 82559 LAN RAGE XL
VGA
LPC
Super I/O
IT8705F
LPC
2S1P1F+HW Monitor
BIOS
4M flash ROM
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Introduction •5
Main Board Drawing
Figure 2: Main Board Drawing
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6•Introduction
1.3.1 CompactPCI Bus Interface
The cPCI-6830 operates in a 6U CompactPCI system. The CompactPCI
standard is electrically identical to the PCI local bus standard but has been
enhanced to work in harsh environments and support more peripheral
slots. Additionally, when used in a Hot Swap compliant backplane and in
accordance with theCompactPCI Hot Swap Specification, PICMG 2.1,
Version1.0thecPCI-6830supports hosting hotswappable peripheralsina
powered system. The cPCI-6830 can also function ina standard (non-Hot
Swap) CompactPCI system without live insertion and extraction capability.
1.3.2 Pentium III or Tualatin Processor
The cPCI-6830 uses the Intel Pentium III or Tualatin Processor. These
processors are highly integrated assembly containing immediate
system-levelsupport. The256/512KB(dependingonmodelofprocessor)
on-dietransfer L2 cache isintegratedwiththeCPU,eliminatingtheneedfor
separate components and improving performance.
ThePentiumIII(Coppermine)processorrunsatacorespeedofupto1GHz,
with a Front Side Bus (FSB) speed of 100 or 133 MHz. The Tualatin
processorcorespeedis1.4GHzwiththeFSBat133MHz. TheVIAPRO266T
DDR sets the FSB operation at 66/100/133 MHz (auto-selected).
1.3.3 Interrupts
The enhanced interrupt controller supported by the VT8233 provides the
cPCI-6830 with a total of 15 interrupt inputs. Interrupt controller features
include support for:
•Level-triggered and edge-triggered inputs
•Individual input masking
•Fixed and rotating priorities
Interrupt sources include:
•Counter/Timers
•Serial I/O
•Keyboard
•Printer Port
•Floppy disk
•IDE interface
•Real-Time Clock
•On-board PCI devices
Enhanced capabilities include the ability to configure each interrupt level for
active high going edge or active low-level inputs.
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Introduction •7
1.3.4 PICMG 2.1 Hot Swap Support
The cPCI-6830 Hot-Swap capability allows non-system slot boards to be
added or removed while the system is powered up. The cPCI-6830
providesindependentclocks for each slot and access to the ENUM# signal
on the backplane are compatible to PICMG 2.1 Hot Swap Specification.
However, the cPCI-6830 itself is not hot swappable.
The hot swappable system is dependent on system controller, peripheral
cards, backplane, operating system supporting, driver supporting and
application supporting.
1.3.5 Power Ramp Circuitry
ThecPCI-6830features apowercontrollerwithpower rampcircuitrytoallow
the board's voltages to be ramped in a controlled fashion. The power ramp
circuitry eliminates any large voltage or current spikes caused by hot
swapping boards. This controlled ramping is a requirement of the
CompactPCI Hot Swap specification, PICMG 2.1, Version 1.0.The
cPCI-6830's power controller unconditionally resets the board when it
detects that the 3.3V, 5V, and 12V supplies are below an acceptable
operating limit. These limits are defined as 4.75V (5V supply), 3.0V (3.3V
supply), and 10.0V (+12V supply).
1.3.6 Watchdog Timer
The watchdog timer optionally monitors system operation and can be
programmedfordifferent timeout periods (from 1 seconds to 255 seconds
or1 minute to 255minutes). It isa two-stage watchdog, meaning that it can
beenabledtoproduceanon-maskableinterrupt (NMI)or a"CPU init"before
it generates a Reset. Failure to strobe the watchdog timer within the
programmed time period may result in an NMI, a reset request, or both. A
registerbitcanbeenabledtoindicateifthewatchdogtimercausedthereset
event. This watchdog timer register is cleared on power-up, enabling
system software to take appropriate action if the watchdog generated the
reboot. See Chapter 7, "Watchdog Timer," for more information, including
sample code.
1.3.7 Ethernet Interfaces
ThecPCI-6830providesthree10/100MbpsEthernet interface.TwoEthernet
interface aresupplied via the Intel 82559 chip, the other one is supplied via
the VIA VT6103 PHY chip, which is connected to the VT8233. Every port is
assigned a unique static MAC Address. The board’s Ethernet Addresses
aredisplayedonthreelabelsattachedtotheboard. The integrated Ethernet
controller enabling/disabling depends on the existence of VT6103. The
BIOS have a selection in the CMOS setup to disable these three LAN ports.
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8•Introduction
1.3.8 Serial I/O
Two serial ports are supported on cPCI-6830.The EIA232 drivers and
receiversresideonboard.COM2is a DB9 connector on the rear panel and
COM1isavailableasaRJ45connector on thefrontpanel. Both ports will be
configuredasDTE.Firmwarewill initialize the twoserialportsas COM1 and
COM2 with ISA I/O base addresses of 3F8h and 2F8h respectively. This
default configuration also assigns COM1 to IRQ4 and COM2 to IRQ3. The
cPCI-6830 serial controller resides in the ITE IT8705F Super I/O device.
1.3.9 IEEE-1284 Parallel Port/Printer Interface
TheparallelI/Ointerface signals are routed to a DB25 connector on the rear
I/O module. This port supports the full IEEE-1284 specifications and
provides the basic printer interface.
FirmwarewillinitializetheparallelportasLPT1withISAI/Obaseaddressof
378h.This default configuration also assigns the parallel port to IRQ7. The
printer interface mode (Normal, Extended, EPP, or ECP) is selectable
through the BIOS SETUP utility with the ITE IT8705F Super I/O device
managing the cPCI-6830’s parallel port.
1.3.10 Universal Serial Bus (USB)
The Universal Serial Bus (USB) provides a common interface to
slower-speed peripherals. Functions such as keyboard, serial ports,
printer port, and mouse ports can be consolidated into USB, simplifying the
cablingrequirementsofcomputers.ThecPCI-6830 provides two USB ports
on the rear I/O module and is controlled by the VT8233 device.
1.3.11 IDE Controller and Floppy Interface Controller
ThecPCI-6830includesanIDEController(intheVT8233)andaFloppyDisk
Controller(inthe IT8705).TheIDEControllerprovides supportforinternalor
external IDE drives. Signals are available at the IDE connectors CN5 and
CN6. IDE1(CN6)canbeconnectedtoeithera40or44-pin pin header while
IDE2 is only available in a 40-pin connection. The FDD Controller provides
support for an external FDD drives. Signals are available at the FDD
connector CN8 and are routed to a 34-pin pin header.
1.3.12 Keyboard/Mouse Controller
The cPCI-6830 includes an on-board PC/AT keyboard and mouse
controller. The keyboard/mouse signals are available through the PS/2
circularDINonthefrontpanel. ThecPCI-6830’s keyboard/mouse controller
resides in the ITE VT8233 device
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Introduction •9
1.3.13 Software
The cPCI-6830 includes the ADLINK NuIPC Embedded BIOS loaded in
on-boardflash. TheBIOSisuser-configurable to boot an operating system
from local flash memory, a fixed or floppy drive, or over a network.
ThecPCI-6830 is compatible with all major PC operating systems. ADLINK
provides support, which may include additional drivers for ADLINK
peripherals. Software device drivers for the cPCI-6830 may be found in the
ADLINK CD.
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10 •Introduction
1.4Specifications
General CompactPCI Features
•PCI Rev.2.1 compliant
•PICMG 2.0 CompactPCI Rev. 3.0 compliant.
•PICMG 2.1 CompactPCI Hot-Swap Specification R2.0 compliant
•PICMG 2.16 CompactPCI Packet Switch Backplane R1.0 Compliant
Form Factor
•Standard 6U CompactPCI (board size: 233.35mm x 160mm)
•Dual-space width (8TE/HP, 40.64mm)
CPU/Cache
•Intel Socket-370 FC-PGA2 Pentium-III (Tualatin) with 512KB on-die L2
cache @ full-core speed & 133MHz FSB, CPU speed up to 1.26GHz
•Intel Socket-370 FC-PGA Pentium III with 256KB on-die L2 cache @
full-core speed & 133/100MHz FSB, CPU speed up to 1GHz
•Intel Socket-370 FC-PGA Celeron with 128KB on-die L2 cache @
full-core speed & 66/100MHz FSB, CPU speed up to 1GHz
•Front side bus (FSB) frequency: 66/100/133MHz
Chipset
•VIA PRO266T chipset
•VIA VT8653 north bridge and VT8233 south bridge
•VIA VT8101 VPX 64-bit/66MHz PCI bus controller
Host Memory
•Three 184-pin DDR SDRAM DIMM sockets support up to 3.0GB host
memory
•Supports un-buffered or buffered DDR200/DDR266 SDRAM (512Mb x8
or x16)
•Supports 2.5V DDR DIMMs in single-side or double-side
•Supports DDR DIMM with ECC for DRAM integrity
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Introduction •11
BIOS
•Phoenix/Award PnP BIOS with 4Mb Flash ROM
•BIOS write protection, provide anti-virus capability
•Customized power-on screen (for OEM project)
•DMIBIOSSupport:Desktop Management Interface (DMI)allowsusers to
download system hardware-level information such as CPU type, CPU
speed, internal/external frequencies and memory size.
•On-board Ethernet ports and hardware monitoring can be disabled by
BIOS setting
•Remote Console: setup console redirection to serial port (terminal
mode) with CMOS setup access
•ACPI 1.0, APM 1.2, PC 99 and PC 99A compliant
Real -Time Clock and Nonvolatile Memory
•Build-in VIA VT8233 south bridge RTC
•Battery-backed memory is used for BIOS configuration
•Separate 3V coin cell CR2032 battery used for RTC and nonvolatile
memory
On Board Peripherals
•Integrated in VIA VT8233 south bridge
•Bus Master EIDE controller, dual EIDE ATA-66/100 interfaces for up to
four EIDE devices, including HDD, ATAPI CD-ROM, LS120, ZIP, Flash
Disk and CompactFlash drives.
•Two USB ports on rear faceplate with USB Spec Rev. 1.1 compliant
•USB ports support 0.5A@5V for peripherals with individual over-current
protection
•Optional AC-97 audio CODEC Realtek ACL-200 SoundBlaster Pro
compatible audio on rear I/O transition module
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12 •Introduction
On Board Supper I/O
•ITE Super I/O controller IT8705 with WDT and Hardware Monitoring
•Two16C550UART,compatibleRS-232 serial ports with ESD protection
to 2KV. COM1 connected through a RJ-45 connector on the front
faceplate and COM2 is connected through a DB-9 connector on rear I/O
board
•One high-speed bi-directional IEEE-1284 SPP/EPP/ECP parallel port
with ESD protection to 4KV and downstream device protection to 30V is
routed to rear I/O faceplate
•One 34-pin floppy interface goes to rear I/O board, support two floppy
drives (360KB, 720KB, 1.2MB, 1.44MB, 2.88MB)
•Two 6-pin circular mini-DIN connectors are located on the rear I/O
faceplate for keyboard and PS/2 mouse connections
Watchdog Timer
•Programmable I/O port 2Eh and 2Fh to configure watchdog timer,
programmable timer 1~255 seconds or 1~255 minutes
•Bundled easy-programming library for DOS, Windows 95, 98, NT, 2000
Hardware Monitoring
•Built-in IT8705, monitoring two CPU temperatures, two CPU fans,
system temperature and DC Voltages
VGA Display
•PCI VGA controller ATI RageXL, with build-in 8M VRAM
•VGA display via DB-15 connector onfront faceplate
•High performance, 128-bit, single clock cycle 2D drawing engine
•High performance, power managed 3D acceleration engine
•ACPI, VESA DPMS and VESA DDC 2b compliant
•Supports up to 1600x1200 VGA display resolution with 32-bit true color,
non-interlaced
•RAMDAC Latch-up protection
•Driver supporting: Windows95/98/ME/NT/2000, Linux
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