ADLINK Technology PCIe-9529 User manual

Advance Technologies; Automate the World.
PCIe-9529
8-CH 24-Bit 192 kS/s
Dynamic Signal Acquisition Module
User’s Manual
Manual Rev.: 2.00
Revision Date: July 11, 2014
Part Number: 50-11255-1000

ii
Revision History
Revision Release Date Description of Change(s)
2.00 July 11, 2014 Initial Release

Preface iii
PCIe-9529
Preface
Copyright 2014 ADLINK Technology, Inc.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect,
special, incidental, or consequential damages arising out of the
use or inability to use the product or documentation, even if
advised of the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the Euro-
pean Union's Restriction of Hazardous Substances (RoHS) direc-
tive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manu-
facturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.

iv Preface
NOTE:
NOTE:
Additional information, aids, and tips that help users perform
tasks.
CAUTION:
Information to prevent minor physical injury, component dam-
age, data loss, and/or program corruption when trying to com-
plete a task.
WARNING:
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.

Table of Contents v
PCIe-9529
Table of Contents
Preface .................................................................................... iii
List of Figures ....................................................................... vii
List of Tables.......................................................................... ix
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 1
1.2 Applications ......................................................................... 1
1.3 Specifications....................................................................... 2
1.3.1 Analog Input ............................................................... 2
1.3.2 Timebase.................................................................... 9
1.3.3 Triggers ...................................................................... 9
1.3.4 General Specifications................................................ 9
1.4 Schematics and I/O ........................................................... 11
1.5 Software Support ............................................................... 13
1.5.1 SDK .......................................................................... 13
1.5.2 DSA-DASK ............................................................... 13
2 Getting Started ................................................................. 15
2.1 Package Contents ............................................................. 15
2.2 Installation Environment .................................................... 15
2.3 Installing the Module.......................................................... 16
3 Operations ........................................................................ 17
3.1 Functional Block Diagram.................................................. 17
3.2 Analog Input Channel ........................................................ 17
3.2.1 Analog Input Front-End Configuration ...................... 17
3.2.2 Input Range and Data Format .................................. 19
3.2.3 ADC and Analog Input Filter..................................... 19
3.2.4 DMA Data Transfer................................................... 20

vi Table of Contents
3.3 Trigger Source and Trigger Modes .................................... 22
3.4 Trigger Mode...................................................................... 25
3.5 ADC Timing Control ........................................................... 27
3.5.1 Timebase.................................................................. 27
3.5.2 DDS Timing vs. ADC ................................................ 27
3.5.3 Filter Delay in ADC ................................................... 27
3.6 Synchronizing Multiple Modules ........................................ 28
3.6.1 SSI_TIMEBASE........................................................ 29
3.6.2 SSI_SYNC_START .................................................. 29
3.6.3 SSI_AD_TRIG .......................................................... 30
A Appendix: Calibration....................................................... 31
A.1 Calibration Constant .......................................................... 31
A.2 Auto-Calibration ................................................................. 31
Important Safety Instructions.............................................. 33
Getting Service ..................................................................... 35

List of Figures vii
PCIe-9529
List of Figures
Figure 1-1: Analog Input Channel Bandwidth, -1dBFS 108kS/s ... 6
Figure 1-2: Analog Input Channel Bandwidth, -1dBFS 108kS/s ... 7
Figure 1-3: Spurious Free Dynamic Range 54kS/s ...................... 7
Figure 1-4: Spurious Free Dynamic Range 108kS/s .................... 8
Figure 1-5: Spurious Free Dynamic Range 192kS/s .................... 8
Figure 1-6: PCIe-9529 Side View ............................................... 11
Figure 1-7: PCIe-9529 I/O Array ................................................. 12
Figure 3-1: Analog Input Architecture ......................................... 17
Figure 3-2: Linked List of PCI Address DMA Descriptors ........... 21
Figure 3-3: Trigger Architecture .................................................. 22
Figure 3-4: External Digital Trigger ............................................. 23
Figure 3-5: Analog Trigger Conditions ........................................ 24
Figure 3-6: Post-Trigger Acquisition ........................................... 25
Figure 3-7: Delay Trigger Mode Acquisition................................ 26
Figure 3-8: Re-Trigger Mode Acquisition .................................... 26
Figure 3-9: Timebase Architecture.............................................. 27
Figure 3-10: SSI Architecture........................................................ 29

viii List of Figures
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List of Tables ix
PCIe-9529
List of Tables
Table 1-1: Timebase......................................................................... 9
Table 1-2: Trigger Source & Mode.................................................... 9
Table 1-3: Digital Trigger Input ......................................................... 9
Table 3-1: Input Range and Data Format ....................................... 19
Table 3-2: Input Range Midscale Values........................................ 19
Table 3-3: ADC Sample Rates vs DDS Output Clock..................... 20
Table 3-4: Preferred Characteristics for Analog Triggers ............... 24
Table 3-5: Timing Relationship between ADC and PLL Clock........ 27
Table 3-6: ADC Filter Delay ............................................................ 28
Table 3-7: SSI Timing Signal Definitions ........................................ 28

x List of Tables
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Introduction 1
PCIe-9529
1 Introduction
The PCIe-9529 is a high-performance 8-CH 24-Bit 192 kS/s
dynamic signal acquisition module, specifically designed for appli-
cations such as structural health monitoring, noise, vibration, and
harshness (NVH) measurement, and phased array data acquisi-
tion.
The PCIe-9529 features 24-bit simultaneous sampling at 192 kS/s
over 8 channels, and a 110 dB dynamic range, providing ample
power for high-density, high channel count signal measurement,
and vibration-optimized lower AC cutoff frequency of 0.5 Hz. All
input channels incorporate 4 mA bias current for integrated elec-
tronic piezoelectric (IEPE) signal conditioning for accelerometers
and microphones.
The PCIe-9529 is auto-calibrated with an onboard reference cir-
cuit calibrating offset and acquiring analog input errors. Following
auto-calibration, the calibration constant is stored in EEPROM,
such that these values can be loaded and used as needed by the
board. There is no requirement to calibrate the module manually.
1.1 Features
XPCI Express specification Rev. 1.1 compliant
X8 simultaneous analog inputs
X192 kS/s maximum sampling rate
XAC or DC input coupling, software selectable
XSupport for:
ZOne external digital trigger input
ZIEPE output on each analog input, software configurable
ZAuto-calibration
1.2 Applications
XStructural health monitoring
XPhase array data acquisition
XNoise, vibration, and harshness (NVH) detection
XMachine status monitoring

2 Introduction
1.3 Specifications
1.3.1 Analog Input
Channel Characteristics
Channels 8
Type Differential or pseudo-differential
Coupling AC or DC, software selectable
AC coupling cutoff
frequency 0.5Hz
ADC resolution 24-Bit
ADC type Delta-sigma
Input signal range ±10V, ±1V
Sampling rate (FS)
8 kS/s to 192 kS/s,
768 S/s increments for Fs > 108 kS/s,
576 S/s increments for 54 kS/s Fs 108 kS/s
192 S/s increments for 8KS/sFs 54kS/s
Over voltage
protection
Differential:
±42.4V,
Pseudo-differential:
>>positive terminal ±42.4 V
>>negative terminal unprotected, rated at ±2.5 V
Input impedance 1M, (50between negative input and system
ground for pseudo-differential mode)
Offset error ±1 mV max.
Gain error ±0.1% of FSR
IEPE Current 4 mA, each channel independently software
configurable
IEPE Compliance 24V

Introduction 3
PCIe-9529
System Noise
Common Mode Rejection Ratio (CMRR)
-3 dB Bandwidth
Flatness
Sample Rate (kS/s) System Noise1 (LSBrms)1
Fs = 54 kS/s 37.4
Fs = 108 kS/s 66.5
Fs = 192 kS/s 74.6
1. Shorted input
Input Range (V) CMRR1(dB)
±1V 65
±10V 80
1. Input frequency < 1 kHz
Sample rate1-3 dB bandwidth
Fs < 108 kS/s >0.4863 FS
Fs > 108 kS/s >0.22 FS
1. Disable digital filter when Fs < 108 kS/s; Enable digital filter
when Fs > 108 kS/s
Flatness (dB)1
Input Range (V) 54 kS/s
20 Hz to 22 kHz
108 kS/s
20 Hz to 45 kHz
192 kS/s
20 Hz to 42 kHz
±1V, ±10V 0.06 0.08 0.1
1. Relative to 1 kHz

4 Introduction
Spurious Free Dynamic Range (SFDR)
Dynamic Range
System to Noise Ratio
Total Harmonic Distortion (THD)
SFDR (dBc)1,2
Input Range (V) Fs = 54 kS/s Fs = 108 kS/s Fs = 192 kS/s
±1V, ±10V 104 104 105
1. 1 kHz input tone and -1 dBFS input amplitude.
2. Measurement Includes harmonics.
Dynamic Range (dBFS)1
Input Range (V) Fs = 54 kS/s Fs = 108 kS/s Fs = 192 kS/s
±1V, ±10V 107 100 100
1. 1 kHz input tone and -60 dBFS input amplitude
SNR (dBc)1
Input Range (V) Fs = 54 kS/s Fs = 108 kS/s Fs = 192 kS/s
±1V, ±10V 104 99 98
1. 1 kHz input tone and -1 dBFS input amplitude
THD (dBc)1
Input Range (V) Fs = 54 kS/s Fs = 108 kS/s Fs = 192 kS/s
±1V -106 -106 -107
±10V -104 -104 -105
1. 1 kHz input tone and -1 dBFS input amplitude

Introduction 5
PCIe-9529
Total Harmonic Distortion plus noise (THD+N)
Intermodulation Distortion
Crosstalk
Interchannel Gain Mismatch
THD+N (dBc)1
Input Range (V) 54 kS/s
20 Hz to 22 kHz
108 kS/s
20 Hz to 45 kHz
192 kS/s
20 Hz to 42 kHz
±1V -96 -94 -95
±10V -96 -92 -95
1. 1 kHz input tone and -1 dBFS input amplitude
IMD (dBc)1,2
Input Range (V) Fs = 54 kS/s Fs = 108 kS/s Fs = 192 kS/s
±1V -103 -99 -99
±10V -105 -101 -101
1. CCIF 14 kHz + 15 kHz
2. -6 dBFS input amplitude for each tone
Crosstalk (dBc)1,2
Input Range (V) 1 kHz 0.5 Fs
±1V, ±10V -100 -97
1. Shorted input
2. -1 dBFS input amplitude
Input Range (V) Gain Mismatch (dB)1
±1V, ±10V 0.1
1. 1 kHz input tone and -1 dBFS input amplitude

6 Introduction
Interchannel Phase Mismatch
Figure 1-1: Analog Input Channel Bandwidth, -1dBFS 108kS/s
Input Range (V) Phase Mismatch (°)1
±1V, ±10V 1 khz 20 khz 86.4 khz
0.1 0.442 1.64
1. -1 dBFS input amplitude
10
2
10
3
10
4
10
5
−25
−20
−15
−10
−5
0
Magnitude Response
Frequency (Hz)
Magnitude (dB)

Introduction 7
PCIe-9529
Figure 1-2: Analog Input Channel Bandwidth, -1dBFS 108kS/s
Figure 1-3: Spurious Free Dynamic Range 54kS/s
10
−1
10
0
10
1
−4.5
−4
−3.5
−3
−2.5
−2
−1.5
−1
−0.5
0
Frequency (Hz)
Magnitude (dB)
Response when AC coupling enabled
0 0.5 1 1.5 2 2.5
x 104
−160
−140
−120
−100
−80
−60
−40
−20
0
Frequency (Hz)
Magnitude (dB)
SFDR 54 kS/s (1V Input Range, −1 dBFS and 1 kHz Sine Wave Input)

8 Introduction
Figure 1-4: Spurious Free Dynamic Range 108kS/s
Figure 1-5: Spurious Free Dynamic Range 192kS/s
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
x 10
4
−160
−140
−120
−100
−80
−60
−40
−20
0
Frequency (Hz)
Magnitude (dB)
SFDR 108 kS/s (1V Input Range, −1 dBFS and 1 kHz Sine Wave Input)
0123456789
x 104
−160
−140
−120
−100
−80
−60
−40
−20
0
Frequency (Hz)
Magnitude (dB)
SFDR 192 kS/s (1V Input Range, −1 dBFS and 1 kHz Sine Wave Input)

Introduction 9
PCIe-9529
1.3.2 Timebase
Table 1-1: Timebase
1.3.3 Triggers
Table 1-2: Trigger Source & Mode
Table 1-3: Digital Trigger Input
1.3.4 General Specifications
Sampling Clock
Sampling Clock
Timebase
Internal: onboard synthesizer (10 MHz, accuracy
< ± 25ppm)
External: SSI
Delay Trigger Timebase PCIe clock (125 MHz)
Trigger Source & Mode
Trigger source Software, external digital trigger, analog trigger, and SSI
Trigger mode Post trigger and delay trigger
Digital Trigger Input
Sources Front panel SMB connector
Compatibility 3.3 V TTL, 5 V tolerant
Input high threshold 2.0 V
Input low threshold (VIL) 0.8 V
Maximum input overload -0.5 V to +5.5 V
Trigger polarity Rising or falling edge
Pulse width 20 ns minimum
Physical
Physical dimensions 167.64W x 106.68H mm (6.53 x 4.16 in)
Bus
Bus interface PCI Express x 4
Environmental Tolerance

10 Introduction
Operating Temperature: 0°C - 55°C
Relative humidity: 10% - 90%, non-condensing
Storage Temperature: -20°C - +80°C
Relative humidity: 10% - 90%, non-condensing
Calibration
Onboard reference +5.000 V
Temperature coefficient < 5.0 ppm/°C
Warm-up time 15 minutes
Power Consumption
Power Rail Standby Current (mA) Full Load (mA)
+3.3 V 584 630
+12 V 904 1160