EPC EPC9036 User manual

EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2014
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DESCRIPTION
These development boards are in a monolithic half- bridge topology with on-board gate drives,
featuring the EPC2100/1/5 eGaNICs (Enhancement-mode Gallium Nitride Integrated Circuit).
The purpose of these development boards is to simplify the evaluation process of these
monolithically integrated eGaN FETs by including all the critical components on a single board
that can be easily connected into any existing converter.
The development board is 2” x 2” and contains one eGaNIC in half-bridge conguration using the
Texas Instruments LM5113 gate driver, supply and bypass capacitors. The board contains all critical
components and layout for optimal switching performance and has additional area to add buck
output lter components on board. There are also various probe points to facilitate simple wave-
form measurement and eciency calculation. A complete block diagram of the circuit is given in
Figure 1.
For more information on the EPC2100/1/5 eGaNICs, please refer to the datasheets available from
EPC at www.epc-co.com. The datasheet should be read in conjunction with this quick start guide.
Development Board
EPC9036/37/41
Quick Start Guide
Monolithic Half-Bridge with
Gate Drive for EPC2100/1/5
Demonstration Board Notication
These boards are intended for product evaluation purposes only and are not intended for commercial use. As evaluation tools, they are not designed for compliance with the European Union directive on
electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials
that are not RoHS compliant. Ecient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant. No Licenses are implied or granted under any patent
right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual
property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specications.
Symbol Parameter Conditions Min Max Units
VDD Gate Drive Input Supply Range 7 12 V
VIN Bus Input Voltage Range
When using 30 V devices, EPC9036 24* V
When using 60 V devices, EPC9037 48* V
When using 80 V devices, EPC9041 64* V
VOUT Switch Node Output Voltage
When using 30 V devices, EPC9036 30* V
When using 60 V devices, EPC9037 60* V
When using 80 V devices, EPC9041 80* V
IOUT Switch Node Output Current
When using 30 V devices, EPC9036 28* A
When using 60 V devices, EPC9037 22* A
When using 80 V devices, EPC9041 20* A
VPWM
PWM Logic Input Voltage
Threshold
Input ‘High’ 3.5 6 V
Input ‘Low’ 0 1.5 V
Minimum ‘High’ State Input
Pulse Width
VPWM rise and fall time < 10ns 50 ns
Minimum ‘Low’State Input Pulse
Width
VPWM rise and fall time < 10ns 100# ns
**Maximum input voltage depends on inductive loading, Maximum switch node ringing must be kept under device rated voltage.
* Maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermal cooling. eGaNIC
intended for high step-down ratio applications.
# Limited by time needed to‘refresh’high side bootstrap supply voltage.
Table 1: Performance Summary (TA = 25°C)

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2014 | | PAGE 2
EPC9037/37/41
QUICK START PROCEDURE
The development boards are easy to set up to evaluate the perfor-
mance of the eGaNIC. The board allows the on-board placement of
buck output lter components. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power o, connect the input power supply bus to +VIN (J5, J6)
and ground / return to –VIN (J7, J8).
2. With power o, connect the switch node of the half bridge OUT
(J3, J4) to your circuit as required.
3. With power o, connect the gate drive input to +VDD (J1, Pin-1) and
ground return to –VDD (J1, Pin-2).
4. With power o, connect the input PWM control signal to PWM
(J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between
7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the
absolute maximum voltage on VOUT as indicated in the table below:
a. EPC9036, 30 V
b. EPC9037, 60 V
c. EPC9041, 80 V
7. Turn on the controller / PWM input source and probe switching
node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control
within the operating range and observe the output switching
behavior, eciency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE. When measuring the high frequency content switch node (OUT), care must
be taken to avoid long ground leads. Measure the switch node (OUT) by placing
the oscilloscope probe tip through the large via on the switch node (designed for
this purpose) and grounding the probe directly across the GND terminals provided.
See Figure 3 for proper scope probe technique.
Figure 1: Block Diagram of Development Board
VDD
VIN
PWM
Input
OUT
VSW
Gate Drive Supply
Pads for Buck Output Filter
Monolithic
Half Bridge
Logic and
Dead-time
Adjust
Gate Drive
Regulator
LM5113
Gate
Driver
VERSION
*
(For Eciency
Measurement)
Gate Drive Supply
(Note Polarity)
+
7 V – 12V
+
_
PWM Input
+
VDD Supply
VIN Supply
V
IN
(For Eciency
Measurement)
Pads for Buck
Output Filter
See table for max
V
OUT
V
SW
PGND
+
VOUT
V
A
IIN
_
_
_V
See table
for max
Do not use probe ground lead
Place probe tip
in large via at OUT
Minimize loop
Ground probe
againstTP3
Figure 2: Proper Connection and Measurement Setup
Figure 3: Proper Measurement of Switch Node – OUT

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2014 | | PAGE 3
EPC9037/37/41
THERMAL CONSIDERATIONS
The EPC9036/37/41 development boards showcase the EPC2100/1/5
eGaNIC. These development boards are intended for bench evalua-
tion with low ambient temperature and convection cooling. The ad-
dition of heat-sinking and forced air cooling can signicantly increase
Figure 4: EPC9036Typical Waveforms forVIN = 12V to 1.2 V/25 A (1000 kHz) Buck converter
showing rising and falling edges, CH4: (VOUT) Switch node voltage
750
650 ps rise time
350 MHz
ringing
3 V
ps fall time
the current rating of these devices, but care must be taken to not
exceed the absolute maximum die temperature of 150°C.
NOTE. These development boards do not have any current or thermal protection on
board.
Item Qty Reference Part Description Manufacturer
1 3 C4, C10, C11, Capacitor, 1µF, 10%, 25 V, X5R Murata, GRM188R61E105KA12D
2 2 C16, C17 Capacitor, 100pF, 5%, 50 V, NP0 Kemet, C0402C101K5GACTU
3 2 C9, C19 Capacitor, 0.1µF, 10%, 25 V, X5R TDK, C1005X5R1E104K
4 4 C21, C22, C23, C24 Capacitor - See Table 3 See Table 3
5 2 D1, D2 Schottky Diode, 30 V Diodes Inc., SDM03U40-7
6 3 J1, J2, J9 Connector 2 pins of Tyco, 4-103185-0
7 6 J3, J4, J5, J6, J7, J8 Connector FCI, 68602-224HLF
8 1 Q1 eGaNIC , - see Table 3 See Table 3
9 1 R1 Resistor, 10.0K, 5%, 1/8 W Stackpole, RMCF0603FT10K0
10 2 R2, R15 Resistor, 0 Ohm, 1/8W Stackpole, RMCF0603ZT0R00
11 1 R4 Resistor, 47 Ohm, 1%, 1/8W Stackpole, RMCF0603FT47R0
12 1 R5 Resistor, - see Table 3 See Table 3
13 4 R19, R20, R23, R24 Resistor, 0 Ohm, 1/20W Panasonic, ERJ-1GE0R00C
14 2 TP1, TP2 Test Point Keystone Elect, 5015
15 1 TP3 Connector 1/40th of Tyco, 4-103185-0
16 1 U1 I.C., Logic Fairchild, NC7SZ00L6X
17 1 U2 I.C., Gate driver Texas Instruments, LM5113
18 1 U3 I.C., Regulator Microchip, MCP1703T-5002E/MC
19 1 U4 I.C., Logic Fairchild, NC7SZ08L6X
20 0 R14 Optional Resistor
21 0 D3 Optional Diode
22 0 P1, P2 Optional Potentiometer
Table 2: Bill of Materials - Amplier Board

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2014 | | PAGE 4
EPC9037/37/41
Board
Number Item Qty Reference Part Description Manufacturer / Part #
EPC9036
4 4 C21, C22, C23, C24 Capacitor, 4.7µF, 10%, 50V, X5R TDK, C2012X5R1H475K125AB
8 2 Q1, Q2 eGaNIC EPC2100
12 1 R5 Resistor, 22 Ohm, 1%, 1/8W Stackpole, RMCF0603FT22R0
EPC9037
4 4 C21, C22, C23, C24 Capacitor, 1µF, 10%, 100V, X7S TDK, CGA4J3X7S2A105K125AE
8 2 Q1, Q2 eGaNIC EPC2101
12 1 R5 Resistor, 47 Ohm, 1%, 1/8W Stackpole, RMCF0603FT47R0
EPC9041
4 4 C21, C22, C23, C24 Capacitor, 1µF, 10%, 100V, X7S TDK, CGA4J3X7S2A105K125AE
8 2 Q1, Q2 eGaNIC EPC2105
12 1 R5 Resistor, 47 Ohm, 1%, 1/8W Stackpole, RMCF0603FT47R0
Table 3: Variable BOM Components

4
VCC
7 - 12 Vdc
C4
1µF, 25V
C10 1µF, 25V
1
2
J1 CON2
R1 10k
PWM1
GND
A
B
Y
VDD
U1 NC7SZ00L6X
24 V
SWOUT
GND
1
TP3 CON1
1
2
3
4
J8 CON4
1
2
3
4
J7 CON4
1
2
3
4
J3 CON4
1
2
3
4
J4 CON4
1
2
3
4
J6 CON4
1
2
3
4
J5 CON4
C11 1µF, 25V
1
TP2 Keystone 5015
1
TP1 Keystone 5015
R2 Zero
R14 Optional
R15 Zero
R5
See Table
D2
SDM03U40
R4
47
D1
SDM03U40
PWM2
VCC
OUT 1
NC 2 NC 3
GND 4
NC
5
NC
6
NC
7
IN
8
GND
9
U3 MCP1703
1
2
J2 CON2
1 2
J9 CON2
2
P1
Optional
2
P2
Optional
GND
A B
Y
VDD
U4 NC7SZ08L6X
C9
0.1µF, 25V
C22
C23
C21
U2 LM5113TM
C19
0.1µF, 25V
C17
100pF
C16 100pF
D3
Optional
C24
4.7µF, 50V
1:4 HB
Q1
R19
Zero
R20
Zero
R23
Zero
R24
Zero
Development Board Schematic EPC9036/37/41