EPC 9115 User manual

EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015
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DESCRIPTION
The EPC9115 demonstration board is a fully regulated 300 kHz isolated DC/DC bus converter
with a 12 V, 42 A output and a input range of 48 – 60 V. The demonstration board features the
enhancement mode (eGaN®) field effect transistors (FETs), the EPC2020 (60 V) and EPC2021 (80 V),
along with eGaN FET specific integrated circuit drivers – the LM5113 half-bridge driver and
UCC27611 low side driver from Texas Instruments. The power stage is a conventional
hard-switched 300 kHz isolated buck converter. The EPC9115 board is intended to
showcase the superior performance that can be achieved using eGaN FETs and eGaN driver
together in a conventional topology.
The complete converter ts within a standard eighth-brick envelope, but the demonstration board
is oversized to allow connections for bench evaluation. There are also various probe points to
facilitate simple waveform measurement and eciency calculation.
A complete block diagram of the circuit is given in Figure 1. The converter uses a full-bridge (FB)
primary power stage, a 4:1 transformer, and a center-tapped (CT) output stage with active reset
snubbers. Control is provided by a Microchip dsPIC® controller, and basic voltage mode control
is implemented. For more information on the EPC2020 and EPC2021 eGaN FETs, as well as the
gate drivers and controller, please refer to the datasheets available from EPC at www.epc-co.com,
www.ti.com, and www.microchip.com. These datasheets, should be read in conjunction with
this quick start guide.
Demonstration Board
EPC9115
Quick Start Guide
1/8th Brick Converter
Featuring EPC2020 and EPC2021
Demonstration Board Notication
EPC9115 boards are intended for product evaluation purposes only and are not intended for commercial use. As evaluation tools, they are not designed for compliance with the European Union directive on
electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials
that are not RoHS compliant. Ecient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant. No Licenses are implied or granted under any patent
right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual
property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specications.
Table 1: Performance Summary (VIN=52 V, TA= 25°C, 400 LFM unless otherwise specied)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Bus Input Voltage Range 48 52 60 V
V
OUT
Output Voltage 11.41 12 12.1 V
I
OUT
Output Current
2
T
a
= 25°C, no forced air cooling
3
5 A
T
a
= 25°C, ~200 LFM 35 A
T
a
= 25°C, ~400 LFM 42 A
f
SW
Switching Frequency 300 kHz
Output Ripple Frequency 600 kHz
Peak Eciency 48 V
IN
, 30 A I
OUT
96.7 %
Full Load Eciency 52 V
IN
, 42 A I
OUT
96.4 %
Full Load Eciency 56 V
IN
, 42 A I
OUT
96.3 %
Full Load Eciency 60 V
IN
, 42 A I
OUT
96.1 %
1 Output voltage duty cycle limited to 98%
2 Maximum current limited by thermal considerations
3 Board placed vertical on long edge to aid convection – Do NOT operate horizontally without forced air cooling

QUICK START GUIDE
EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 2
EPC9115
QUICK START PROCEDURE
Figure 1: Block Diagram of EPC9115 Demonstration Board
Demonstration board EPC9115 is easy to set up to evaluate the
performance of the EPC2020 and EPC2021 eGaN FETs and LM5113 and
UCC27611 drivers. Refer to Figure 2 for proper connect and measurement
setup and follow the procedure below:
1. With power o, connect the input power supply bus between
VIN+ and VIN- euro connectors as shown.
2. Add input and output voltage measurements to the Kelvin
connections provided as shown.
3. With power o, connect the load as desired between VOUT+ and VOUT-
euro connectors as shown. A resistive or constant current load is
recommended.
4. Turn on the supply voltage to the required value. Do not exceed the
absolute maximum voltage of 60 V on VIN.
5. Measure the output voltage to make sure the board is fully functional
and operating no-load.
6. Turn on active load and adjust to the desired load current while staying
below the maximum current (This will depend on the cooling provided.
If no forced air cooling, then keep the load current below 5 A).
7. If testing under moderate to full load conditions, ensure that a fan
or other source of forced convection is producing adequate airow
(≥ 400 LFM recommended for full load operation).
8. Once operational, adjust the bus voltage and load current within the
allowed operating range and observe the output switching behavior,
eciency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE. For accurate high frequency content switch node and gate voltage waveforms,
use a short ground clip or purpose-made probe adapter, as shown in Fig. 3. Avoid long
ground leads on oscilloscope probes. Please note that primary and secondary side
grounds are not connected to each other on the EPC9115 demo board. When
measuring multiple signals ensure that they are always referenced to the same ‘ground’
potential to avoid potential circuit failure or instrumentation failure.
EPC2021
Q1
EPC2021
Q2
EPC2021
Q3
EPC2021
Q4
4T
1T
EPC2020
Q5
EPC2020
Q7
Cf
12*4.7 uF
Lf1 470nH
EPC2020
Q6
EPC2020
Q8
1T
R2
5.2k
C1
100n
C2
470nF
D1
D4
D5
M1
Lf2
330n
Cf1
12*1 uF
M2
A2
Controller
A1
V_OUT+
vp+
vp-
vsa
vsb
vsct
Vsnub
vsa
vsb
V_OUT-
V_IN+
V_IN-
p1
p1
p2
p2
s1 s2
snb1 snb2
I_OUT_SNS
V_OUT_SNS
V_BIAS_PRI
V_BIAS_SEC
p1
p2
s1
s2
snb1
snb2
I_OUT_SNS
V_OUT_SNS

QUICK START GUIDE
EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 3
EPC9115
CIRCUIT PERFORMANCE
The EPC9115 demonstration circuit was designed to showcase the
size and performance that can readily be achieved using eGaN
FETs. The 300 kHz operating frequency is 50% - 100% higher than
typical commercial eighth-brick converters.
Figure 4 shows typical full-load waveforms for a 52 V input voltage
using probe tip adapters as shown in Figure 3. Figure 5 shows efficiency
plots for several input voltages at 400 LFM (2 m/s) airflow at 25 °C.
Data are taken after converter reaches thermal steady state.
Figure 4:Typical waveforms taken at 52VIN to 12VOUT/42 AOUT
QUICK START PROCEDURE
Figure 3: Proper Measurement of Switch Nodes or OutputVoltage
Figure 2: Proper Connection and Measurement Setup
EPC 9115, Regulated Eigth-brick Demo Board
VIN Supply
<60 V Load
Secondary Waveforms
Primary Waveforms
Vds
Vds
Vgs
Vgs
VIN− VIN+
VIN−
VOUT−VOUT+
VOUT− VOUT+
VIN−
VIN+
AA
V
V
Minimize loop
Do not use probe ground lead
Vpri Switch Node
10 V/div
Vsec Drain Node
5 V/div
Vpri Gate
4V/div

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 4
EPC9115
OPERATING CONSIDERATIONS
The EPC9115 is a demonstration platform intended to show the
capabilities of eGaN FETs in an eighth-brick application. The converter has
basic regulation and overcurrent protection, but the complete feature set
often found with 1/8th-brick converters is not implemented. In particular,
the EPC9115 does not have overvoltage, over-temperature, or fast-acting
short-circuit protection. Hence, the circuit is recommended for power
stage and eciency evaluation purposes. The transient response has not
been optimized.
SOURCE and LOAD: It is recommended that the converter be driven from a
source with both low ac and dc impedance. Additional input capacitance
may be added as necessary. Additional output capacitance may be added
to the output in the form of electrolytic capacitors, up to 1000 μF. Addition
of bulk capacitance in the form of low ESR capacitors is not recommended.
THERMAL MANAGEMENT: The EPC9115 demo board has no on-board
thermal protection. Thermal images for steady state full load operation
are shown in Figure 6. The EPC9115 is intended for bench evaluation with
nominal room ambient temperature and forced air cooling.
Operation without forced air cooling is possible for limited power
operation. It is recommended that the maximum temperature on the
EPC9115 not exceed 125 °C.
ELECTRICAL PROTECTION: Overcurrent protection is set at a nominal
value of 50 A at room temperature. Current sensing is implemented using
inductor DCR sensing, and as a result exhibits variability as a function of
the inductor and its temperature. As the inductor becomes hotter, the trip
point becomes lower.
The EPC9115 demo board does not have any input overvoltage protection
on board. It is also recommended to make sure that the converter is started
with an output voltage of 1V or less.
Figure 5: Typical eciency curves. Operating conditions: 400 LFM (2 m/s) forced convection, ambient
temperature 27 °C, thermal steady state.The converter is running unregulated for the 48 V case.
Figure 6:Thermal images of EPC9115. Operating conditions: 400 LFM (2 m/s) forced convection, ambient temperature 27 °C, thermal steady state.
98
97
96
95
94
93
92
91
90
Ecieny (%)
VIN = 60
VIN = 56
VIN = 52
VIN = 48
0 10 20 30 40 50
IOUT (A)
400 LFM

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 5
EPC9115
Table 2: Bill of Materials
Designator Description Quantity Value MFG MFGPN
C1, C2, C3, C4, C10, C11 Capacitor, 2.2 µF, 6.3 V, X5R 6 2.2 µ F TDK Corporation C1005X5R0J225M050BC
C12, C13, C17, C42, C43, C46, C47,
C50, C55, C58 Capacitor, 22 pF, 50 V, NPO, 5% 10
22 pF Murata GRM1555C1H220JA01D
C14, C16 Capacitor, 4.7 µF, 6.3 V, X7S 2
4.7 µ F TDK C1608X7S0J475K080AC
C18 Capacitor, 1000 pF, 50 V, NPO, 5% 1 1000 pF Murata GRM1555C1H102JA01D
C19 Capacitor, 0.1 µF, 50 V, X7R 1
100 nF, 50 V TDK C1005X7R1H104K050BB
C20, C21, C22, C23, C24, C25, C51,
C54, C65, C67, C68, C69 Capacitor, 1 µF, 100 V, X7S 12
1 µ F, 100 V TDK C2012X7S2A105M125AE
C26 Capacitor, 0.047 µF, 25 V, X7R, 5% 1 0.047 µF, 25 V Murata GRM155R71E473JA88D
C27, C28, C29, C30, C31, C32, C33,
C34, C35, C36, C37, C38 Capacitor, 4.7 µF, 25 V, X7R 12
4.7 µF, 25 V TDK CGA4J1X7R1E475K125AC
C39 Capacitor. 3300 pF, 2000 V, X7R 1 3300 pF Johanson 202S43W332KV4E
C40, C41, C44, C45, C48, C49, C52,
C53, C70, C71 Capacitor 10
0.22 µ F Murata GRM155R71C224KA12D
C5, C59, C61, C64, C66 Capacitor 4 0.1 µF, 100 V Murata GRM188R72A104KA35D
C6, C9 Capacitor, 3.3 µF, 16 V, X5R 2 3.3 U TDK Corporation C1608X5R1C335K
C60, C62 Capacitor 2 2.2 U Samsung CL31B225KCHSNNE
C63 Capacitor 1
470 nF, 50 V TDK CGA4J3X7R1H474K125AB
C7 Capacitor, 330 pF, 25 V, NPO, 5% 1
330 pF Murata GRM1555C1E331JA01D
C8 Capacitor, 0.1 µF, 16 V, X7R 1 0.1 µ F Murata GRM155R71C104KA88D
D1, D2, D3 Schottky diode 3 BAT41K ST Microelectronics BAT41KFILM
D6, D9 Schottky 60 V 1A 2 60 V, 1 A Vishay MSS1P6-M3/89A
D7 Zener Diode 1
33 V, 10 mA NXP BZX384-C33,115
J2 Programming connector 1
N/A TE Connectivity 5520425-3
J3, J5, J6, J9, J10, J13 Test point 6 N/A Keystone 5015
J4, J8 Power connector 2 N/A Molex 399100102
J7, J14, J15, J16 Connector 4 N/A Tyco 4-103185-0-02
L1 Inductor 1
180 Ω TDK MPZ1608S181ATAH0
L2 Inductor 1
0.33 µ F, 20 A Abracon ASPI-7318-R33M-T
L3 470 nH, 62A inductor 1 470 nH Vishay IHLP-6767GZ-01
Q1, Q2, Q3, Q4 eGaN FET, 80 V, 60 A, 2.5 mΩ 4 EPC EPC2021
Q13, Q14 NPN/PNP DFN PBSS4160PANP 2 NXP PBSS4160PANP,115
Q16 DUAL NPN DFN PBSS4160PAN 1 NXP PBSS4160PAN,115
Q5, Q6, Q7, Q8 eGaN FET, 60 V, 60 A, 2 mΩ 4 EPC EPC2020
Q9, Q10 P-Channel DMOS FET, -60 V,
1.6 A, logic level gate 2 Vishay SQ1421EEH-T1-GE3
R1, R19, R26, R33, R40, R42,
R43 Resistor 7 1R0 Yageo RC0402FR-071RL
R12, R13 Resistor, 1% 2 470 Vishay CRCW0402470RFKED
R14 Resistor, 0.1% 1 4.99 K, 0.1% Susumu RG1608P-4991-B-T5
R15, R46, R48, R51 Resistor, 0.1% 4 1 K, 0.1% Susumu RG1005P-102-B-T5
R2 Resistor 1 100 K Vishay CRCW0603100KFKEA
R20, R24, R27, R31, R34, R38,
R41, R45 Resistor 8 4.7 Yageo RC0402FR-074R7L
R21, R23, R28, R30, R37, R44,
R59, R60 Resistor 8 49.9 Yageo RC0402FR-0749R9L
R22, R25, R29, R32 Resistor 4 ZERO Vishay CRCW04020000Z0ED
R3, R4 Resistor 2 33.2 K Vishay RC0402FR-0733K2L

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 6
EPC9115
Table 2: Bill of Materials
Designator Description Quantity Value MFG MFGPN
R36, R57 Resistor 2 1 Vishay CRCW08051R00FKEA
R39, R53 Resistor 2 2 Vishay CRCW08052R00FKEA
R47 Resistor 1 249 Yageo RC0402FR-07249RL
R49 Resistor, 0.1% 1 20 K, 0.1% Susumu RG1005P-203-B-T5
R5, R11, R16, R17 Resistor 4 10 K Vishay CRCW040210K0FKED
R50 Resistor, 0.1% 1 4.99 K, 0.1% Susumu RG1005P-4991-B-T5
R55, R56 Resistor 2 2.2 Yageo RC0402FR-072R2L
R6, R18 Resistor 2 15 K Yageo RC0402FR-0715KL
R7, R8 Resistor 2 4.75 K Yageo RC0402FR-074K75L
R9, R10 Resistor 2 1.8 K Yageo RC0402FR-071K8L
T1 Bias transformer 1 Custom Coils CCI-7082
U1 3.3 V linear regulator 1 3.3 V Microchip MCP1700T3302EMBCT-ND
U10, U11 eGaN Gate Driver with LDO 2 TI UCC27611DRVT
U12 Rail-to-Rail Input/Output, ±15 V,
Operational Amplier 1 TI OPA209AIDBV
U2, U4 5.0 V linear regulator 2 LP2985 5 V TI LP2985-50DBVR
U3 Power supply controller 1 On Semiconductor NCP1030DMR2G
U5 dsPIC microcontroller 1 Microchip DSPIC33FJ16GS502-E/M
U6 Dual inverter 1 NC7WZ14 Fairchild NC7WZ14EP6X
U7 2 channel unidirectional
magnetic isolator 1 IL611 NVE Corporation IL611-1E
U8, U9 half-bridge eGaN gate driver 2 LM5113 TI LM5113TME/NOPB
CORE1 Planer E core 1 Ferroxcube EQ20/R-3F35
CORE2 Planer I core 1 Ferroxcube PLT20/S-3F35

EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 7
QUICK START GUIDE EPC9115
Figure 7: EPC9115 Demonstration board schematic - Power
CENTER-TAPPED PLANAR XFORMER
PLANAR XFORM
11
J3
11
J6
1
1J13
3300P
1 2
C39
1
2
1U, 100V
C25
12
1U, 100V
C24
12
1U, 100V
C23
12
1U, 100V
C22
12
1U, 100V
C54
12
1U, 100V
C69
0.33U 20A
1 2
L2
1
1J9
GS1_1
GND OUT_RET
GPURGPUL
GPLL
VIN_FILT
PRYSWR
PRYSWL
GS1_2
VIN
GS2_2
GS2_1
SEC _SW
G PL R
15k
12
R18
4.7 uF 35V4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V 4.7 uF 35V
C27 C28 C29 C30 C31 C32 C33C34C35 C36 C37 C38
470nH
L 3
IOUT_ SENSE
1 2
60V 1A
D6
60V 1A
D9
0.1uF, 100V
C59
0.1uF, 100V
C64
0.1uF, 100V
C61
0.1uF, 100V
C66
D7
DNP
1 2
D4
2
12
R53
2
12
R3 9
2E2
1
2
R5 6
2E2
12
R55
VCC_SEC
V_ SNUB
OUT_ R ET
V_ SNUB_ 2
VG _SNUB1
VG _SNUB2
OUT_ R ET
OUT_ RET
V_ SNUB_ 1
GND
GND
+OUT
OUT_ R ET
11
22
J4
CON- 0399100102
1
1
2
2
J8
CON- 0399100102
80V
G
D1
S1
Q1
80V
G
D1S1
Q2
80V
G
D1
S1
Q4
80V
G
D1S1
Q3
60V
G
D1
S1
Q5
60V
G
D1S1
Q6
60V
G
D1
S1
Q8
60V
G
D1
S1
Q7
1
1
2
2
3
344
55
66
77
88
BR 1
EBDOSA
VIN
VIN
GND OUT_ R ET
+OUT
C63
Q9
SQ1421EEH
Q10
SQ1421EEH
12
1U, 100V
C68
1
2
1U, 100V
C67
*
C60
2.2U
C62
2.2U
12
1U, 100V
C65
*
C26
12
1U, 100V
C51
12
1U, 100V
C21
12
1U, 100V
C20
J11 J12
PRYSW
V_ SNUB_ 2
V_ SNUB_ 1
1
1 2
R5 7
1
1 2
R36
J1
SEC _SW _C T
DNP
C72
Cap Pol1
DNP
C73
Cap Pol1
DNP
C75
Cap Pol1
DNP
C74
Cap Pol1
OUT_ R ET
1
1J10
1
1J5
OUTER_METAL
.1" Male Vert.
1
2
J7
.1" Male Vert.
1
2
J14
1
2
J15
1
2
J16
470n, 50V
0.047u, 50V
AK
.1” Male Vert.
.1” Male Vert.
D Zener
CENTER-TAPPED PLANAR XFORMER

EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 8
QUICK START GUIDE EPC9115
Figure 8: EPC9115 Demonstration board schematic – Gate Drive
6
2
1
Q16A
PBSS4160PAN
6
2
1
Q13A
PBSS4160PANP
4
5
3
Q13B
PBSS4160PANP
1.8k
R9
1.8k
4.7k
R7
4.7k
3
5
4
Q16B
PBSS4160PAN
6
2
1
Q14A
PBSS4160PANP
4
5
3
Q14B
PBSS4160PANP
1.8k
R1 0
1.8k
4.7k
R8
4.7k
OUT_RET
VG_SNUB1 VG_SNUB2
DSP_SIG_SNUB1 DSP_SIG_SNUB2
V_SNUB_2V_SNUB_1
0.22U
1
2
C41
1R0
1 2
R19
0.22U
1 2
C70
ZERO
1 2
R25
4.99
1 2
R20
ZERO
1 2
R22
4.99
1 2
R24
LM5113
LOH A1
VSS
A2
A3
LILOHI
A4 B1
B4
HS C1
C4
HOLD1
D2
D3
HS1D4
U8
22P
12
C43
22P
12
C42
49.9
1 2
R21
49.9
1 2
R23
GND
GND
+5V_PRY
SIG_1
GPUL
GPLL
SIG_2
PRYSWL
VDD1
VDDHB
HIHOH
0.22U
1 2
C49
1R0
1 2
R33
0.22U
1 2
C48
4.99
1 2
R34
4.99
1 2
R38
22P
1
2
C50
49.9
1 2
R37
+5V0_SEC
GS1_1
OUT_RET
OUT_RET
OUT_RET
DSP_SIG_SEC1
GS1_2
6
2
3EP
4
5
LDO VRE F
VSS
1VDD
U10
UCC27611DRV
1R0
1 2
R40
0.22U
1
2
C45
1R0
1 2
R26
0.22U
1 2
C44
ZERO
1 2
R32
4.99
1 2
R27
ZERO
1 2
R29
4.99
1 2
R31
LM5113
A1
A2
A3
A4 B1
B4
C1
C4
D1
D2
D3
D4
U9
22P
1
2
C13
22P
12
C12
49.9
1 2
R60
49.9
1 2
R59
GPLR
GND
GND
+5V_PRY
SIG_1
GPUR
SIG_2
PRYSWR
DNP
1 2
R35
GND GND
LOH
VSS
LILOHI
HS
HOL
HS1
VDD1
VDDHB
HIHOH
0.22U
1 2
C53
1R0
1 2
R42
0.22U
1 2
C52
4.99
1 2
R41
4.99
1 2
R45
22P
12
C55
49.9
1 2
R44
+5V0_SEC
OUT_RET
OUT_RET
OUT_RET
DSP_SIG_SEC2
GS2_2
GS2_1
UCC27611DRV
6
2
3EP
5
4
LDO VRE F
VSS
1VDD
U11
1R0
1 2
R43

EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2015 | | PAGE 9
QUICK START GUIDE EPC9115
Figure 9: EPC9115 Demonstration board schematic – Bias and Control
IL611
1
2
3
4 5
6
7
8
U7
470
1 2
1%
R12
22P
1 2
C58
22P
1 2
C17
1 6
+5V
5
U6A
NC7WZ14
NC7WZ14
3 4
U6B
GND
+5V_PRY
OUT_RET
SIG_1
SIG_2
DSP_SIG1
DSP_SIG2
49.9
1 2
R28
49.9
1 2
R30
22P
12
C46
22P
12
C47
GND GND
+5V_PRY
0.22U
2
C71
GND
0.22U
1 2
C40
GND
470
1 2
1%
R13
IN1+
IN1-
IN2+
IN2- GND
O2
O1
VDD
AN2/CMP1C/CMP2A/RA2
AN3/CMP1D/CMP2B/RP0/CN0/RB0
AN4/CMP2C/CMP3A/RP9/CN9/RB9
AN5/CMP2D/CMP3B/RP10/CN10/RB10
VSS0
OSC1/CLKIN/AN6/CMP3C/CMP4A/RP1/CN1/RB1
OSC2/CLKO/AN7/CMP3D/CMP4B/RP2/CN2/RB2
PGED2/DACOUT/INT0/RP3/CN3/RB3
PGEC2/ETXREF/PR4/CN4/RB4
VDD
PGED3/RP8/CN8/RB8
PGEC3/RP15/CN15/RB15
TDO/RP5/CN5/RB5
PGED1/TDI/SCL/RP6/CN6/RB6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AN1/CMP1B/RA1
AN0/CMP1A/RA0
MCLR
AVDD
AVSS
PWM1L/RA3
PWM1H/RA4
PWM2L/RP14/CN14/RB14
PWM2H/RP13/CN13/RB13
TCK/PWM3L/RP13/CN12/RB12
TMS/PWM3H/RP11/CN11/RB11
VCAP/VDDCORE
VSS1
PGEC1/SDA/RP7/CN7/RB7
EP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
29
U5
180 OHMS
1 2
L1
4.7U
1
2
C16
4.7U
12
C14
10K
1
2
R16
10K
12
R17
11
J2A
22
J2B
33
J2C
44
J2D
55
J2E
10K
12
R11
MCLR
MCLR
3V3_SEC
+3V3_SEC
+3V3_SEC
+3V3_SEC
OUT_RET
OUT_RET
OUT_RET
OUT_RET
B
ADSP_SIG_SEC1
VOUT_DSP
DSP_SIG_SEC2
PGEC
PGEC
SDA
SDA
SCL
SCL
DSP_SIG1
DSP_SIG2
PGED
PGED
DSP_SIG_SNUB1
DSP_SIG_SNUB2
IOUT_DSP
IN CIRCUIT PROGRAM HEADER FOR CONTROLLING PARAMETERS, 12C
33FJ16GS502
4.99K
1
2
0.1%
R14
1K
12
0.1%
R15
1000P
1
2
C18
+OUT
OUT_RET
VOUT_DSP
+
SP
2
3
4
5
1
U12
OPA2 09AIDB V
DNP
1
2
R52
1k
1 2
0.1%
R48
100nF,50 V
C19 249
1 2
R47
DNP
12
C57
DNP
1 2
C15
OUT_RET
OUT_RET
IOUT_SENSE
+OUT
V_SNUB
OUT_RET
IOUT_D
DNP
D5
+3V3_SEC
1k
1 2
0.1%
R51
1k
1
2
0.1%
R46
4.99k
1 2
0.1%
R50
20k
1 2
0.1%
R49
2.2U
1
2
C10
EN
3
VO 5
GND 2
VI
1
BYP 4
U4
NCP1030
GND
1
CT
2
VFBF
3
COMP
4OV 5
UV 6
VCC 7
VDR8
U3
100 K
12
R2
15K
1
2
R6
330 P
12
C7
33.2K
12
R3
10K
12
R5
12
D3
3.3U
1
2
C9
12
D1
3.3U
12
C6
1 2
D2
0.1U
12
C8
1
2
T1A
33
44
T1B
5
66
T1C
0.1U
12
C5
1R0
1 2
R1
33.2K
12
R4
EN
3
VO 5
GND 2
VI
1
BYP 4
U2
2.2U
12
C2
2.2U
12
C3
2.2U
1
2
C4
VO 3
2
1
2.2U
12
C1
2.2U
12
C11
+5V0_SEC
+3V3_SEC
GND
+5V_PRY
OUT_RET
VCC_SEC
VCC_SEC
VIN_FILT
R1 handy to disable bias
VIN
GND
GND
GND
VCC_PRY
VCC_PRY
VCC_PRY
BAT41K
BAT41K
BAT41K
LP2985 5V0
U1
3V3
LP2985 5V0