Hitachi H8S/2678 Series User manual

Hitachi 16-Bit Single-Chip Microcomputer
H8S/2678 Series
H8S/2677
HD64F2677, HD6432677
H8S/2676
HD64F2676, HD6432676
H8S/2675
HD6432675
H8S/2673
HD6432673
H8S/2670
HD6412670
Reference Manual
ADE-602-192A
Rev. 2.0
12/5/00
Hitachi, Ltd.

H8S/2678 Series, H8S/2677 F-ZTAT™,
H8S/2676 F-ZTAT™ Reference Manual
Publication Date: 1st Edition, March 2000
2nd Edition, December 2000
Published by: Electronic Devices Sales & Marketing Group
Semiconductor & Integrated Circuits
Hitachi, Ltd.
Edited by: Technical Documentation Group
Hitachi Kodaira Semiconductor Co., Ltd.
Copyright © Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.

Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.

Main Revisions and Additions in this Edition
Page Item Revisions (See Manual for Details)
6 1.2 Block Diagram Figure 1.1 Internal Block Diagram
PLLVCC and PLLVSS pins added
151 4.5.12 Burst Operation Figure 4.29 Operation Timing in Fast Page Mode (1)
Title in parentheses amended
CAST = 1 →CAST = 0
286 5.16.3 Pin Functions Table 5.35 Port G Pin Functions
PG3 to PG0: Description amended
291 5.17.3 Pin Functions Table 5.37 Port H Pin Functions
PH1 and PH0: Description amended
295, 296 5.18.1 Port States in Each
Processing State Table 5.38 I/O Port States in Each Processing State
PG5 and PG4 states amended
378 to
380 7.1.2 DC Characteristics Table 7.2 DC Characteristics
Entire table amended
Table 7.3 Permissible Output Currents
Max. values of ΣIOL and Σ–IOH amended
384 7.1.3 AC Characteristics Figure 7.3 (2) Oscillation Stabilization Timing added
414 Figure 7.36 WDT Output Timing amended
417 7.2.1 Absolute Maximum
Ratings Table 7.11 Absolute Maximum Ratings
Note: Operating temperature ranges amended
418, 419 7.2.2 DC Characteristics Table 7.12 DC Characteristics
Entire table amended
420 Table 7.13 Permissible Output Currents
Max. values of ΣIOL and Σ–IOH amended
432, 433 7.2.6 Flash Memory
Characteristics Conditions: Operating temperature range amended
Unit of tEamended
z and γamended

Organization of H8S/2678 Series
Reference Manual
The following manuals are available for H8S/2678 Series products.
Table 1 H8S/2678 Series Manuals
Title Document Code
H8S/2600 Series, H8S/2000 Series Programming Manual ADE-602-083A
H8S/2678 Series Hardware Manual ADE-602-193A
H8S/2678 Series Reference Manual ADE-602-192A
The H8S/2600 Series, H8S/2000 Series Programming Manual gives a detailed description of the
architecture and instruction set of the H8S/2600 CPU incorporated into H8S/2678 Series products.
The H8S/2678 Series Hardware Manual describes the operation of on-chip functions common to
H8S/2678 Series products, and gives a detailed description of the related registers.
The H8S/2678 Series Reference Manual mainly covers information specific to H8S/2678 Series
products, including pin arrangement, I/O ports, MCU operating modes (memory maps), interrupt
vectors, bus control, and electrical characteristics, and also includes a brief description of all I/O
registers for the convenience of the user.

The contents of the H8S/2678 Series Hardware Manual and the H8S/2678 Series Reference
Manual are summarized in table 2.
Table 2 Contents of Hardware Manual and Reference Manual
No. Item Hardware Manual Reference Manual
1 Overview (Including pin
arrangement)
2 MCU operating modes (including memory maps) —
3 Exception handling
4 Interrupt controller
5 Bus controller
6 DMA controller (DMAC) —
7 Data transfer controller (DTC) —
8 16-bit timer unit (TPU) —
9 Programmable pulse generator (PPG) —
10 8-bit timers —
11 Watchdog timer —
12 Serial communication interface (SCI) —
13 Smart card interface —
14 A/D converter —
15 D/A converter —
16 RAM —
17 ROM (flash memory) —
18 Clock pulse generator —
19 Power-down modes —
20 I/O ports (including port block diagrams) —
21 Electrical characteristics —
22 Register reference chart (in address order,
with function summary) —
23 Instruction set —
24 Package dimension diagrams —
: Included
: Included (with detailed register descriptions)
—: Not included

The following chart shows where to find various kinds of information for different purposes.
Overview
Pin arrangement diagram
Block diagrams of function modules
Pin functions
Electrical characteristics
For product
evaluation
information, or
comparative
specification
information
for current
users of Hitachi
products
1.1 Overview
1.3 Pin Arrangement
Section 6 Peripheral Block Diagrams
1.5 Pin Functions
Section 7 Electrical Characteristics
I/O port information
Interrupts and exception handling
Information on other modules
Pin functions
For detailed
information
on functions Section 5 I/O Ports
Section 3 Exception Handling and
Interrupt Controller
H8S/2678 Series Hardware Manual
1.5 Pin Functions
List
Detailed descriptions
1.4 Pin Functions in Each Operating
Mode
Section 2 MCU Operating Modes
List
To find a register from its address
To find register information by function
Setting procedure and notes
For use as design
material Section 8 Registers
8.1 List of Registers (Address Order)
8.2 List of Registers (By Module)
H8S/2678 Series Hardware Manual
List
Operation description and notes
Program examples
H8S/2600 Series, H8S/2000 Series
Programming Manual
For H8S/2678 Series specifications
For details of operation of H8S/2678 Series modules
For information on H8S/2678 Series operating modes
For information on H8S/2678 Series registers
For information on H8S/2678 Series instructions

i
Contents
Section 1 Overview........................................................................................................... 1
1.1 Overview............................................................................................................................ 1
1.2 Block Diagram................................................................................................................... 6
1.3 Pin Arrangement................................................................................................................ 7
1.4 Pin Functions in Each Operating Mode............................................................................. 8
1.5 Pin Functions..................................................................................................................... 20
1.6 Product Lineup................................................................................................................... 28
1.7 Package Dimensions..........................................................................................................28
Section 2 MCU Operating Modes................................................................................. 29
2.1 Overview............................................................................................................................ 29
2.1.1 Operating Mode Selection (F-ZTAT Version)..................................................... 29
2.1.2 Operating Mode Selection (ROMless and Mask ROM Versions)....................... 31
2.1.3 Register Configuration ......................................................................................... 33
2.2 Register Descriptions......................................................................................................... 33
2.2.1 Mode Control Register (MDCR).......................................................................... 33
2.2.2 System Control Register (SYSCR)....................................................................... 34
2.3 Operating Mode Descriptions............................................................................................ 35
2.3.1 Mode 1 (Expanded Mode with On-Chip ROM Disabled) ................................... 35
2.3.2 Mode 2 (Expanded Mode with On-Chip ROM Disabled) ................................... 35
2.3.3 Mode 3.................................................................................................................. 35
2.3.4 Mode 4 (Expanded Mode with On-Chip ROM Enabled)..................................... 36
2.3.5 Mode 5 (External ROM Activation Expanded Mode with On-Chip ROM
Enabled)................................................................................................................ 36
2.3.6 Mode 6 (External ROM Activation Expanded Mode with On-Chip ROM
Enabled)................................................................................................................ 36
2.3.7 Mode 7 (Single-Chip Activation Mode with On-Chip ROM Enabled)............... 36
2.3.8 Modes 8 and 9 [F-ZTAT Version Only]............................................................... 37
2.3.9 Mode 10 [F-ZTAT Version Only]........................................................................ 37
2.3.10 Mode 11................................................................................................................ 37
2.3.11 Mode 12 ............................................................................................................... 37
2.3.12 Modes 13 and 14 [F-ZTAT Version Only]........................................................... 37
2.3.13 Mode 15 [F-ZTAT Version Only]........................................................................ 37
2.4 Pin Functions in Each Operating Mode............................................................................. 38
2.5 Memory Map in Each Operating Mode............................................................................. 39
Section 3 Exception Handling and Interrupt Controller......................................... 53
3.1 Overview............................................................................................................................ 53
3.1.1 Exception Handling Types and Priority............................................................... 53