MiTAC PH10CMU User manual

MITAC Industrial MB PH10CMU
Product Guide

1. Block Diagram
*Remark:
The M.2 2280 M-key slot s with PCIe x4 lanes. If for using Intel Optane Memory H-series module (by
2 split PCIe x2), additional ME update is needed so as to support it.

2. Board placement

3. Connector & Header Pin Definition
A
J_HDA_1
Front Audio Header
B
SW1
COM3 Termination Resistor Switch
ON:PULL HIGH, OFF:NC
Pin
Net name
1
NRX3
2
NDCD3
3
NTX3
4
NDTR3

C
COM3
RS232/RS422/RS485 Header
D,E
COM1,COM2
RS232 Header

F
FP_USB3_1
Dual USB3.0 Header
Pin
Signal
Pin
Signal
1
+5V DC
Key (no pin)
2
3.0 Data (negative)
19
+5V DC
3
3.0 Data (positive)
18
3.0 Data (negative)
4
Ground
17
3.0 Data (positive)
5
3.0 Data (negative)
16
Ground
6
3.0 Data (positive)
15
3.0 Data (negative)
7
Ground
14
3.0 Data (positive)
8
2.0 Data (negative)
13
Ground
9
2.0 Data (positive)
12
2.0 Data (negative)
10
No Connect
11
2.0 Data (positive)
G
FP_USB2_1
Dual USB2.0 Header

H
J_FIO
Front I/O Header
Pin
Signal Name
Description
Pi
n
Signal Name
Description
1
HDD_POWER_LE
D
Pull-up resistor
(750ohm) to +5V
2
POWER_LED_MAI
N
[Out] Front panel LED
(main color)
3
HDD_LED#
[Out] Hard disk activity
LED
4
POWER_LED_ALT
[Out] Front panel LED
(alt color)
5
GROUND
Ground
6
POWER_SWITCH#
[In] Power switch
7
RESET_SWITCH#
[In] Reset switch
8
GROUND
Ground
9
+5V_DC
Power
10
KEY
No pin
I~N
SATA1~6
SATA Header

Pin
Signal Name
Description
1
GND
Ground
2
SATAHDR_TXP0_C
SATA DATA Transmit (positive)
3
SATAHDR_TXN0_C
SATA DATA Transmit (negative)
4
GND
Ground
5
SATAHDR_RXN0_C
SATA DATA Receive (negative)
6
SATAHDR_RXP0_C
SATA DATA Receive (positive)
7
GND
Ground
GND1
GND
Ground
GND2
GND
Ground
O
SPI_HDR1
SPI Programing Header(Debug)
Pin
Signal Name
1
GND
2
P_Flash(3.3V)
3
NC
4
ROMWREN0_N
5
SPI_MOSI_FLASH
6
SPI_MISO_FLASH
7
SPI_CLK_FLSH
8
SPI_CS0_N_FLASH
9
NC
10
NC
P
JPSON1
AT/ATX Mode Selection Header
Pins 1&2: jumper position for AT Mode

Pins 2&3: NON-AT Mode
AT/ATX Mode selection
1-2
AT Mode
2-3
NON-AT Mode
Q
M2E_1
M.2 KEY E Connector