MiTAC PH10CMU User manual

MITAC Industrial MB PH10CMU
Product Guide

1. Block Diagram
*Remark:
The M.2 2280 M-key slot s with PCIe x4 lanes. If for using Intel Optane Memory H-series module (by
2 split PCIe x2), additional ME update is needed so as to support it.

2. Board placement

3. Connector & Header Pin Definition
A
J_HDA_1
Front Audio Header
B
SW1
COM3 Termination Resistor Switch
ON:PULL HIGH, OFF:NC
Pin
Net name
1
NRX3
2
NDCD3
3
NTX3
4
NDTR3

C
COM3
RS232/RS422/RS485 Header
D,E
COM1,COM2
RS232 Header

F
FP_USB3_1
Dual USB3.0 Header
Pin
Signal
Pin
Signal
1
+5V DC
Key (no pin)
2
3.0 Data (negative)
19
+5V DC
3
3.0 Data (positive)
18
3.0 Data (negative)
4
Ground
17
3.0 Data (positive)
5
3.0 Data (negative)
16
Ground
6
3.0 Data (positive)
15
3.0 Data (negative)
7
Ground
14
3.0 Data (positive)
8
2.0 Data (negative)
13
Ground
9
2.0 Data (positive)
12
2.0 Data (negative)
10
No Connect
11
2.0 Data (positive)
G
FP_USB2_1
Dual USB2.0 Header

H
J_FIO
Front I/O Header
Pin
Signal Name
Description
Pi
n
Signal Name
Description
1
HDD_POWER_LE
D
Pull-up resistor
(750ohm) to +5V
2
POWER_LED_MAI
N
[Out] Front panel LED
(main color)
3
HDD_LED#
[Out] Hard disk activity
LED
4
POWER_LED_ALT
[Out] Front panel LED
(alt color)
5
GROUND
Ground
6
POWER_SWITCH#
[In] Power switch
7
RESET_SWITCH#
[In] Reset switch
8
GROUND
Ground
9
+5V_DC
Power
10
KEY
No pin
I~N
SATA1~6
SATA Header

Pin
Signal Name
Description
1
GND
Ground
2
SATAHDR_TXP0_C
SATA DATA Transmit (positive)
3
SATAHDR_TXN0_C
SATA DATA Transmit (negative)
4
GND
Ground
5
SATAHDR_RXN0_C
SATA DATA Receive (negative)
6
SATAHDR_RXP0_C
SATA DATA Receive (positive)
7
GND
Ground
GND1
GND
Ground
GND2
GND
Ground
O
SPI_HDR1
SPI Programing Header(Debug)
Pin
Signal Name
1
GND
2
P_Flash(3.3V)
3
NC
4
ROMWREN0_N
5
SPI_MOSI_FLASH
6
SPI_MISO_FLASH
7
SPI_CLK_FLSH
8
SPI_CS0_N_FLASH
9
NC
10
NC
P
JPSON1
AT/ATX Mode Selection Header
Pins 1&2: jumper position for AT Mode

Pins 2&3: NON-AT Mode
AT/ATX Mode selection
1-2
AT Mode
2-3
NON-AT Mode
Q
M2E_1
M.2 KEY E Connector

R
J_MAPI_1
MiAPI Header
T
J48
TPM Header
Pin
Net name
Pin
Net name
1
MAPI_GPIO1
2
VCC
3
MAPI_GPIO2
4
MAPI_GPIO6
5
MAPI_GPIO3
6
MAPI_GPIO7
7
MAPI_GPIO4
8
MAPI_GPIO8
9
MAPI_GPIO5
10
MAPI_GPIO9
11
WD_Time
12
MAPI_GPIO10
13
Power Button
14
SMBUS_DATA
15
UART_TX
16
SMBUS_CLK
17
UART_RX
18
5VSB
19
GND
20
NA
Pin
Net name
Pin
Net name
1
VCC3_TPM
2
TPM_CS2
3
TPM_MISO
4
Key (no pin)
5
TPM_MOSI
6
PLTRST_N
7
PRIQ_N
8
GND
9
NC
10
SPI_CLK
11
NC
12
TPM_DET

U~V
J_CPU_FAN1, J_FIO_FAN1
FAN Header
W
SW2
PCI Express Bifurcation Switch
13
NC
14
VSB_3V3
Pin
Net name
1
CFG5
2
CFG6
3
NC
4
NC

ON:PULL LOW, OFF:NC
Y
PCIE_X4_NPIO
NPIO Header(PCIEX4)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
A1
REFCLK+
B1
PERST#
C1
VCC 3.3V
D1
SMDAT
A2
REFCLK+
B2
CLKREQ#
C2
N.C
D2
SMCLK
A3
GND
B3
GND
C3
GND
D3
GND
A4
PERp1
B4
PERp0
C4
PETp1
D4
PETp0
A5
PERn1
B5
PERn0
C5
PETn1
D5
PETn0
A6
GND
B6
GND
C6
GND
D6
GND
A7
PERp3
B7
PERp2
C7
PETp3
D7
PETp2
A8
PERn3
B8
PERn2
C8
PETn3
D8
PETn2
A9
GND
B9
GND
C9
GND
D9
GND
A1
A9
B1
B9
C1
C9
D1
D9

A2
J20
Panel Power Option
A3
M2M_1
M.2 KEY M Connector
Pin
Net name
Pin
Net name
1
Key (no pin)
2
VCC3
3
+12V
4
LCD_VCC_SEL
5
Key (no pin)
6
VCC
3.3V
_5V
12V

A5
J9
LVDS Backlight Header

A6
J5
LVDS /eDP Connector
The connector is used for LVDS/eDP, it could select by BOM option.
40-pin LVDS connector pin-out
Pin
Signal
Description
1
VCC3
VCC
2
3.3V/5V/12V
Selectable LCD power output
3
VCC3
VCC
4
3.3V/5V/12V
Selectable LCD power output
5
LVDS_DDC_SCL
LVDS_DDC_SCL
6
LVDS_DDC_SDA
LVDS_DDC_SDA
7
CABLE_ID1
VCC (reserve for MiTAC AIO CABLE_ID1, low enable)
8
GND
Ground
9
TB0P
LVDS Channel A diff data output - positive
10
TA0P
LVDS Channel A diff data output - positive
11
TB0N
LVDS Channel A diff data output - negative
12
TA0N
LVDS Channel A diff data output - negative
13
GND
Ground
14
GND
Ground
15
TD0P
LVDS Channel A diff data output - positive
16
TC0P
LVDS Channel A diff data output - positive
17
TD0N
LVDS Channel A diff data output - negative
Pin
Net name
1
BKLT_EN
2
BKLT_CTRL
3
BKLT_PWR
4
BKLT_PWR
5
GND
6
GND
7
BRIGHT_UP
8
BRIGHT_DOWN

18
TC0N
LVDS Channel A diff data output - negative
19
GND
Ground
20
GND
Ground
21
TB1P
LVDS Channel B diff data output-positive
22
TA1P
LVDS Channel B diff data output-positive
23
TB1N
LVDS Channel B diff data output-negative
24
TA1N
LVDS Channel B diff data output-negative
25
GND
Ground
26
GND
Ground
27
TD1P
LVDS Channel B diff data output-positive
28
TC1P
LVDS Channel B diff data output-positive
29
TD1N
LVDS Channel B diff data output-negative
30
TC1N
LVDS Channel B diff data output-negative
31
GND
Ground
32
GND
Ground
33
TCK1P
LVDS Channel B diff data output - positive
34
TCK0P
LVDS Channel A diff data output - positive
35
TCK1N
LVDS Channel B diff data output - negative
36
TCK0N
LVDS Channel A diff data output - negative
37
GND
Ground
38
GND
Ground
39
NC
NC (reserve for MiTAC selectable BKLT power output )
40
NC
NC (reserve for MiTAC selectable BKLT power output )
40-pin eDP connector pin-out
Pin
Signal
Description
1
VCC3
VCC
2
3.3V/5V/12V
Selectable LCD power
output
3
VCC3
VCC
4
3.3V/5V/12V
Selectable LCD power
output
5
EDP_CPU_AUX-
Aux channel
6
EDP_CPU_AUX+
Aux channel
7
CABLE_ID1
VCC (reserve for MiTAC
AIO CABLE_ID1, low
enable)
8
HPDET
Hot plug detection

9
EDP_CPU_1+
MAIN LINK
10
EDP_CPU_0+
MAIN LINK
11
EDP_CPU_1-
MAIN LINK
12
EDP_CPU_0-
MAIN LINK
13
GND
Ground
14
GND
Ground
15
NC
NC
16
NC
NC
17
NC
NC
18
NC
NC
19
GND
Ground
20
GND
Ground
21
BKLT_EN
BKLT_EN
22
PCH_BACKLIGHT_PWM
PCH_BACKLIGHT_PWM
23
NC
NC
24
NC
NC
25
GND
Ground
26
GND
Ground
27
NC
NC
28
NC
NC
29
NC
NC
30
NC
NC
31
GND
Ground
32
GND
Ground
33
NC
NC
34
NC
NC
35
NC
NC
36
NC
NC

37
GND
Ground
38
GND
Ground
39
BKLT_PWR
Selectable BKLT power
output (12V)
40
BKLT_PWR
Selectable BKLT power
output (12V)
A9
CLCMOS1
CMOS Reset Header
Pins 1&2: jumper position for CMOS Reset
Pins 2&3: Normal
CMOS Clear
1-2
Clear CMOS
2-3
Normal
A10
INTRUD_1
Intrusion Switch Header




A11
eSPI_HDR1
Debug Header

Pin
Net name
1
INTRUDER_N
2
GND






Pin
Signal Name
1
GND
2
ESPI_RST_N
3
ESPI_CLK
4
ESPI_CS0_N
5
LAD_ESPI_IO_3
6
LAD_ESPI_IO_2
7
LAD_ESPI_IO_1
8
LAD_ESPI_IO_0
9
VCC3
10
3VSB