Texas Instruments ADS5231 EVM User manual

ADS5231/32 EVM
User's Guide
June 2007 Wireless Infrastructure - Radio
SBAU111A

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Contents
1 Overview .................................................................................................................... 51.1 Purpose............................................................................................................ 51.2 EVM Basic Functions ............................................................................................ 51.3 Power Requirements ............................................................................................ 51.4 ADS5231/32 EVM Operational Procedure .................................................................... 52 Circuit Description ...................................................................................................... 62.1 Schematic Diagram .............................................................................................. 62.2 Circuit Function ................................................................................................... 63 EVM Use With the TSW1100 ......................................................................................... 83.1 Connecting to the TSW1100.................................................................................... 83.2 Provide Power to the ADS5231/32 EVM ...................................................................... 83.3 Providing Power to the TSW1100 ............................................................................. 83.4 Connecting to the USB .......................................................................................... 93.5 Launching the TSW1100 Software ............................................................................ 93.6 Using the TSW1100 Software .................................................................................. 94 Physical Description .................................................................................................... 94.1 PCB Layout ...................................................................................................... 105 Parts List and Schematics .......................................................................................... 16
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List of Figures
1 Top Layer .................................................................................................................... 102 Layer 2, Ground Plane .................................................................................................... 113 Layer 3, Power Plane #1 .................................................................................................. 124 Layer 4, Power Plane #2 .................................................................................................. 135 Layer 5, Ground Plane .................................................................................................... 146 Layer 6, Bottom Layer ..................................................................................................... 15
List of Tables
1 Three-Pin Jumper List ...................................................................................................... 62 Output Connectors J8 and J21 ............................................................................................ 73 Test Point Descriptions ..................................................................................................... 84 ADS5231/32 EVM Parts List .............................................................................................. 16
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1 Overview
1.1 Purpose
1.2 EVM Basic Functions
1.3 Power Requirements
1.4 ADS5231/32 EVM Operational Procedure
User's GuideSBAU111A – May 2006 – Revised June 2007
ADS5231/32 EVM
This preliminary user’s guide gives a general overview of the ADS5231/32 evaluation module (EVM), andprovides a general description of the features and functions to be considered while using this module.
The ADS5231/32 EVM provides a platform for evaluating the ADS5231/32 dual, 12-bit, analog-to-digitalconverter (ADC) under various signal, reference, and supply conditions. This document should be used incombination with the EVM schematic diagram supplied.
Analog inputs to the ADC are provided via external SMA connectors. The single-ended input the userprovides is converted into a differential signal at the input of the device for both channels. Both analoginput channels of the ADS5231/32 EVM have two independent paths. One input path uses a differentialamplifier, while the other path is transformer-coupled.
The EVM provides an external SMA connector for input of the ADC clock. The single-ended input that theuser provides is transformer-coupled to provide a differential signal at both clock inputs of the device. TheEVM also allows the user to send a single-ended or true-differential clock if desired.
Digital outputs from the EVM are via two 40-pin connectors. The digital outputs from the ADC are bufferedbefore going to the connectors. The digital output connectors can be mated to TI's TSW1100 for digitalcapture.
Power connections to the EVM are via banana jack sockets. Separate sockets are provided for the ADCanalog and output driver supplies, external buffers supply, and differential amplifiers supply.
The EVM can be powered directly with only a single 3.3-V supply if using the module withtransformer-coupled input and internal reference mode. ±5 V is required if using the differential amplifierinput. A provision has been made to allow the EVM to be powered with independent analog and digitalsupplies to provide higher performance.
Voltage Limits
Exceeding the maximum input voltages can damage EVM components. Undervoltage may causeimproper operation of some or all of the EVM components.
The ADS5231/32 EVM provides a flexible means of evaluating the ADS5231/32 in a number of modes ofoperation. A basic setup procedure that can be used as a board confidence check is as follows:1. Verify all jumper settings against the schematic jumper list in Table 1 :2. Connect supplies to the EVM as follows:•3.3-V ADC output buffer supply to J17 and return to J18.•3.3-V ADC analog supply to J11 and return to J10.
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*dBFS +20 logǒcaptured max code *captured min code
2NǓ,N is the number of bits
2 Circuit Description
2.1 Schematic Diagram
2.2 Circuit Function
2.2.1 Analog Inputs
Circuit Description
3. Switch power supplies on4. Use a function generator with 50- Ωoutput to input a 45-MHz, 1.5-V offset, 3-V square-wave signal intoJ3. The frequency of the clock must be within the specification for the device speed grade. Caution:the ADS5231/32 does not work with a sinusoidal clock source.5. Use frequency generators with a 50- Ωoutput to provide a 10.1-MHz, 0-V offset, –1-dBFS amplitude,sine-wave signal into J15 and J16. This provides a transformer-coupled differential input signal to bothchannels of the ADC. A full-scale input tone into channel A or channel B can be calculated by usingthe following formula:
6. The digital patterns on output connectors J8 and J21 should now represent a sine wave and can bemonitored using a logic analyzer or TSW1100.
Table 1. Three-Pin Jumper List
Jumper Function Location: Pins 1- 2 Location: Pins 2-3 Default
W1 Reference select Internal reference External reference 1-2W2 Channel B output enable Output disabled Output enabled 2-3W3 Power down select Power-down mode Operate mode 2-3W4 Channel A output enable Output disabled Output enabled 2-3SJP1 Common-mode voltage-path provider Common-mode voltage to CHA Provide common-mode voltage 2-3differential amplifier to transformer T1W9 Invert most significant bit 2s complement Offset binary 2-3SJP3 Common-mode voltage path Provide common-mode voltage Provide common-mode voltage 2-3to CHB differential amplifier to transformer T2
The schematic diagram for the EVM is attached to the end of this document.
The following paragraphs describe the function of individual circuits. See the ADS5232 Dual, 12-Bit,65MSPS, +3.3V Analog-to-Digital Converter data sheet (SBAS294 ) or the ADS5231 Dual, 12-Bit,40MSPS, +3.3V Analog-to-Digital Converter data sheet (SBAS295 ) for device operating characteristics.
The EVM can be configured to provide the ADC with either transformer-coupled or differential amplifierinputs from a single-ended source. The inputs are provided via SMA connectors J15 and J16 fortransformer-coupled input, and J1, J2, J7, and J9 for differential amplifier input. To set up for one of theseoptions, the EVM must be configured as follows:1. For a 1:1 transformer-coupled input to the ADC, a single-ended source is connected to J15 for channelA and J16 for channel B. R5, R6, R8, and R9 must not be installed. This is the default configuration forthe EVM.2. For single-ended inputs into the differential amplifiers, sources are connected to J2 for channel A andJ9 for channel B. R5, R6, R8, and R9 must be installed, and R74, R75, R78, and R79 removed.3. For a differential input into the amplifiers, the positive source of channel A is connected to J2 and thenegative source to J1. The positive source of channel B is connected to J9 and the negative source toJ7. R5, R6, R8, and R9 must be installed, and R74, R75, R78, and R79 removed. R19 and R22 mustbe replaced with 383- Ωresistors, and R12 and R14 must be replaced with 54.9- Ωresistors for proper
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2.2.2 Clock Input
2.2.3 Control Inputs
2.2.3.1 Output Enable
2.2.3.2 MSB Control
2.2.3.3 Power Down
2.2.3.4 External Reference
2.2.4 Power
2.2.5 Outputs
Circuit Descriptiontermination.
To provide a clock to the ADS5231/32, apply a 3.3-V, 1.65-V offset, square-wave input to J3. This input isterminated with a 50- Ωresistor to ground. Caution: the ADS5231/32 does not work with a sinusoidalclock source.
The EVM has five discrete inputs to control the operation of the device.
With jumper W4 installed between pins 2 and 3, channel A of the ADC is enabled. This channel isdisabled with the jumper installed between pins 1 and 2. With jumper W2 installed between pins 2 and 3,channel B is enabled. Channel B is disabled with the jumper installed between pins 1 and 2.
With jumper W9 installed between pins 2 and 3, the outputs of the ADC are straight binary. The outputsare 2s complement with jumper W9 installed between pins 1 and 2.
With jumper W3 installed between pins 1 and 2, the ADC is in power-down mode.
With jumper W1 installed between pins 1 and 2, the ADC is in internal reference mode. The device is inexternal reference mode with jumper W1 installed between pins 2 and 3. When using the externalreference mode, install R3 and R4. Use the potentiometers R17 and R18 to adjust the corresponding topreference and bottom reference. For convenience, two test points, TP6 and TP7, allow monitoring thevoltage while using the external reference mode.
Power is supplied to the EVM via banana jack sockets. Separate connections are provided for a 3.3-Vanalog supply (J11 and J10), 3.3-V driver supply, external buffer supply (J17 and J18), and ±5-V amplifiersupply (J14, J13, and J12).
The data outputs from the ADC are buffered using two Texas Instruments SN74AVC16244s. Output dataheaders J8 and J21 are standard 40-pin headers on a 100-mil grid, and allow easy connection to a logicanalyzer or TSW1100. The connector pinout is listed in Table 2 . Furthermore, five test points are provided.They are listed in Table 3 .
Table 2. Output Connectors J8 and J21
Pin No. Description Pin No. Description
1 Output clock 21 Data bit 72 GND 22 GND3 NC 23 Data bit 84 GND 24 GND5 NC 25 Data bit 96 GND 26 GND
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3 EVM Use With the TSW1100
3.1 Connecting to the TSW1100
3.2 Provide Power to the ADS5231/32 EVM
3.3 Providing Power to the TSW1100
EVM Use With the TSW1100
Table 2. Output Connectors J8 and J21 (continued)
Pin No. Description Pin No. Description
7 NC 27 Data bit 108 GND 28 GND9 Data bit 1 (MSB) 29 Data bit 1110 GND 30 GND11 Data bit 2 31 Data bit 12 (LSB)12 GND 32 GND13 Data bit 3 33 NC14 GND 34 GND15 Data bit 4 35 NC16 GND 36 GND17 Data bit 5 37 NC18 GND 38 GND19 Data bit 6 39 NC20 GND 40 GND
Table 3. Test Point Descriptions
Test Point Function
TP1 GNDTP3 GNDTP4 GNDTP6 Bottom reference voltage when forcing external voltage (typical = 1 V)TP7 Bottom reference voltage when forcing external voltage (typical = 2 V)
The ADS5231/32 EVM allows for connection to the TSW1100, allowing easy capture and analysis of theADC digital output data. See the TSW1100 Data Capture Board Quick Start Guide (SLAU155 ) andTSW1100 User’s Guide (SLAU164 ) for more information.
Gently insert the ADS5231/32 EVM output connectors J8 and J21 into the TSW1100 input connectors J2and J1, respectively.
Follow the steps in Section 1.4 and power on the ADS5231/32 EVM.
Use either a wall-mount transformer that has an output rating of 12 VDC and 500 mA or a lab powersupply that can supply 12 VDC. Connect the output to J8 and the return to J9. Texas Instrumentsrecommends setting a current limit of 500 mA. Power on the TSW1100.
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3.4 Connecting to the USB
3.5 Launching the TSW1100 Software
3.6 Using the TSW1100 Software
4 Physical Description
Physical Description
With the PC turned on, connect the USB cable from the PC to the TSW1100 USB connector, J10. At thispoint, the PC should recognize the TSW1100. To verify, go to the Hardware Device Manager, select USBDevice, and ensure the TSW1100 is listed as a USB device. At this point, LED D13 lights on theTSW1100, signaling that the device has been configured properly and is communicating with the PC. Thisshould be the only lighted LED. If at this point more than D13 is lighted, depress the reset switch, SW2, onthe TSW1100.
With the TSW1100 recognized by the hardware device manager, the software package can be run. To runthe program, click on Start →Program Files →Texas Instruments →TI ADC Capture Card.
Using the TI chip selector, select the ADS5231/32. The software then configures itself for operation withthe ADS5231/32 EVM. Fill in the appropriate fields describing the hardware setup conditions. Whenfinished, acquire data by clicking on the red circular Acquire Data button.
This chapter describes the physical characteristics of the PCB, providing the layout of each board layer.
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4.1 PCB Layout
Physical Description
The EVM is constructed on a 6-layer, 5.15-inch ×5.05-inch, 0.062-inch thick PCB using FR-4 material.The individual layers are shown in Figure 1 through Figure 6 .
Figure 1. Top Layer
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