Z3 Technology Z3-DM8168-PCI-RPS User manual

CONFIDENTIAL Z3-DM8168-PCI-RPS
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PCIe H.264 HD Video Daughtercard
PCIe Starter Kit System
Version 1.3
July 16, 2012
Model Name: Z3-DM8168-PCI-RPS

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Z3 Technology, LLC, Lincoln, NE 68521
© Copyright 2012 Z3Technology, LLC. All rights reserved.
No part of this document may be copied or reproduced in any form or by any means without prior written consent of Z3 Technology, LLC.
Z3 Technology, LLC assumes no responsibility for any errors that may appear in this document.
This document contains confidential proprietary information that is not to be disclosed to any unauthorized person without prior written consent of Z3
Technology, LLC.
“Note: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These
limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can
radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio
communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful
interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the
interference by one or more of the following measures:—Reorient or relocate the receiving antenna.—Increase the separation between the equipment
and receiver.—Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.—Consult the dealer or an
experienced radio/TV technician for help.”

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Revision History
Version
Date
Change Note
Author
0.1
12/5/11
Original Z3-DM8168-PCI-RPS System
CH
0.2
12/8/11
Updated general description
AC
0.3
12/8/11
Updated Section 1, 6 & 9. Fixed grammatical errors
CH
0.4
12/14/11
Added Section 5.1 and 5.2
CH
0.5
12/17/11
Rewrite section 1, revised sections 3 and 4
IM
0.6
12/18/11
Technical revision with major changes throughout. Added to new section 1, full
rewrite of section 2.
BM
0.7
12/19/11
Added demo diagrams and other images. Updated document format. Updated
section 11.
CH
0.8
12/21/11
Added PCIe information
BM
0.9
12/21/11
Updated Image. Edited Table of Contents
CH
1.0
12/22/11
Updated Z3-DM8168-PCI-RPS Image
CH
1.1
2/13/12
Added Troubleshooting Section
CH
1.2
6/1/12
FCC and CE Mark Statement
NS
1.3
7/16/12
Address Update
NS

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CONTENTS
1. General Description.....................................................................................................................................5
2. Features........................................................................................................................................................5
3. Applications................................................................................................................................................. 6
4. Thermal Considerations............................................................................................................................... 6
5. Demos..........................................................................................................................................................6
5.1 Encode & Stream with PC VLC Decode..................................................................................................... 6
5.2 Encode & Stream with Z3-MVP-02 Decode............................................................................................... 9
6. Installing the Released Materials............................................................................................................... 11
7. Building the Code...................................................................................................................................... 12
8. Configuring the Target for Your Own Development Environment...........................................................12
8.1 U-boot Startup Scripts............................................................................................................................... 14
8.2 U-boot Update Scripts...............................................................................................................................14
9. Building the Code...................................................................................................................................... 15
10. UBIFS........................................................................................................................................................16
11. Dependencies.............................................................................................................................................17
12. PCI Express............................................................................................................................................... 18
12.1 About PCIe lanes and slots...................................................................................................................18
12.2 The PCI Express BIOS on the PC ........................................................................................................18
12.3 The DM8168-MOD-xx PCI Express hardware....................................................................................19
12.4 Using the DM8168 PCI Express interface............................................................................................20
13. Troubleshooting.........................................................................................................................................20
FIGURES
Figure 1................................................................................................................................................................. 7

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1. General Description
The Z3-DM8168-PCI-RPS is comprised of a set of hardware boards, software tools and applications designed
to enable the rapid development of media-centric PCI Express applications. It contains one Z3-DM8168-
MOD-3x system on module card and one Z3-DM8168-APP-2x application board with PCI Express interface
and bundled software with all of the necessary components for the user to quickly develop their own advanced
multimedia, graphics, and DSP applications.
The application board contains interfaces and I/O connectors to provide access to the module’s advanced video
processing capabilities, such as HDMI 1080p60 input and output, component input at up to 1080i60, and
RGB-S at up to 165 MHz pixel clock. The Z3-DM8168-APP-2x application board has a 2-lane PCIe interface
and can plug into a 4-lane or 16-lane PCIe slot or a 1-lane PCIe slot with open back. It has been proven on an
ASUS motherboard model P8H67-M PRO/CSM, revision 3.0.
In order to make custom hardware and software development easier, the Z3-DM8168-PCI-RPS is designed so
that standalone operation is possible. The system can then be developed and tested independently from any
hosts. To that effect, the DM8168-APP-2x board contains independent power, serial console, USB, Ethernet
and SATA jacks providing a direct connection to these DM8168 peripherals.
The Z3-DM8168-PCI-RPS software is based on the Linux OS. The kit comes with all the low level resources
such as the Linux kernel, u-boot, tool chain and starter file system pre-integrated and configured. There is no
need to port or integrate OS functions, media drivers, etc. The software bundle also contains tools to allow the
development of high level applications using hardware-accelerated video processing, DSP and graphics. The
many examples provided in source code are the ideal starting point for the development of custom
applications. Most software provided is made available in source code format as well as executable binaries.
Measuring at 68mm x 108mm, the Z3-DM8168-MOD-3x is a compact OEM processor module, supporting
H.264 High Profile codec capable of encoding and/or decoding up to two simultaneous channels of 1080p at
60 fps (frames per second). It’s rich I/O functions include Gigabit Ethernet, USB and SATA-II, making the
DM8168-MOD-3x module perfect for media storage and streaming applications, such as real time
transcoding, broadcast video encoding and decoding, digital signage and video kiosks, medical and industrial
video, video conference terminal and MCU, and high definition embedded video sub-systems. The Z3-
DM8168-MOD-3x features a unique expansion interface comprised of five high density connectors providing
easy access to the greatest majority of interface signals available from the DM8168 processor. Please refer to
the module’s documentation for more information on the available interfaces.
2. Features
Media-centric Rapid Prototype System speeds up end-user systems application development
Modular approach allows for rapid and cost effective deployment of customer’s applications
Pre-integrated, ready to run hardware and software provides for zero-development project start up
Standalone operation independent of PCIe host makes it an easier development environment
PCI Express 2-lane add-in card footprint provides high bandwidth communication with a PCI host

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Video inputs include HDMI 1.4a at up to 1080p60, analog YPbPr and RGB
HDMI video output at up to 1080p60
Independent GigE, SATA, USB and serial console I/O connectors for direct access to CPU peripherals
3. Applications
The Z3-DM8168-PCI-RPS is designed to facilitate the implementation of video, audio and graphics functions
on embedded applications such as video security, video conference, video infrastructure, medical and multi-
channel industrial video processing. The versatile design allows the system designer to focus on the end
application with confidence that the Z3-DM8168-PCI-RPS will handle all of the audio and video media
operations required with little or no additional engineering effort. Whether the end application requires encode
or decode media from storage or streaming, the readily available, production-ready Z3-DM8168-PCI-RPS will
simplify the overall system design, reducing time to market and development costs.
The modular building-block approach enables quick and cost effective deployment of end-user systems by
simplifying the system design. The application system architect is free to focus entirely on the unique, value-
add portion of the design instead of spending a large amount of energy into building the infrastructure.
4. Thermal Considerations
The main processor on the Z3-DM8168-MOD-3x generates a large amount of heat, and is cooled by a fan heat
sink. The heat sink may reach temperatures in excess of 75 degrees C during work. Please ensure that the
airflow for the heat sink is free and unimpeded at all times. The hot air must have a place to escape in order to
allow for room air to be used to cool the chip. Failure to do so may result in permanent damage to the
processor.
The maximum continuous power consumption by the whole DM8168-MOD-3X system during normal
operation should be less than 18W, but up to 14W can be dissipated by the processor module. It is necessary to
plan a cooling strategy appropriately.
5. Demos
5.1 Encode & Stream with PC VLC Decode
The encode and stream to PC demo can support HDMI input. The connections are labeled below.

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Figure 1
The video source must be a NON-HDCP source for the HDMI input to work properly. We use a Brite-View
media player model BV-5005HD Mini CT. You can find more information about the Brite-View at
http://www.brite-view.com/cinematube.php. There is no such restriction for the analog YPbPr (or RGB) input.
The System can be controlled via serial port on Z3-DM8168-APP-2x.
1. Plug-in serial cable and NULL modem connector from Z3-DM8168-APP-2x to PC’s COM port.
*The console port is the 2.5mm jack next to the power switch. Please refer to
Figure 1.
2. Setup teraterm on PC for 115k, 8, N, 1, 0ms/char, 100ms/line.
3. Connect the power supply and a USB pen drive with video content to the Brite-View Box.
4. Connect the HDMI output of the Brite-View Box to the HDMI input of a TV monitor and set the
player’s display resolution to 1080p60.
5. Start the Brite-View box play back of the video content from the USB pen drive, optionally in a loop.
6. Disconnect the HDMI output of the Brite-View Box from the TV monitor and connect it to the HDMI
input of the Z3-DM8168-APP-2x.
7. Connect Ethernet from Z3-DM8168-APP-2x to a PC directly or through an Ethernet switch.
8. Set the PC’s IP address to 192.168.1.110 –This is the default address the Z3-DM8168-PCI-RPS
streams to.
Power
Power Switch
Console
GigE
SATA
USB
HDMI In
Analog
Video In
HDMI Out

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9. Connect the 12V Power supply provided by Z3 Technology to the Z3-DM8168-APP-2x.
*Please do not use a power supply different from the one provided with the Z3-DM8168-PCI-RPS.
10. Turn on the power switch on the Z3-DM8168-PCI-RPS system
11. After booting up and running through the initialization sequence, a menu will appear. Below is a
screenshot of a terminal console of the system in encode mode.
Z3 Technology, LLC DM8168-MOD v03
H.264 file enc/dec demo
+==============================================================+
| Current
| U - Change H.264 URL rtp://192.168.1.110
| M - Change mode encode
| I - Set input HDMI1
| O - Set output HDMI
| B - Set video kbits/sec 10000k
| F - Frame rate 60
+--------------------------------------------------------------------------------------------------------+
| S - Start streaming
| W - Write configuration to flash
| X - eXit to prompt
+==============================================================+
Enter option:
12. On the encoder menu, you can press U to change the URL to your computer's static IP, and then press
“S” to start streaming. This step is not required if you set the IP address of the PC running VLC to
192.168.1.110 as per step 8 above.
Please note that you must type in “rtp://” before you enter your computer’s static IP address.
13. Open VLC
14. Under Media, press “Open File” and open the SDP file (provided by Z3 Technology on your Z3 Server
Account).
15. You should now see video playing on VLC.
*It is possible that you may need to reboot if you do not see video in VLC
* Some versions of VLC may have a difficult time starting up, especially on PCs with lower performance
CPUs. In this case, you may need to close and restart VLC, possibly a few times.
If the PC is not capable of displaying full resolution, you can use the “F” option on the menu to set the
frame rate to 30 fps. This should reduce the load on the decoding PC by half.

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5.2 Encode & Stream with Z3-MVP-02 Decode
It is also possible to use an embedded decoder, as in the encode and stream to Z3-MVP-02 demo. The encoder
portion of the demo is identical to the encode and stream to PC demo described above. It too can support
HDMI input, with the same HDCP restrictions. The connections are labeled in
Figure 1.
First set up the encoder by following the directions for the encode and stream to PC VLC decode demo as
described in section Encode & Stream with PC VLC Decode). At step 12, use the “U” menu to enter the IP
address of the Z3-MVP-02 player, making sure to include “rtp://” before the IP address. Press “S” to start
encoding.

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Now, control the Z3-MVP-02 system via serial port.
1. Plug in the serial cable and NULL modem connector from the Z3-MVP-02 to the PC’s COM port
2. Open Teraterm on the PC configure it for 115k, 8, N, 1, 0ms/char, 100ms/line
3. Connect a 12V Power supply to the Z3-MVP-02.
Please only use the 12V power supply provided by Z3 for the Z3-MVP-02 player.
4. Connect an HDMI cable from the Z3-MVP-02 HDMI output to the HDMI input on a video monitor
5. Turn on power on the Z3-MVP-02
6. After booting up and running through the beginning of the sequence the H.264 decode demo menu will
appear. Below is a screenshot of the H.264 decode demo terminal console:
Z3 Technology, LLC DM8168-MOD v03
H.264 decode demo
+==============================================================+
| Current
| U - Change H.264 URL rtp://192.168.1.111
| R - Change resolution 1080P
| I - Set input HDMI
| B - Set video kbits/sec 10000k
| F - Frame rate 60
+---------------------------------------------------------------------------------------------------------+
| S - Start streaming
| W - Write configuration to flash
| X - eXit to prompt
+==============================================================+
Enter option:
7. On the menu, press U to change the URL to the IP address of the Z3-MVP-02 (The default IP address
of the Z3-MVP-02 is 192.168.1.111), and then press “S” to start streaming.
Please note that you must type in “rtp://” before you enter the IP address of the Z3-MVP-02.
8. You should now see video playing on the monitor
*It is possible that you may need to reboot both the Z3-DM8168-PCI-RPS system and Z3-MVP-02
systems if you do not see video on the monitor.

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6. Installing the Released Materials
The software provided will allow you to re-create the pre-installed software of the DM8168-MOD starting
from the included source code.
On a PC running Linux, create a directory where the released materials are going to be located,
such as /home/z3/z3-netra:
# mkdir /home/z3/z3-netra
Copy the released tar archive to that directory.
# cp z3-dm8168-1.0.0-20110209.tar.bz2 /home/z3/z3-netra

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Untar the archive
# tar -xjf z3-dm8168-1.0.0-20110209.tar.bz2
A directory with the release name and a set of sub-directories should have been created as follows:
z3-dm8168-1.0.0-20110209/
7. Building the Code
Follow the directions in section 7, "Building the Code" below in this document. When the build is successfully
completed, an “images” directory will be created at the project level. All images and executables will be
located in the "images" directory. These will now be ready to be transferred to the target.
8. Configuring the Target for Your Own Development Environment
The best way to develop software for the Z3-DM8168-PCI-RPS system is to use the HDD of a Linux PC to
serve as the root file system for the target DM8168 system. It is also productive to allow the Z3-DM8168-PCI-
RPS system to fetch the Linux kernel from the PC using the network, so all the software that is being run by
the DM8168 is in effect coming from the PC.
To accomplish this, follow the steps below.
1.) Run a Trivial File Transfer Protocol (TFTP) server on the Linux PC. The target system will need to
access files from the "images" directory via TFTP. Depending on your Linux distribution you will need to
download and set up the server.
2.) The DM8168 module is pre-setup so that it will TFTP from the path "z3/z3-netra/images". This
means that you should configure the TFTP server root directory as /home. This way the DM8168 will get
the kernel from /home/z3/z3-netra/images. This path is defined in the target by the u-boot environment
variable "tftp_root".
3.) Enable NFS on the Linux PC. The target DM8168 will need to mount the root file system using
NFS. Usually it is sufficient to add the desired path and permission in the /etc/exports file, and restart the
NFS service (as root) with
build-tools
Contains some scripts that simplify the setup
filesys
This contains the root file system for the DM368 target
kernels
The kernel source tree, with added support for the Z3-DM368-MOD HW
images
Binary images needed by the target are here
toolchain
ARM compilers, binutils and other build tools
u-boot
The u-boot source tree, with support for the Z3-DM368-MOD hardware
z3apps
Optional software licensed by Z3 Technology

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# service nfs restart
Sometimes it may be necessary to modify the firewall configuration to allow for incoming NFS and TFTP
connections.
4.) If you set up your development PC to a static IP address of 192.168.0.6 with netmask 255.255.0.0,
and installed the software so that the images are at /home/z3/z3-netra/images and the root file system is at
/home/z3/z3-netra/filesys/fs then steps 4 –7 are not necessary. Otherwise you will need to tell the DM8168
where to find these files, including the IP address of the server that contains them.
Copy the file .../u-boot/u-boot-env-netra.txt to the Windows PC running Teraterm. Edit the file and change
the following variables (see below) to match your own system and network. Note: Use a Windows editor
as it is important to Teraterm to have CR-LF instead of just LF.
setenv ipaddr 192.168.0.56
IP address of the target system
setenv gatewayip 192.168.0.1
Usually the router in your network
setenv netmask 255.255.0.0
As per your network parameters
setenv serverip 192.168.0.6
The computer with the TFTP server
setenv tftp_root z3/z3-netra/images
Location of the images folder in TFTP space
setenv nfs_root /home/z3/z3-netra/filesys/fs
Location of the root file system
5.) Reboot the DM8168-MOD system and press the space bar to make it stop in the u-boot prompt.
Make sure that your terminal is pausing for 120ms or more at the end of each line.
This is important because the serial port does not have hardware flow control.
*Go into the Teraterm "Setup" menu, select "Serial port...".
Set the "Baud rate" to 115200, "Data" to 8 bit, "Parity" to none, 1 stop bit and flow control to "none"
At "Transmit delay" part, enter 120 in the box next to "msec/line", then click OK.
6.) Now upload the new environment variables to the board:
In Teraterm, go to the "File" menu and click on "Send file...".
Select the file with the variables that was just edited.
7.) When you get the u-boot prompt again, enter the commands below. This will enable mounting the
rootfs using NFS and booting the kernel by TFTP.
Z3-DM8168-MOD# setenv bootcmd run boot-nfs
Z3-DM8168-MOD# saveenv
8.) Make sure that the DM8168 is connected to your network and power cycle. If the steps above are
successfully completed, the DM8168 system will boot the kernel obtained via TFTP from the Linux PC,

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mount a root file system using NFS and present a "#" prompt. If this does not happen, please troubleshoot
the connections, IP addresses and server settings. Look in the .../images directory and make sure that the
code is there. The root file system for the target will be at .../filesys/fs.
8.1 U-boot Startup Scripts
The following u-boot startup scripts are available. Each script allows for a different combination of where the
kernel and file system are obtained from, and boots that particular combination.
boot-nfs
Obtains root file system from NFS, kernel from TFTP
nand_boot_nfs
Obtains root file system from NFS, kernel from NAND
nand_boot_jffs2
Obtains root file system from NAND (JFFS2 format), kernel from NAND
nand_boot_ramdisk
Obtains root file system from ramdisk, kernel from NAND
nand_boot_ubifs
Obtains root file system from NAND (UBIFS format), kernel from NAND
From the u-boot command prompt, you can execute any one of the above scripts by typing the command “run”
followed by the script name. To cause the module to get a kernel and file system from the PC server use:
Z3-DM8168-MOD# run boot-nfs
During the normal boot procedure the module will execute whatever command is in the variable “bootcmd”.
Set bootcmd as desired with the commands below:
Z3-DM8168-MOD# setenv bootcmd run boot-nfs
Z3-DM8168-MOD# saveenv
This will make booting from TFTP and NFS the default behavior, and the “saveenv” makes it permanent.
Without the “saveenv” the variable bootcmd would revert to its previous value at the next boot.
8.2 U-boot Update Scripts
The following u-boot update scripts are available. These scripts solely update the images of the various
components stored in the NAND flash - you must also set the bootcmd or manually run one of the startup
scripts as per above to use the a given image. Please see the update scripts below:
run update-uboot
Update U-Boot bootloader in NAND
run update-kernel
Update Linux kernel image
run update-env
Update U-Boot environment settings
run update-ramdisk
Update root filesystem ramdisk
run update-jffs2
Update jffs2 image (creating a JFFS2 image requires mtd-utils on host)

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run update-ubifs
Update jffs2 image (creating a UBIFS image requires ubi utils on host)
9. Building the Code
Instructions to setup and build the full code base for the Z3-DM8168-MOD-3X.
You will need sudo privileges in order to build the code. Make sure that the user account you are working from
is in the /etc/sudoers file and that you have the password. It is recommended that you setup the /etc/sudoers
file so that no password is required.
The various variables of the system are all set up by default as if you are using the user account "z3" and
follow the directory naming as below. If you create a "z3" account and use it to build the code then you will be
able to execute the results of your build without changing paths in the target system or elsewhere. It is not
necessary to do so, but starting at the right place can shorten the startup time.
First login as user z3. Create a work directory (if you have not already done so) and cd to it.
mkdir ~/z3-netra
cd ~/z3-netra
Place release tar file in new directory and untar archive.
cp /your_tar_file_location/z3-dm8168-version.tar.bz2
tar -xjf z3-dm8168-version.tar.bz2
Un-tar'ring the release should have created an intermediate directory with the release name (such as "z3-
dm8168-1.0.0-20110209"), please cd into it. In order to build the code, the current directory must contain the
project subdirectories "build-tools", "dvsdk", "kernels", "u-boot", etc.
Then run the following commands to build the system executables.
./build-tools/setup.sh
source z3-env
make z3_netra_pcie_ep_defconfig
make clean
make all install
make demos

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Now all the executables are built and ready to run.All binaries and executables are placed in the images/
directory.
The target board must be able to access the files placed in the “images” directory of the project. The “make”
commands above also created a root file system ready to be run by the DM8168. It was placed in the
“…./filesys/fs” directory. Since the default u-boot variables point to /home/z3/z3-netra and the target expects
the root file system to be at /home/z3/z3-netra/filesys, it is easier to make symbolic links from there to the
project you are currently working on. If un-tar'ring the release created an intermediate directory with the
release name (such as "z3-dm8168-1.0.0-20110209 as shown above"), then create symbolic links as shown
below so that the target default settings can find the images and root file system:
cd /home/z3/z3-netra
ln -s z3-dm8168-1.0.0-20110209/images images
ln -s z3-dm8168-1.0.0-20110209/filesys filesys
Make sure that the u-boot environment variables set on the target board match the locations of the executables
on your work directory and then run the target board. By default, using the factory settings, the target expects
that the kernel image is available at z3/z3-netra/images/ (assuming that the root path set at the TFTP server is
/home) and that a root file system is available for mounting with NFS at /home/z3/z3-netra/filesys/fs/.
It is important that you have the shell environment variables of the Linux PC you are working on set correctly
as set by the included batch file "z3-env". Every time you start a new shell you should set the environment by
running “source z3-env”. Among other things, this will set the environment variables $PRJROOT and
$ROOTFS to the appropriate paths.
10. UBIFS
The preferred file system format is UBIFS. By default the build system will build a UBIFS file system image
ready to be flashed into the NAND and place it in the $PRJROOT/images directory, The u-boot script “update-
ubifs” can then be used to transfer the file system image to the target board and write it at the proper location
in the NAND flash.
It is possible to transfer a file system from the development PC to the NAND flash on the target without
creating an image. The procedure below shows how to transfer the development NFS root filesystem onto the
target and write it to NAND using the UBIFS filesystem format:
0) Boot the board from NFS in U-Boot:
Z3-DM8168-MOD# run boot-nfs

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1) Erase partition
flash_eraseall /dev/mtd3 # Run this the first time
OR
ubiformat /dev/mtd3 # Run this to preserve wear-leveling data
2) Attach UBI device
ubiattach /dev/ubi_ctrl -m 3 -O 2048
3) Create UBI volume named 'rootfs' on device ubi0
ubimkvol /dev/ubi0 -N rootfs -s 128MiB
4) Mount clean copy of NFS root filesystem
mkdir /tmp/mynfsmnt
mount -o nolock 192.168.0.6:/home/z3/z3-netra/filesys/fs /tmp/mynfsmnt
5) Mount UBIFS on empty filesystem
mkdir /mnt/ubifs
mount -t ubifs ubi0:rootfs /mnt/ubifs
6) Copy all files from clean NFS mount to UBIFS
cp -a /tmp/mynfsmnt/* /mnt/ubifs/.
7) Unmount filesystems
umount /mnt/ubifs
umount /tmp/mynfsmnt
Reboot the board and stop at the u-boot prompt. In U-Boot enter the following commands:
Z3-DM8168-MOD# setenv bootcmd run nand_boot_ubifs
Z3-DM8168-MOD# saveenv
11. Dependencies
The build system counts on the availability of a few packages, all installed by default by most Linux
distributions. If the build aborts with an error then most likely your installation is lacking one or more of these
packages.
mtd-utils:
JFFS2 and UBI utilities.

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For Ubuntu 10.x, use the following command to install the needed packages:
sudo apt-get install build-essential
sudo apt-get install autoconf automake libtool bison flex mtd-utils liblzo2-dev uuid-dev zlib1g-dev libpcre3-
dev
For Fedora Core, use the following command to install the needed packages:
sudo yum groupinstall 'Development Tools'
sudo yum install autoconf automake libtool bison flex mtd-utils mtd-utils-ubi lzo-devel libuuid-devel pcre-
devel
12. PCI Express
12.1 About PCIe lanes and slots
The Z3-DM8168-APP-2x board is designed to be used as a PCI Express add-in card. The DM8168 chip
mounted on the module provides a PCI Express interface with 2 lanes, the PCI Express specification
standardizes on connectors for 1, 4, 8 and 16 lanes. The Z3-DM8168-APP-2x board is therefore designed
to mate with a 4-lane connector in order to allow the 2 lanes from the DM8168 processor to be active.
The PCI Express specification allows for plugging interface cards into any slot that provides at least as
many lanes as present in the interface card. Therefore, the PCIe spec allows you to plug the Z3-DM8168-
APP-2x board into any PCI Express slot that it will fit in –4, 8 or 16 lanes.
The Z3-DM8168-PCI-RPS board set can also operate as 1 1-lane PCIe device. This means that if the
mechanical restrictions of inserting a big board into a small slot did not exist, it would also work. Since
this is a generic situation some motherboard vendors have included PCIe slots that have their backs open
to allow the insertion of board with more lanes than the connector. Although this should work well (for all
devices including the Z3-DM8168-PCI-RPS system) there is no guarantee that it will in fact work in all
situations.
The “PCI Express Card Electromechanical Specification” document section on “Card Interoperability” is
always a good reference. The document is available (for members) from the PCI Group at
http://www.pcisig.com/specifications/pciexpress/base.
12.2 The PCI Express BIOS on the PC
When the PC is first powered up its BIOS performs some system tests and initialization, including PCI
Express initialization. The BIOS is required to assign resources to all peripherals on the system, including
those devices in PCI Express add-in cards, before it can proceed to boot the operating system. During this
initialization, the BIOS will determine allocation of memory addresses and interrupt lines, and use this
information to turn on each peripheral in a way that they don’t conflict with each other.

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One of the functions of the BIOS is to determine if there is a display adapter card present in the system,
and if so the BIOS makes it the primary video monitor. Some BIOSes mistakenly think that any add-in
card present in its 16-lane PCIe slot must be a display controller, even if the PCIe card clearly tells the
BIOS (via configuration space) it isn’t so. This BIOS behavior is most frequent on motherboards with only
one PCIe slot or one 16-lane and one 1-lane slot, where the most popular add-in card on the 16-lane slot
would in fact be a video controller. The problem is that these systems will effectively either not boot with
the Z3-DM368-APP-2x card (or any other non-video card) plugged in, or boot without video. Usually
there are no configuration settings in the BIOS that will correct the behavior of the BIOS, making it
effectively impossible to use that motherboard.
Z3 Technology recommends that development with the PCI-RPS system be done on an Asus P8H67-
MPRO motherboard. We found that the BIOS performs the system initialization correctly.
The systems with “bad BIOS” tend to work correctly when the add-in card is plugged into the 1-lane slot,
when present. This can be accomplished with a PCIe to PCIe adapter or when the 1-lane slot connector on
the motherboard is open at the edge to allow insertion of boards with more than 1 lane.
12.3 The DM8168-MOD-xx PCI Express hardware
The PCI Express bus is not really a “bus”. Instead, it is a point-to-point connection between a PCI master
and a slave. The PCI master can send commands to perform PCI transactions, and the slave carries them
out. The PCIe interface on the master side is called the “root complex”, and the slave side is the
“endpoint”. A computer or any device with a slot is the root complex, while anything the plugs into the slot
is the endpoint.
The Z3-DM8168-MOD-xx module is capable to perform as a root complex or endpoint. In order for the Z3
module to be used in a specific PCI Express setting the module must have the proper configuration. By
default, Z3 ships Z3-DM8168-MOD-2x modules configured as root complex, and Z3-DM8168-MOD-3x
configured as endpoint. The Z3-DM8168-PCI-RPS kit contains a Z3-DM8168-MOD-3x module, and
therefore is by default configured as endpoint.
At the hardware level, inside the module the difference is the PCIe clock generation. PCI Express requires
that the root complex provide a 100 MHz clock to the endpoint. The DM8168 processor uses this clock to
drive its internal PCIe interface. So when a module is configured as root complex it will provide the 100
MHz clock to the processor and the PCIe bus. When the module is configured as an endpoint, the PCIe bus
clock is an input to be driven from the root complex, and it is required to drive the PCI Express interface
on the DM8168 chip.
Another point to keep in mind is that the same PCIe interface on the chip is used for both root complex and
endpoint configurations. The software needs to be set to operate in the right mode or the DM8168 system
will not work as expected. In particular, if the board is set up for endpoint operation and the Linux kernel is

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configured for root complex, the kernel will hang waiting for the PCIe clock during initialization and the
module will not boot.
12.4 Using the DM8168 PCI Express interface
The PCI Express interface on the DM8168 provides a direct high speed access path between the host and
the DM8168 memory space. A good example of how this can be used is booting the DM8168 using the
PCIe interface. The host PC can upload the u-boot, kernel and root file system in the DM8168 memory
space via PCIe bus, then let the DM8168 execute it.
Example software to boot the Z3-DM8168-PCI-RPS system via PCIe bus is provided as part of the
EZSDK in the …/ezsdk/example-applications/linux-driver-examples-psp*/pcie directory. The boot
example application takes command line parameters with the file names for u-boot, kernel and root file
system, uploads them and boots the DM8168.
The application relies on an underlying device driver to provide low level access to the DM8168 device
addresses as set by the BAR registers in PCI configuration space.An example Linux driver is provided in
the kernel tree, at …/kernels/drivers/char. The files ti81xx_pcie_bootdrv.c and ti81xx_pcie_bootdrv.h
implement the driver entirely. You can move them to the host PC running Linux and compile them to
create a loadable module on the host machine.
The document “DM816x_AM389x_PCI_Express_Endpoint_Boot_Driver_User_Guide.pdf” is a must
read. It can be found in the …/ezsdk/board-support/docs directory.
13. Troubleshooting
No video is usually caused by networking issues.
oFirst: check IP address and Netmask. Ping PC from DM8168 and ping DM8168 from PC. Use direct
connection from DM8168 system to PC without router/customer network. Once video connection is
established, then add in customer specific network equipment.
oSecond: check to make sure firewalls are turned off
oThird: check video source. Verify video source is outputting compatible analog video
oFourth: verify PC is fast enough and has enough DDR to decode compressed video
oFifth: verify VLC version is 1.1x or later
No SDP file
oCheck your Z3 server account