Z3 Technology HE4K-DCK-10 User manual

Hardware Specification
4K H.265 & H.264 Video Encoder System
Model Name: HE4K-DCK-10
DOC-USR-0100-01
Manual Version 1.00.00
July 20, 2016
Before attempting to connect or operate this product, please read these instructions carefully and save this manual for future use.
Copyright © 2016 Z3 Technology, LLC. All rights reserved.
This document contains proprietary and confidential information of Z3 Technology, LLC ("Z3"). This document may not be used, reproduced,
disclosed, or disseminated to anyone without the prior written approval of an authorized representative of Z3.
Z3 Technology, LLC incorporates HDMI® technology. The terms of HDMI and HDMI High-Definition Multimedia Interface, and
the HDMI Logo are trademarks or registered trademarks of HDMI Licensing LLC in the United States and other countries.
Sony is a trademark of Sony Corporation. All product or service names mentioned herein are the trademarks of their respective owners.

2
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
Revision History
Version
Date
Change Note
Author
1.00.00
07/20/2016
Original Document
BM

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
TABLE OF CONTENTS
GENERAL DESCRIPTION.................................................................................................. 61.0
FEATURES ................................................................................................................. 72.0
PHYSICAL.................................................................................................................. 83.0
THERMAL CONSIDERATIONS ...........................................................................................104.0
CONNECTING THE HE4K-DCK-10 TO A SONY FCB-ER8300 CAMERA...............................................115.0
SPECIFICATIONS .........................................................................................................126.0
HARDWARE FEATURES..................................................................................................137.0
7.1 Interface Front End PCB ............................................................................................13
7.2 Main Encoder PCB....................................................................................................19
7.3 I/O Jack and PoE PCB ...............................................................................................24

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
LIST OF FIGURES
Figure 1: HE4K-DCK-10 Front Dimensions................................................................................. 6
Figure 2: HE4K-DCK-10 Physical Block Diagram (Chassis & Camera Not Included).................................. 8
Figure 3: HE4K-DCK-10 Block Diagram .................................................................................... 9
Figure 4: Correct KEL Ribbon Cable Wiring Diagram ...................................................................11
Figure 5: Interface Front End PCB Hardware Layout ..................................................................13
Figure 6: Layout of the I/O Jack and PoE PCB Production Version..................................................24

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
LIST OF TABLES
Table 1 Temperature Critical Components .............................................................................10
Table 2 Specifications .....................................................................................................12
Table 3 IFE PCB J1/ER8300 Pin Out......................................................................................14
Table 4 IFE PCB J2 Pin Out................................................................................................15
Table 5 IFE PCB J3 Pin Out................................................................................................15
Table 6 IFE PCB J4 Pin Out................................................................................................17
Table 7 IFE PCB J5 Pin Out................................................................................................17
Table 8 IFE PCB J6 Pin Out................................................................................................18
Table 9 Main Encoder PCB J1 Pin Out ...................................................................................19
Table 10 Main Encoder PCB J7 Pin Out..................................................................................20
Table 11 Main Encoder PCB J23 Pin Out on Initial Prototype ........................................................21
Table 12 Main Encoder PCB J23 Pin Out on Production Version .....................................................21
Table 13 Main Encoder PCB J25 Pin Out ................................................................................22
Table 14 Main Encoder PCB J26 Pin Out ................................................................................22
Table 15 Main Encoder PCB J30 Pin Out ................................................................................23
Table 16 Main Encoder PCB and I/O Jack PCB Mating.................................................................24
Table 17 I/O Jack and PoE PCB Connectors ............................................................................25

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
GENERAL DESCRIPTION
1.0
The HE4K-DCK-10 is an H.265/HEVC, H.264 and MJPEG video encoder designed to be a companion to the
Sony FCB-ER8300 4K block camera. It is capable of accepting 4K UHD video from the camera at 30 frames
per second and producing IP streams that can be sent on a standard Ethernet cable.
The encoder has a KEL connector that mates directly to the FCB-ER8300, eliminating the need for additional
interfaces.
Figure 1: HE4K-DCK-10 Front Dimensions
58 mm
58 mm

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
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Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
FEATURES
2.0
Direct connection to the Sony FCB-ER8300 block camera
IP Video encoder supports H.265/HEVC and H.264 at 4K (3840x2160), 30 fps
Supports RTP, RTSP, RTCP and UDP
Optional ONVIF Profile S*
Optional Power over Ethernet (PoE)*
Web-based user interface for configuration
Low Power
Optional chassis for block camera and encoder assembly available*
* Contact Z3 Technology for more information.

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
PHYSICAL
3.0
The HE4K-DCK-10 is comprised of three PCBs:
Interface Front End PCB
oThis board contains the interface with the Sony FCB-ER8300 camera block. The ER8300
connects directly to the KEL connector with a KEL cable provided.
An optional Micro HDMI input jack can be present. If so, this jack will accept video and audio
from an external HDMI source as long as the signal is not encrypted with HDCP.
Main Encoder PCB
oThis board contains the CPU and is the core of the encoder. This PCB also includes a Micro-SD
card socket. Some versions of the Main Encoder PCB also contain a 2.5mm circular jack used
to access the CPU console port, useful to load initial software and for debug.
I/O Jack and PoE PCB
oThis board contains all the I/O jacks as well as the optional PoE (power over Ethernet)
circuits. Some versions of this PCB contain a 2.5mm phone-style jack for the serial console
port of the CPU. This PCB contains the ESD and surge protection as required for each I/O
type.
All three boards measure 58 x 58 mm, 1.6mm thick and are designed to be stacked, allowing for a very
compact mechanical assembly. The diagram below shows the physical arrangement of the three boards
mounted on a chassis together with a Sony FCB-ER8300 camera block.
Figure 2: HE4K-DCK-10 Physical Block Diagram (Chassis & Camera Not Included)

9
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
Figure 3 shows a block diagram of the HE4K-DCK-10 system.
Figure 3: HE4K-DCK-10 Block Diagram

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
THERMAL CONSIDERATIONS
4.0
The HE4K-DCK-10 encoder consumes only about 4W at maximum power operation. The Sony FCB-ER8300
block camera consumes about 3.5W, so the total power dissipation of the system is 7.5W typically.
While a 7.5W power budget is very good, it is still enough power to cause overheating unless proper heat
dissipation methods are employed.
The user is responsible for ensuring that the complete system has enough heat dissipation to ensure
proper operating temperature of all components at all times.
The table below lists the most critical components from the thermal point of view, along with the maximum
junction temperature as specified by the vendor datasheet.
Chip
Location
Max Tj
Notes
CPU
U3, Main Encoder PCB
105 °C
The chip spec is not very clear, and lists
some contradicting values, such as max TJ
of 125 °C and max ambient temperature of
70 °C.
FPGA
U7, Front End PCB
85 °C
Xilinx specifies a θJC of 10.6 °C/W for this
package (CSG225).
HDMI FE
U1, Front End PCB
125 °C
ADI specifies a max 70 °C ambient
temperature.
Table 1 Temperature Critical Components
When designing the thermal dissipation for the HE4K-DCK-10 it is important to consider the thermal behavior
of all parts of the system, including the PCBs, enclosure, camera block, etc.
While the majority of the power dissipation comes from the components listed in the table above, other
parts such as the DDR chip, power IC’s and inductors also contribute some power to the system and cause
the PCB to heat up. The heated-up PCB in turn will raise the ambient temperature of the entire system.
When incorporating the HE4K-DCK-10 boards into a final application, the systems engineer must ensure
proper thermal management. Failure to remove heat from the CPU may cause permanent damage to the
CPU and encoder and loss of warranty coverage.

11
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
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Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
CONNECTING THE HE4K-DCK-10 TO A SONY FCB-ER8300 CAMERA
5.0
The Interface Front End PCB has a 30-pin KEL connector that allows a flexible ribbon cable to be used to
connect the encoder to an identical connector on the Sony FCB-ER8300 4K camera block.
WARNING: ONLY USE THE CORRECT KEL RIBBON CABLE.
Using an incorrect cable can permanently damage the camera body.
KEL makes two versions of ribbon cables that physically fit when connecting the encoder to the camera. One
cable is “straight thru”, with pin 1 connected to pin 1, and another is a “cross” type, with pin 1 connected
to pin N (N=30 in this case).
Z3 Technology provides the correct cable as part of the HE4K-DCK-RPS. Please ONLY USE THE CABLE
PROVIDED BY Z3 TECHNOLOGY to connect the Sony FCB-ER8300 to the I/F Front End PCB of the HE4K-DCK-
10.
The correct cable is the “straight thru”, with pin 1 connecting to pin 1. The figure below shows the straight
cable. Note how the connectors at the ends of the cable are positioned in opposite orientation so that pin 1
on one side connects to pin 1 on the other side.
Figure 4: Correct KEL Ribbon Cable Wiring Diagram
The KEL ribbon cable between the HE4K-DCK-10 and the FCB-ER8300 block camera is the only connection
necessary between the camera and the encoder. The KEL ribbon cable provides the following connectivity:
Power from the encoder to the camera
Video from the camera to the encoder
VISCA controls, bidirectional, using a serial port

12
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
SPECIFICATIONS
6.0
Parameter
Min
Typ
Max
Notes
Input Power Voltage
7V
12V
12V
Nominal, with ER8300 camera, USB device
5V
12V
16V
If no ER8300 nor USB device attached
6.5V
12V
16V
If no ER8300 camera attached, with USB
device
Power over Ethernet (PoE)
48V
802.3af/at class 0
Power Consumption
4W
Full power encode and stream H.265, 4K
at 30fps on Gb Ethernet
Video Input, ER8300
FHD
4Kp30
4Kp30
4K (3840x2160) at 30 fps
Video Input, HDMI
480p
4Kp30
Standard resolutions,
SD/720p/1080p/2160p
Video Output
1Vpp
Composite video on RCA jack
Audio Input
TBD
TBD
TBD
Microphone level, bias provided
Serial Port
RS-232
RS232 levels, +/-5V to +/-12V
Operating Temperature
0 °C
50 °C
Open air, unobstructed air flow
Storage Temperature
-20 °C
80 °C
20% to 70% RH, non-condensing
Table 2 Specifications

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
HARDWARE FEATURES
7.0
The following section describes the I/O jacks and controls of the three board HE4K-DCK-10 camera dock
video encoder system.
7.1 Interface Front End PCB
The Interface Front End PCB converts the video format provided by the FCB-ER8300 or a Micro-HDMI jack
to LVDS as required by the encoder board. It also passes embedded audio from the HDMI input processor
and implements a serial data path for Sony VISCA commands between the camera block and the main
encoder PCB.
Figure 5: Interface Front End PCB Hardware Layout
The above diagram shows the top side of the Interface Front End PCB. The following connectors are
available:

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
7.1.1 J1, Interface with Sony FCB-ER8300 Block Camera
This connector provides a direct connection with the Sony FCB-ER8300 block camera. Make sure to
use the KEL ribbon cable provided or approved by Z3 Technology. Risk of permanent damage to the
camera or encoder exists if a non-approved cable is used.
The pin assignments on J1 are shown in the table below.
Please note that the pin numbering of J1 on the Interface Front End PCB is opposite of that on the
Sony FCB-ER8300 camera.
Pin
(J1)
Pin
(ER8300)
Signal
Notes
1
30
DC Input
Power from encoder to camera. Power
comes directly from DC input jack or
PoE module, whichever is active.
2
29
3
28
4
27
5
26
RESET
Encoder reset signal to camera
6
25
VISCA_TXD
Serial control, camera to encoder
7
24
VISCA_RXD
Serial control, encoder to camera
8
23
GND
9
22
No connect
ER8300 signal USB_D+
10
21
No connect
ER8300 signal USB_D-
11
20
GND
12
19
No connect
ER8300 signal USB_VBUS
13
18
+5V Power
Output from camera, used for HDMI
detect
14
17
Hot Plug Detect
Used by HDMI interface
15
16
No connect
16
15
No connect
17
14
No connect
18
13
GND
Video output from camera to encoder
19
12
TMDS Data2 +
20
11
TMDS Data2 -
21
10
GND
22
9
TMDS Data 1+
23
8
TMDS Data 1-
24
7
GND
25
6
TMDS Data 0+
26
5
TMDS Data 0-
27
4
GND
28
3
TMDS Data Clock+
29
2
TMDS Data Clock+
30
1
GND
Table 3 IFE PCB J1/ER8300 Pin Out

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HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
____________________________________________________________________________________
Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
7.1.2 J2 –External HDMI Video Input
Connector J2 allows for an external HDMI source to be connected to the encoder.
The pin assignments are standard per HDMI specification and shown in the table below.
Pin
Signal
Pin
Signal
1
Hot Plug Detect
11
Data0-
2
Utility
12
Clock+
3
Data2+
13
Gnd
4
Gnd
14
Clock-
5
Data2-
15
CEC
6
Data1+
16
GND
7
Gnd
17
DDC_CLK
8
Data1-
18
DDC_DAT
9
Data0+
19
+5V
10
Gnd
Table 4 IFE PCB J2 Pin Out
7.1.3 J3 –FPGA JTAG
J3 is a debug connector providing access to the JTAG port of the FPGA. Its pin assignment is shown in
that table below.
This connector is usually not placed on the PCB.
Pin
Signal
Pin
Signal
1
TMS
4
TCK
2
TDI
5
GND
3
TDO
6
+3.3V
Table 5 IFE PCB J3 Pin Out
7.1.4 J4 –Connection with Main Encoder PCB
Connector J4, located on the bottom side of the PCB, provides all the connectivity between the IFE
board and the encoder board. Even numbered pins 2 to 22 provide access to the FPG for
configuration and control.

16
HE4K-DCK-10
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Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
This is a 90-pin, 0.4 mm pitch board-to-board connector. The Front End PCB uses a Hirose DF40C-
90DP-0.4V(51) connector or equivalent.
This connector mates with J7 on the Main Encoder PCB.
Pin
Signal
Pin
Signal
1
GND
2
STATUS_SELECT
3
MIPI0_D1M
4
STATUS_OUT
5
MIPI0_D1P
6
I2C_SDA
7
GND
8
I2C_SCL
9
MIPI0_D0M
10
GND
11
MIPI0_D0P
12
FPGA_CONFIG_CCLK
13
GND
14
FPGA_CONFIG_DIN
15
MIPI0_D3M
16
N/C
MIPI0_D3P
18
FPGA_CONFIG_INITB
19
GND
20
FPGA_CONFIG_PROGB
21
MIPI0_CKM
22
GND
23
MIPI0_CKP
24
N/C
25
GND
26
N/C
27
MIPI0_D2M
28
GND
29
MIPI0_D2P
30
+1.8V from Encoder PCB
31
GND
32
+1.8V from Encoder PCB
33
MIPI1_D3P
34
GND
35
MIPI1_D3P
36
N/C
37
GND
38
N/C
39
MIPI1_D1P
40
GND
41
MIPI1_D1M
42
N/C
43
GND
44
N/C
45
MIPI1_CKP
46
GND
47
MIPI1_CKM
48
N/C
49
GND
50
N/C
51
MIPI1_D0P
52
GND
53
MIPI1_D0M
54
+12V from Encoder PCB
55
GND
56
+12V from Encoder PCB
57
MIPI1_D2P
58
+12V from Encoder PCB
59
MIPI1_D2M
60
+12V from Encoder PCB
61
GND
62
GND
63
MIPI2_D3P
64
N/C
65
MIPI2_D3M
66
N/C
67
GND
68
N/C
69
MIPI2_D1P
70
UART_TXD (to camera RXD)
71
MIPI2_D1M
72
UART_RXD (from camera TXD)
73
GND
74
GND
75
MIPI2_CKP
76
I2S_LRCLK

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HE4K-DCK-10
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77
MIPI2_CKM
78
I2S_SCLK
79
GND
80
I2S_DAT
81
MIPI2_D0P
82
N/C
83
MIPI2_D0M
84
+3.3V
85
GND
86
+3.3V
87
MIPI2_D2P
88
+3.3V
89
MIPI2_D2M
90
+3.3V
Table 6 IFE PCB J4 Pin Out
7.1.5 J5 –Optional Auxiliary Power
It is possible to provide power to the FCB-ER8300 camera from an external source, using J5. In that
case, 0 Ohm resistor R9 must be removed to disconnect the internal power supply from J5 and J1.
When using internal power (from the I/O Jack PCB) R9 must be populated with a 0 Ohm resistor and
J5 must be left unconnected. J5 is normally not populated on the IFE board.
The pin assignment of J5 is shown in the table below.
Pin
Signal
1
Ground
2
+12V
3
+12V
4
Ground
Table 7 IFE PCB J5 Pin Out
7.1.6 J6 –Optional FPGA Debug and Expansion
Connector J6 exposes I/O pins from the FPGA. It can be used for FPGA debugging or to connect
additional devices to the FPGA.
The pin assignment of J6 is as shown in the table below.
Pin
Signal
Pin
Signal
1
No connection
2
+3.3V
3
DEB_CK, FPGA pin K4
4
DEB_D16, FPGA pin E2
5
DEB_D15, FPGA pin F3
6
DEB_D14, FPGA pin F1
7
DEB_D13, FPGA pin G2
8
DEB_D12, FPGA pin G1

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HE4K-DCK-10
HARDWARE SPECIFICATION
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9
DEB_D11, FPGA pin H3
10
DEB_D10, FPGA pin J4
11
DEB_D9, FPGA pin H1
12
DEB_D8, FPGA pin K5
13
DEB_D7, FPGA pin J1
14
DEB_D6, FPGA pin J2
15
DEB_D5, FPGA pin K1
16
DEB_D4, FPGA pin J3
17
DEB_D3, FPGA pin L1
18
DEB_D2, FPGA pin K3
19
DEB_D1, FPGA pin L2
20
GND
Table 8 IFE PCB J6 Pin Out

19
HE4K-DCK-10
HARDWARE SPECIFICATION
CONFIDENTIAL DOC-USR-0100-01
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Z3 Technology, LLC ♦100 N. 8th St. STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
7.2 Main Encoder PCB
The Main Encoder PCB contains the core functionality of the H.265 encoder, including processor,
memories and power supplies.
This board connects to the Interface Front End PCB on the top side, via J7 connector, and to the I/O
Jack PCB on the bottom side, via J23, J25, J26 and J30.
The following interfaces are available:
7.2.1 J1 –JTAG Connector
Pin
Signal
Pin
Signal
1
TMS
2
TRST#
3
TDI
4
GND
5
+3.3V power
6
Key, N/C
7
TDO
8
GND
9
TCK
10
GND
11
RTCK, optional
12
GND
13
EMU0, optional
14
EMU1, optional
Table 9 Main Encoder PCB J1 Pin Out
7.2.2 J7 –Front End Interface
Pin
Signal
Pin
Signal
1
GND
2
SPI0_CSN_1V8 / GPIO5_6
3
MIPI0_D3M
4
SPI0_MISO_1V8 / GPIO5_5
5
MIPI0_D3P
6
SPI0_MOSI/I2C0_SDA_1V8 / GPIO5_4
7
GND
8
SPI0_SCLK/I2C0_SCL_1V8 / GPIO5_3
9
MIPI0_D1M
10
GND
11
MIPI0_D1P
12
SENSOR0_CLK_1V8 / GPIO1_4
13
GND
14
SENSOR0_RSTN_1V8 / GPIO1_5
15
MIPI0_D0M
16
N/C
17
MIPI0_D0P
18
SENSOR0_HS_1V8 / GPIO1_6
19
GND
20
SENSOR0_VS_1V8 / GPIO1_7
21
MIPI0_CKM
22
GND
23
MIPI0_CKP
24
N/C
25
GND
26
N/C
27
MIPI0_D2M
28
GND
29
MIPI0_D2P
30
+1.8V Power
31
GND
32
+1.8V Power
33
MIPI1_D3P
34
GND
35
MIPI1_D3P
36
N/C

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37
GND
38
N/C
39
MIPI1_D1P
40
GND
41
MIPI1_D1M
42
N/C
43
GND
44
N/C
45
MIPI1_CKP
46
GND
47
MIPI1_CKM
48
N/C
49
GND
50
N/C
51
MIPI1_D0P
52
GND
53
MIPI1_D0M
54
+12V Power
55
GND
56
+12V Power
57
MIPI1_D2P
58
+12V Power
59
MIPI1_D2M
60
+12V Power
61
GND
62
GND
63
MIPI2_D3P
64
N/C
65
MIPI2_D3M
66
N/C
67
GND
68
N/C
69
MIPI2_D1P
70
UART2_TXD
71
MIPI2_D1M
72
UART2_RXD
73
GND
74
GND
75
MIPI2_CKP
76
I2S_LRCLK / IR_CUT_0_CONTROL1 /
GPIO0_7
77
MIPI2_CKM
78
I2S_SCLK / IR_CUT_0_CONTROL2 /
GPIO0_5
79
GND
80
I2S_DAT / DC_IRIS_PWM / GPIO0_4
81
MIPI2_D0P
82
N/C
83
MIPI2_D0M
84
+3.3V
85
GND
86
+3.3V
87
MIPI2_D2P
88
+3.3V
89
MIPI2_D2M
90
+3.3V
Table 10 Main Encoder PCB J7 Pin Out
7.2.3 J10 –Micro SD Card
J10 is a socket for a standard micro SD card.
7.2.4 J23 –Ethernet PHY
This header provides access to the Gb Ethernet PHY on board the Main Encoder PCB. It mates with
J22 on the I/O Jack PCB. The pin assignments are below.
The initial prototype board set uses a 12x1 connector, while future versions will use a 2x8 connector.