Advantech MIC-6311 User manual

User Manual
MIC-6311
OpenVPX CPU Blade with Intel®
4th Core™ Processor

MIC-6311 User Manual ii
Copyright
The documentation and the software included with this product are copyrighted 2014
by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right
to make improvements in the products described in this manual at any time without
notice. No part of this manual may be reproduced, copied, translated or transmitted
in any form or by any means without the prior written permission of Advantech Co.,
Ltd. Information provided in this manual is intended to be accurate and reliable. How-
ever, Advantech Co., Ltd. assumes no responsibility for its use, nor for any infringe-
ments of the rights of third parties, which may result from its use.
Acknowledgements
Intel and Pentium are trademarks of Intel Corporation.
Microsoft Windows and MS-DOS are registered trademarks of Microsoft Corp.
All other product names or trademarks are properties of their respective owners.
Product Warranty (2 years)
Advantech warrants to you, the original purchaser, that each of its products will be
free from defects in materials and workmanship for two years from the date of pur-
chase.
This warranty does not apply to any products which have been repaired or altered by
persons other than repair personnel authorized by Advantech, or which have been
subject to misuse, abuse, accident or improper installation. Advantech assumes no
liability under the terms of this warranty as a consequence of such events.
Because of Advantech’s high quality-control standards and rigorous testing, most of
our customers never need to use our repair service. If an Advantech product is defec-
tive, it will be repaired or replaced at no charge during the warranty period. For out-
of-warranty repairs, you will be billed according to the cost of replacement materials,
service time and freight. Please consult your dealer for more details.
If you think you have a defective product, follow these steps:
1. Collect all the information about the problem encountered. (For example, CPU
speed, Advantech products used, other hardware and software used, etc.) Note
anything abnormal and list any onscreen messages displayed when the prob-
lem occurs.
2. Call your dealer and describe the problem. Please have your manual, product,
and any helpful information readily available.
3. If your product is diagnosed as defective, obtain an RMA (return merchandize
authorization) number from your dealer. This allows us to process your return
more quickly.
4. Carefully pack the defective product, a fully completed Repair and Replacement
Order Card and a photocopy proof of purchase date (such as your sales receipt)
in a shippable container. A product returned without proof of the purchase date
is not eligible for warranty service.
5. Write the RMA number visibly on the outside of the package and ship it prepaid
to your dealer.
Part No. 2002631101 Edition 2
Printed in Taiwan December 2014

iii MIC-6311 User Manual
Declaration of Conformity
CE
This product has passed the CE test for environmental specifications when shielded
cables are used for external wiring. We recommend the use of shielded cables.
FCC Class A
Note: This equipment has been tested and found to comply with the limits for a Class
A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Opera-
tion of this equipment in a residential area is likely to cause harmful interference. In
such a case, users are required to correct the interference at their own expense.
FM
This equipment has passed the FM certification. According to the National Fire Pro-
tection Association, work sites are classified into different classes, divisions and
groups, based on hazard considerations. This equipment is compliant with the speci-
fications of Class I, Division 2, Groups A, B, C and D indoor hazards.
Technical Support and Assistance
1. Visit the Advantech website at http://support.advantech.com to obtain the latest
information about this product.
2. Contact your distributor, sales representative, or Advantech's customer service
center for technical support should you require additional assistance. Please
have the following information ready before you call:
–Product name and serial number
–Description of your peripheral attachments
–Description of your software (operating system, version, application software,
etc.)
–Comprehensive description of the problem
–The exact wording of any error messages

MIC-6311 User Manual iv
Warnings, Cautions and Notes
Document Feedback
To assist us in making improvements to this manual, we welcome your comments
and constructive criticism. Please send all feedback in writing to: support@advan-
tech.com
Packing List
Before setting up the system, check that the items listed below are included and in
good condition. If any item does not accord with the list, please contact your dealer
immediately.
MIC-6311 all-in-one single board computer (CPU heatsink and PCH heatsink
included) x 1
Daughter board for SATA HDD x 1 (assembled)
HDD tray and screws x 1
Solder-side cover x 1 (assembled)
RJ45 to DB9 cable x 1
Warranty certificate document x 1
Safety Warnings: CE, FCC Class A
Warning! Warnings indicate conditions, which if not observed, can cause personal
injury!
Caution! Cautions are included to help you avoid damaging hardware or losing
data. e.g.
New batteries are at risk of exploding if incorrectly installed. Do not
attempt to recharge, force open, or heat the battery. Replace the battery
only with the same or equivalent type recommended by the manufac-
turer. Discard used batteries according to the manufacturer's instruc-
tions.
Note! Notes provide optional additional information.

v MIC-6311 User Manual
Safety Instructions
1. Read these safety instructions carefully.
2. Retain this user manual for later reference.
3. Disconnect this equipment from any AC outlet before cleaning. Use only a damp
cloth for cleaning. Do not apply liquid or spray detergents.
4. For plug-in equipment, the power outlet socket must be located near the equip-
ment and easily accessible.
5. Protect this equipment from humidity.
6. Place this equipment on a reliable surface during installation. Dropping or letting
the equipment fall may cause damage.
7. The openings on the enclosure are for air convection. Protect this equipment
from overheating. DO NOT COVER THE OPENINGS.
8. Ensure the power supply voltage is correct before connecting the equipment to
the power outlet.
9. Position the power cord away from high-traffic areas. Do not place anything over
the power cord.
10. All cautions and warnings on the equipment should be noted.
11. If the equipment is not used for a long time, disconnect it from the power source
to avoid damage by transient overvoltage.
12. Never pour any liquid into an opening. This may cause fire or electrical shock.
13. Never open the equipment. For safety reasons, the equipment should be
opened only by qualified service personnel.
14. If any of the following occurs, have the equipment checked by service person-
nel:
The power cord or plug is damaged.
Liquid has penetrated into the equipment.
The equipment has been exposed to moisture.
The equipment is malfunctioning, or does not operate according to the user
manual.
The equipment has been dropped or damaged.
The equipment has obvious signs of breakage.
15. DO NOT LEAVE THIS EQUIPMENT IN AN ENVIRONMENT WITH A STOR-
AGE TEMPERATURE THAT FLUCTUATES BELOW -20°C (-4°F) OR ABOVE
60°C (140°F). THIS MAY DAMAGE THE EQUIPMENT. THE EQUIPMENT
SHOULD BE STORED IN A CONTROLLED ENVIRONMENT.
16. CAUTION: DANGER OF EXPLOSION IF BATTERY IS INCORRECTLY
REPLACED. REPLACE ONLY WITH THE SAME OR EQUIVALENT TYPE
RECOMMENDED BY THE MANUFACTURER. DISCARD USED BATTERIES
ACCORDING TO THE MANUFACTURER'S INSTRUCTIONS.
The sound pressure level at the operator's position according to IEC 704-1:1982 is
no more than 70 dB (A).
DISCLAIMER: These instructions are provided according to IEC 704-1. Advantech
disclaims all responsibility for the accuracy of any statements contained herein.

MIC-6311 User Manual vi
Safety Precaution - Static Electricity
Follow these simple precautions to protect yourself from harm and the products from
damage.
To avoid electrical shock, always disconnect the power from your PC chassis
before handling the equipment. Do not touch components on the CPU card or
other cards while the PC is on.
Disconnect the power supply before making any configuration changes. A sud-
den rush of power after a jumper is connected or a card installed may damage
sensitive electronic components.
We Appreciate Your Input
Please let us know whether any aspect of this product, including the manual, can
benefit from improvements or corrections. We appreciate your valuable input in help-
ing improve our products.

vii MIC-6311 User Manual
Contents
Chapter 1 Hardware Configuration......................1
1.1 Introduction ............................................................................................... 2
1.1.1 MIC-6311 SKU Introduction .......................................................... 2
Table 1.1: Processor Type .......................................................... 2
1.2 Specifications ............................................................................................ 3
1.2.1 OpenVPX Interface ....................................................................... 3
1.2.2 CPU .............................................................................................. 3
1.2.3 Processor...................................................................................... 3
Table 1.2: Processor Type .......................................................... 3
1.2.4 BIOS ............................................................................................. 3
1.2.5 Chipset.......................................................................................... 3
1.2.6 Memory ......................................................................................... 4
1.2.7 Ethernet ........................................................................................ 4
1.2.8 Storage Interface .......................................................................... 4
1.2.9 Serial ports.................................................................................... 4
1.2.10 USB Ports ..................................................................................... 4
1.2.11 LEDs ............................................................................................. 4
1.2.12 Watchdog Timer............................................................................ 4
1.2.13 Optional Rear I/O Modules ........................................................... 5
1.2.14 Mechanical and Environmental Specifications.............................. 5
1.2.15 Compact Mechanical Design ........................................................ 5
1.2.16 PCIE Bridge .................................................................................. 5
1.2.17 I/O Connectivity............................................................................. 6
1.2.18 PMC (PCI Mezzanine Card) IEEE1386.1 Compliant .................... 6
1.2.19 Hardware Monitor ......................................................................... 6
1.2.20 Super I/O....................................................................................... 6
1.2.21 RTC and Battery ........................................................................... 6
1.2.22 IPMI............................................................................................... 6
1.2.23 BMC .............................................................................................. 6
1.3 Functional Block Diagram ......................................................................... 7
Figure 1.1 MIC-6311 functional block diagram ............................ 7
1.4 Board Map................................................................................................. 8
Figure 1.2 Board map .................................................................. 8
1.5 Jumpers and Switches .............................................................................. 8
Table 1.3: MIC-6311 Jumper Descriptions .................................. 8
Table 1.4: MIC-6311 Switch Descriptions ................................... 8
1.5.1 Clear CMOS (CN2) ....................................................................... 8
Table 1.5: CN2 Clear RTC ......................................................... 9
1.5.2 PMC VIO Setting (JP1) ................................................................. 9
Figure 1.3 JP11 for PMC VIO (+3.3 V or +5 V) ........................... 9
1.5.3 Switch Settings ............................................................................. 9
Table 1.6: FPGA_SW1 & FPGA_SW2 PCIE NT Setting............ 9
Table 1.7: SW3 Front COM and RTM COM1/COM2 Port Selec-
tion for BMC/SIO UART............................................ 10
1.6 Connector Definitions.............................................................................. 10
Table 1.8: MIC-6311 connector descriptions............................. 10
Figure 1.4 MIC-6311 front panel ports, indicators and buttons.. 11
Table 1.9: Front Panel LEDs ..................................................... 11
1.6.1 USB Connectors ......................................................................... 11
1.6.2 Serial Ports ................................................................................. 11
1.6.3 Ethernet Configuration ................................................................ 12
1.6.4 SATA Daughter Board Connector (CN7 and Extension Module) 12
1.6.5 System Reset and BMC Reset Button........................................ 12
1.7 Safety Precautions .................................................................................. 12

MIC-6311 User Manual viii
1.8 Installation............................................................................................... 13
1.8.1 HDD Installation.......................................................................... 13
Figure 1.5 Complete assembly of MIC-6311 with SATA HDD .. 13
Figure 1.6 Fastening screws to the SATA HDD bracket ........... 14
Figure 1.7 Inserting the SATA HDD into the SATA connector .. 14
1.8.2 PMC/XMC Installation................................................................. 15
1.9 Battery Replacement .............................................................................. 15
1.10 Software Support .................................................................................... 15
Chapter 2 AMI BIOS Setup................................. 17
2.1 Introduction ............................................................................................. 18
Figure 2.1 Setup program initial screen..................................... 18
2.2 BIOS Setup ............................................................................................. 18
2.3 Entering Setup ........................................................................................ 19
2.3.1 Main Setup.................................................................................. 19
Figure 2.2 Main setup screen .................................................... 19
2.3.2 Advanced BIOS Features Setup................................................. 20
Figure 2.3 Advanced BIOS features setup screen .................... 20
Figure 2.4 PCI settings .............................................................. 20
Figure 2.5 ACPI settings............................................................ 21
Figure 2.6 CPU configuration .................................................... 22
Figure 2.7 SATA configuration .................................................. 24
Figure 2.8 USB configuration .................................................... 25
Figure 2.9 Super IO configuration ............................................. 26
Figure 2.10Serial port configuration ........................................... 27
Figure 2.11Console redirection settings ..................................... 28
2.3.3 Chipset Configuration Setting ..................................................... 29
Figure 2.12PCH-IO configuration ............................................... 29
Figure 2.13System Agent (SA) configuration ............................. 29
Figure 2.14NB PCIe configuration.............................................. 30
Figure 2.15Memory configuration............................................... 31
2.3.4 Boot Settings .............................................................................. 31
Figure 2.16Boot settings............................................................. 32
Figure 2.17Choose boot option priority ...................................... 34
2.3.5 Security Settings......................................................................... 34
Figure 2.18Security settings ....................................................... 34
2.3.6 Server Management ................................................................... 35
Figure 2.19Server management................................................. 35
2.3.7 Save and Exit Configuration ....................................................... 36
Figure 2.20Save and exit configuration ...................................... 36
Chapter 3 BMC Firmware Operation................. 39
3.1 Module Management .............................................................................. 40
3.2 IPMI Interfaces........................................................................................ 40
Figure 3.1 IPMI interfaces ......................................................... 40
3.2.1 IPMB ........................................................................................... 40
3.2.2 KCS ............................................................................................ 40
3.2.3 LAN............................................................................................. 41
3.3 Sensors................................................................................................... 41
3.3.1 Sensor List.................................................................................. 41
Table 3.1: Sensor List ............................................................... 42
3.3.2 Threshold Based Sensors .......................................................... 42
Table 3.2: Threshold Descriptions............................................. 42
Table 3.3: Voltage Sensor List .................................................. 43
Table 3.4: Temperature Sensor List.......................................... 43
3.3.3 Discrete Sensors ........................................................................ 43
3.3.4 Example Sensor Data................................................................. 43

ix MIC-6311 User Manual
3.3.5 Integrity Sensor........................................................................... 44
Table 3.5: Integrity Sensor Event Definitions ............................ 44
Table 3.6: Integrity Sensor’s Event Data Table ......................... 45
3.4 FRU Information...................................................................................... 47
3.4.1 FRU Information Access Commands.......................................... 47
3.4.2 Example FRU Data ..................................................................... 47
3.5 OEM Commands..................................................................................... 47
Table 3.7: OEM Command Overview........................................ 47
3.5.1 IPMItool Raw Command ............................................................. 47
3.5.2 Configuration Setting OEM Commands...................................... 48
3.5.3 LAN Controller Interface Selection.............................................. 48
3.5.4 LAN Controller Channel Selection And Priority........................... 48
3.5.5 FPGA COM Port UART MUX ..................................................... 49
Table 3.8: OEM Interfaces......................................................... 49
Table 3.9: COM1 UART MUX Settings ..................................... 49
Table 3.10:COM2 UART MUX Settings ..................................... 49
3.5.6 Read Port 80 (BIOS POST Code) OEM Command.................... 50
3.5.7 Clear NVRAM Data OEM Command .......................................... 50
3.5.8 MAC Address Mirroring OEM Command.................................... 50
Table 3.11:MAC Address Mapping Table................................... 50
3.5.9 Load Default Configuration OEM Command .............................. 51
3.6 UART and UART-Multiplexer .................................................................. 51
3.6.1 UART Block Diagram.................................................................. 51
Figure 3.2 UART functional block overview............................... 51
3.7 ACPI........................................................................................................ 52
3.7.1 ACPI Featured Graceful Shutdown............................................. 52
3.7.2 Graceful Shutdown Timeout ....................................................... 52
3.8 BIOS Failover/Redundancy..................................................................... 52
3.8.1 Overview ..................................................................................... 52
3.8.2 BIOS Boot Watchdog.................................................................. 52
3.9 Supported Watchdogs............................................................................. 52
3.9.1 Firmware Watchdog.................................................................... 52
3.9.2 BMC Watchdog........................................................................... 53
3.10 Resets ..................................................................................................... 53
3.10.1 Baseboard Management Controller Resets................................ 53
3.11 SOL Setup............................................................................................... 54
3.11.1 Preconditions for SOL................................................................. 54
3.11.2 LAN Configuration with IPMItool ................................................. 55
Chapter 4 HPM.1 Update ....................................59
4.1 HPM.1 Preconditions .............................................................................. 60
4.1.1 IPMItool....................................................................................... 60
4.1.2 Interfaces .................................................................................... 60
4.2 BMC Firmware Upgrade ......................................................................... 60
4.2.1 Load New BMC Firmware Image................................................ 60
4.2.2 Activate BMC Firmware .............................................................. 60
4.3 FPGA Configuration Upgrade ................................................................. 61
4.3.1 Load New FPGA Image .............................................................. 61
4.3.2 Activate FPGA Configuration ...................................................... 61
4.4 BIOS Upgrade......................................................................................... 62
4.4.1 Load New BIOS Image ............................................................... 62
4.4.2 Activate BIOS Image................................................................... 62
4.5 Verify Successful Upgrades .................................................................... 62
Appendix A Pin Assignments ...............................65
A.1 P0 Connector .......................................................................................... 66
Table A.1: P0 VPX I/O ............................................................... 66

MIC-6311 User Manual x
A.2 P1 Connector .......................................................................................... 66
Table A.2: P1 VPX I/O ............................................................... 66
A.3 P2 Connector .......................................................................................... 67
Table A.3: P2: I/O ...................................................................... 67
A.4 P3 Connector .......................................................................................... 68
Table A.4: P3 VPX I/O Port ....................................................... 68
A.5 P4 Connector .......................................................................................... 69
Table A.5: P4 CompactPCI I/O Port .......................................... 69
A.6 P5 Connector .......................................................................................... 70
Table A.6: J5 CompactPCI I/O Port........................................... 70
A.7 Other Connectors.................................................................................... 71
Table A.7: CNSATA1 Daughter Board Connector..................... 71
Table A.8: J15(P15) XMC1 Connector ...................................... 71
Table A.9: VCN1 VGA Connector.............................................. 72
Table A.10:CNCOM1 (RJ45) Connector .................................... 72
Table A.11:CN & CN5 USB Port 1 & Port 2................................ 72
Table A.12:BT1 CMOS Battery................................................... 72
Table A.13:RJ1 LAN1 Connector ............................................... 72
Figure A.1 RJ11 LAN indicator .................................................. 72
A.7.1 M/D, PWR, BMC HB, and IDE/Hot-swap LEDs.......................... 73
Appendix B Programming the Watchdog Timer .75
B.1 Watchdog Timer Programming Procedure ............................................. 76
Appendix C FPGA .................................................. 77
C.1 Features.................................................................................................. 78
C.2 FPGA I/O Registers ................................................................................ 78
Table C.1: LPC I/O Address Register ........................................ 78
Appendix D IO Controller List............................... 79
D.1 IO Controller List ..................................................................................... 80
Appendix E Glossary............................................. 81
E.1 Glossary.................................................................................................. 82
Appendix F BIOS Checkpoint............................... 85
F.1 Introduction ............................................................................................. 86
F.2 Checkpoint Ranges / Descriptions.......................................................... 86
F.3 Standard Checkpoints............................................................................. 87
Appendix G IPMI/PICMG Command Subset
Supported by BMC93
G.1 Standard IPMI Commands (v2.0) ........................................................... 94
Table G.1: IPM Device “Global” Commands.............................. 94
Table G.2: BMC Watchdog Timer Commands........................... 94
Table G.3: BMC Device and Messaging Commands................. 94
Table G.4: Chassis Device Commands ..................................... 95
Table G.5: Event Commands..................................................... 96

xi MIC-6311 User Manual
Table G.6: PEF and Alerting Commands ................................... 96
Table G.7: Sensor Device Commands....................................... 96
Table G.8: FRU Device Commands........................................... 97
Table G.9: SDR Device Commands........................................... 97
Table G.10:SEL Device Commands ........................................... 97
Table G.11:LAN Device Commands........................................... 98
Table G.12:Serial/Modem Device Commands............................ 98
Table G.13:Bridge Management Commands (ICMB) ................. 99
Table G.14:Discovery Commands (ICMB).................................. 99
Table G.15:Bridging Commands (ICMB) .................................... 99
Table G.16:Event Commands (ICMB) ...................................... 100
Table G.17:OEM Commands for Bridge NetFn ........................ 100
Table G.18:Other Bridge Commands ....................................... 100
G.2 PICMG IPMI Commands....................................................................... 101
Table G.19:AdvancedTCA (PICMG 3.0 R3.0 AdvancedTCA Base
Specification) .......................................................... 101
Table G.20:HPM.1 (R1.0) ......................................................... 102
G.3 OEM/Group IPMI Commands ............................................................... 102
Table G.21:Advantech OEM Commands.................................. 102
Appendix H Driver & Tools ..................................103
H.1 OpenIPMI .............................................................................................. 104
H.2 IPMITool................................................................................................ 104

MIC-6311 User Manual xii

Chapter 1
1Hardware
Configuration
This chapter describes how to
configure the MIC-6311 hardware.

MIC-6311 User Manual 2
1.1 Introduction
Advantech’s MIC-6311 is a single processor VPX blade based on an Intel 4th gener-
ation Core i3/i5/i7 platform. The MIC-6311 enables the highest possible performance
in the 6U VPX form factor with two SRIOx4 ports on the VPX data plane and two PCI
Express x8 2nd generation lanes in the VPX expansion plane for workstation and
computation-intensive applications. Two Serial RapidIO ports enable the MIC-6311 to
be interfaced with digital front ends, such as DSP and FPGA cards, via a high-speed,
low latency deterministic interconnect. In addition, PCI Express ports with up to 5GB/
s throughput rates offer a high-performance interface to mainstream peripherals and
I/O cards. With a SO-DIMM socket and additional soldered, onboard DRAM with
ECC in a dual-channel design running at 1600MT/s, the MIC-6311 is suitable for
harsh environments, maintains maximum memory throughput, and supports memory
expansion using the latest SO DIMM technology. Moreover, the 4th generation Core
processors provide an increased cache size and efficiency, as well as instruction set
improvements, which make the MIC-6311 a high-performance computing engine with
an outstanding floating point and vector processing performance.
Targeted to harsh environments, the MIC-6311 is designed to support conduction-
cooling heat sinks. Additionally, it features an onboard soldered, industrial SSD for
maximum reliability. Using Intel’s latest PCH (Lynx Point) and advanced SATA con-
troller, the MIC-6311 supports enhanced storage options, such as a 2.5" SATA III
HDD/SSD socket with high storage capacity and up to 6 Gbps transfer speed. The
CFast socket offers an ideal alternative for implementing a cost-efficient, pluggable
SSD, and the onboard XMC/PMC site with PCIe x8 2nd generation connectivity is
capable of hosting high-speed offload or I/O mezzanines. Two USB 3.0 ports located
on the front panel can be connected to external USB devices, offering data transfer
rates of up to 5Gbps. Network and remote connectivity is achievable via a RS232
console (RJ45) and two GbE RJ45 ports, and powered using Intel’s latest Gigabit
Ethernet controller - the I350.
The processor’s integrated enhanced graphics engine Iris offers up to 2x the graphic
performance than that of previous generation solutions. Triple independent display
support can be implemented by using the MIC-6311’s VGA front panel port and two
DisplayPort / HDMI interfaces on the rear transition modules. Additionally, audio port
support via the backplane interface provides enhanced media capabilities, and three
SATA ports (SATAIII) and four USB ports (4x USB 2.0, 2x USB 3.0) are connected to
the backplane to satisfy demands for additional I/O ports or storage. Two GbE/
SERDES ports support system-level IP connectivity, and two UART interfaces can be
leveraged to interface with legacy devices and consoles.
1.1.1 MIC-6311 SKU Introduction
Table 1.1: Processor Type
MIC-6311
Model Number CPU Core # Cooling Onboard DIMM Capacity
MIC-6311-A1I8E I7-4700EQ 4 Air cooling 8 GB

3 MIC-6311 User Manual
Chapter 1 Hardware Configuration
1.2 Specifications
1.2.1 OpenVPX Interface
The MIC-6311 complies with the OpenVPX MOD6-PAY-4F1Q2U2T-12.2.1-2 profile.
Two lanes of SRIO Gen2 x4, which offer 5G baud rates, are provided in the P1 data
plane. The MIC-6311 uses two lanes of PCIe Gen2 x8 in the P2 expansion plane.
Two lanes of 1GBase-T or SERDES (on request) are used for the P4 control plane.
1.2.2 CPU
The MIC-6311 supports the Intel 4th generation Core i3/i5/i7 Haswell processor fam-
ily, with clock frequencies of up to 3.4 GHz. Intel 4th generation Core i3/i5/i7 proces-
sors are integrated with the embedded graphic controller Iris. By incorporating Iris,
the MIC-6311 can support OpenGL 4.0, DirectX 11 and OpenCL 1.2, enabling
enhanced 3D graphics processing. The Haswell CPU also offers superior perfor-
mance when Intel Turbo Boost Technology 2.0 is required. Turbo Boost is automati-
cally activated when the OS requests the highest processor performance state.
The Haswell CPU exhibits a superior performance 2x that provided by previous gen-
erations. Using Intel HT Technology, the MIC-6311 is capable of running demanding
applications simultaneously, while maintaining system responsiveness.
1.2.3 Processor
The I7-4700EQ is the default CPU for the MIC-6311 air-cooled SKU (MIC-6311-
A1I8E), and I5-4402E is the default CPU for the MIC-6311 conduction-cooled SKU
(available on request). Please contact your distributor or local Advantech branch for
information regarding the availability of I5-4400E/4402E SKUs.
1.2.4 BIOS
An 8 Mbyte SPI flash featuring a board-specific BIOS (from AMI) was designed to
satisfy industrial and embedded system requirements.
1.2.5 Chipset
The Intel Mobile QM87 (Lynx Point) chipset integrates several capabilities to provide
flexibility when connecting I/O devices. The Intel QM87 chipset offers fast access to
peripheral devices and delivers outstanding system performance through high-band-
width interfaces such as PCI Express, Serial ATA solid-state drives (SSDs) and tradi-
tional hard disk drives (HDDs), and integrated USB 3.0. The chipset also drives lower
power through enhanced link power management of the Advanced Host Controller
Table 1.2: Processor Type
Intel CPU
Model Number
CPU
architecture Core # Freq. Cache DMI CPU TDP Package Required Airflow
I7-4700EQ Haswell
(22nm) 4 2.4 GHz 6 MB 5 GT/s 47 W FCBGA 35 CFM
I5-4400E Haswell
(22nm) 2 2.7 GHz 3 MB 5 GT/s 37 W FCBGA 30 CFM
I5-4402E Haswell
(22nm) 2 1.6 GHz 3 MB 5 GT/s 25 W FCBGA 30 CFM
Note! Because the power consumption and thermal restrictions differ for vari-
ous VPX systems, please double check these items before installing a
higher-speed CPU not specified in the table above.

MIC-6311 User Manual 4
Interface (AHCI), enables easier expandability with support for native hot plug, and
enhances boot and multitasking performance with Native Command Queuing (NCQ).
1.2.6 Memory
The MIC-6311 features 8 GB of onboard DDR3L memory with ECC support, and one
204-pin SO-DIMM socket that can accommodate an additional 8GB of 1.35V mem-
ory.
1.2.7 Ethernet
The MIC-6311 uses an Intel I350AM4 LAN controller to offer two 10/100/1000Base-T
Ethernet connectivity (on LAN1 & LAN2) and provides two 10/100/1000Base-T
Ethernet connectivity to P4. Optional settings for the source of each Gigabit Ethernet
port can be found in the BIOS menu.
Front I/O (RJ-45)
Backplane (GbE) (SERDES on request)
1.2.8 Storage Interface
The MIC-6311 supports SATA III and three SATA II interfaces. The SATA III inter-face
is routed to the 2.5" SATA hard disk drive connector on the MIC-6311. Three SATAIII
are routed to P5; however, users must add a re-driver to their Rear-IO to ensure that
these drivers can perform at SATAIII speed. Another SATA interface is connected to
an onboard soldered, industrial SSD for maximum reliability. Currently, an 8G SATAI
driver is provided with the MIC-6311 as the standard storage capacity. Please contact
your local Advantech branch or distributor to request the customized option.
1.2.9 Serial ports
One RJ-45 COM1 port (RS-232 interface) is provided on the front panel. Two COM
ports are routed to the backplane via a P5 connector, and can be configured to
RS232 / RS485 / RS422 modes using the onboard switch.
1.2.10 USB Ports
Two USB 3.0-compliant ports with fuse protection are provided. Both ports are routed
to the front panel connectors on the MIC-6311 and to the rear I/O module via a P5
connector.
1.2.11 LEDs
Four LEDs are provided on the front panel as follows:
One bi-color LED (blue/yellow) indicates hot swap and HDD activity. Blue indi-
cates that the board can be safely removed from the system, whereas yellow
indicates HDD activity.
One LED is used to indicate the power status. The emission of green light indi-
cates that power is provided to the board.
1.2.12 Watchdog Timer
An onboard watchdog timer provides system reset capabilities via software control.
The programmable time interval is 1 to 255 seconds.
1.2.13 Optional Rear I/O Modules
Please contact your local Advantech branch or distributor for all inquires regarding
customized RIO options.

5 MIC-6311 User Manual
Chapter 1 Hardware Configuration
1.2.14 Mechanical and Environmental Specifications
Operating temperature: 0 ~ 55°C (32 ~ 131°F) for industrial-temperature
SKUs; -40 ~ 70°C(-40 ~140°F) for wide-temperature SKUs. Please contact your
Advantech representative regarding the availability of wide-temperature SKUs.
Storage Temperature: -40 ~ 85°C (-40 ~ 185°F)
Humidity: 95% @ 40°C (non-condensing)
Humidity (non-operating): 95% @ 60°C (non-condensing)
Vibration: 5~100Hz, 1.06Grms (without on-board 2.5” SATA HDD)
Vibration (non-operating): 5~100 Hz, 2 Grms
Shock: 20 G (without on-board 2.5” SATA HDD)
Shock (non-operating): 50 G
Altitude: 4,000 m above sea level
Board size: 233.35 x 160 mm (6U size), 1-slot (4 TE) wide
Weight: 0.8 kg (1.76 lb)
1.2.15 Compact Mechanical Design
The MIC-6311 has a specially designed CPU heatsink to enable fanless operation.
Please contact your distributor or local Advantech branch regarding the feasibility of
a customized conduction-cooling heatsink design.
1.2.16 PCIE Bridge
The MIC-6311 uses a PLX PEX8733 component and 32-lane, 18-port, PCIe Gen3
switch device as the gateway to an intelligent subsystem. When configured as a sys-
tem controller, the bridge acts as a standard transparent PCI Express to PCI/PCI-X
Bridge. The MIC-6311 receives power from the backplane and supports a rear I/O.
The PLX PEX 8733 offers the following features:
PCI Interface
–Full compliance with the PCI Local Bus Specification, Revision 3.0
–PCI Power Management Spec, r1.2
Supports transparent and non-transparent mode of operations.
Supports forward and reverse bridging
64-bit, 66MHz asynchronous operation
Integrated DMA engine, four DMA Channels
End-to-end CRC (ECRC) protection
Failover support, can be configured for 1+1 redundancy or N+1 redundancy
Please consult the PLX PEX 8733 data book for details.
1.2.17 I/O Connectivity
For MIC-6311, front panel I/O is provided through two RJ-45 Gigabit Ethernet ports,
one RJ-45 COM port, two USB 3.0 ports, one USB 2.0, one VGA connector, and one
XMC/PMC knockout.
The onboard I/O consists of one SATA channel, which can be connected to a daugh-
ter board for 2.5" SATA HDD and a CFast slot. Rear I/O connectivity is available via
the following VPX connectors:
Note! The operating temperature range of the MIC-6311 depends on the pro-
cessor installed and the airflow through the chassis.

MIC-6311 User Manual 6
P1: two lanes of SRIO Gen2 x4.
P2: two PCIe Gen2 x8
P3: PMC IO
P4: XMC IO, KB/mouse, and two lanes of GbE or SERDES
P5: two COM ports, two DisplayPorts, two USB 2.0 ports, two USB 3.0 ports,
and audio outputs
Please refer to the appendix for the details of the pin definitions.
1.2.18 PMC (PCI Mezzanine Card) IEEE1386.1 Compliant
Additional I/O or co-processing functionality is supported by add-on PMC modules.
The MIC-6311 supports one PMC site that is fully compliant with the VITA 46.9 PMC/
XMC Rear I/O Fabric Signal Mapping on 3U and 6U VPX Modules Standard specifi-
cation. The PMC supports a 133 MHz PCI-X bus interface and both 3.3 V and 5 V
VIO depending on usage.
The two-layer front panel design complies with IEEE 1101.10. Connectors are
screwed to the front panel, and a shielding gasket is attached to the panel edge,
reducing emissions and increasing protection from external interference.
1.2.19 Hardware Monitor
One hardware monitor (NCT6776D) is provided for monitoring critical hardware
parameters. This monitor is attached to the BMC to facilitate monitoring of the CPU
temperature and core voltage.
1.2.20 Super I/O
The MIC-6311 Super I/O device supports the following legacy PC devices:
Serial ports COM1 and COM2 are connected to the rear I/O module or front
panel via a multiplexer in the FPGA.
The PS2 (KB/mouse) is routed to the rear I/O module.
1.2.21 RTC and Battery
The RTC module maintains the date and time. The RTC circuitry on MIC-6311 is con-
nected to a battery (CR2032M1S8-LF, 3V, 210 mAH).
1.2.22 IPMI
The MIC-6311 features the Intelligent Platform Management Interface (IPMI) for
monitoring the health of the entire system. A NXP LPC1768 microcontroller provides
BMC functionality to interface between the system management software and plat-
form hardware. Full IPMI details are covered in Chapter 3.
1.2.23 BMC
The MIC-6311 management firmware is implemented on a 32-bit ARM Cortex-M3
core. An external SPI EEPROM is used for storing FRU inventory data and non-vola-
tile configurations.
1.2.23.1 Key Features
Advantech Integrity Sensor
Based on an Advantech IPMI Core, and designed for xTCA, CPCI and VPX
Compliant with IPMI 1.5 and IPMI 2.0 specifications
IPMI-over-LAN
Serial-over-LAN

7 MIC-6311 User Manual
Chapter 1 Hardware Configuration
KCS interface enables direct IPMI communication between the OS and BMC
BIOS failover, including a BIOS watchdog
Full BMC watchdog support, as defined in the IPMI specification
Full BMC firmware redundancy
–Manual rollback
–Automatic rollback in the event of update failure
HPM.1 for in field updates, supporting:
–BMC firmware
–FPGA
–BIOS
UART muxing between all serial interfaces for easy console access
Additional sensors for hardware monitoring
1.3 Functional Block Diagram
Figure 1.1 MIC-6311 functional block diagram
1.4 Board Map
The figure below shows the location of the main components, jumpers, switches and
thermal sensors.
Intel
Haswell-M
4/2 Core / GT2
ECC/BGA
37W/47W
SPI
8MB
TPM
Lattice
FPGA
LCMXO2
Handle SW
RS232
User + Reset
buttons
User LEDs
HWM
Intel
Lynx Point
PCH
USB 2.0 / 3.0
BMC
LPC1768
SPI / UART UART (2x) to RTM
8GB DDR3 onboard
FDIx2 DMI
SPI
LPC
I350AM4
P2/P3
NC-SI
3x SATAIII (6Gbps)
SPI
FRU
SDR
SEL
Power+IPMB
PCIex8
P0
P1
P2
(Opt.)
P3
P4
P5
P6
(N/A)
USB 3.0 (2x)
Audio
UART (2x)
from FPGA
SATAIII, 6GB/s for 2.5”
SSD/ SATA
PEX8733
32 Lane
PMC 64s PMC IO
2x PCIex8 (NT Capable)
PCIex4
I350 (1) 2x SerDes
2x 1GBase - T(Opt.)
USB 2.0 (2x)
DP
DP x2
VGA to P5
from CPU
PCIex8
NT
XMC
PCIe2
PCI-X
12d XMC IO
SPI
8MB
SMBus
I2C
IPMB0-A/B
to P0
Tsi721
2x PCIex4
TSI721
USB 2.0
USB 2.0 / 3.0
MUX
SATAII (3Gbps)
PCI-X 64b/133
SIO
UART x2
KB/MS
1600 w/ ECC
1600 w/ ECC
8GB DDR3 SODIMM
EEPROMFlash
SPI
I2C
I350AM4
P0/P1
SRIO Gen2 x4
SRIO Gen2 x4
PCIex4
KB/MS
from SIO
SSD
onboard
SATAI (1.5Gbps)

MIC-6311 User Manual 8
Figure 1.2 Board map
1.5 Jumpers and Switches
Table 1.4 and Table 1.5 list the jumper and switch functions. Read this section care-
fully before changing the jumper and switch settings on your MIC-6311 board.
1.5.1 Clear CMOS (CN2)
This jumper is used to erase CMOS data. Follow the procedures below to clear the
CMOS.
1. Turn off the system.
2. Close jumper CN2 for approximately 3 seconds.
3. Set jumper CN2 as Normal.
4. Turn on the system. The BIOS is reset to the default setting.
JP1 FPGA_SW2PCIE bridge
SRIO bridge
PCI bridge
Thermal
Sensor
PCH
FPGA
CN2
SW3
CPU
Thermal
Sensor
Thermal
Sensor
Onboard memory
I350
UART_SW
FPGA_SW1
Table 1.3: MIC-6311 Jumper Descriptions
Number Function
CN2 Clear CMOS
JP1 PMC VIO
Table 1.4: MIC-6311 Switch Descriptions
Number Function
FPGA_SW1 These two switches are for PCIE NT setting LAN configuration
FPGA_SW2
UART_SW RIO COM RS232/RS485/ RS422 mode selection
SW3 Front COM & RTM COM1/COM2 ports selection for SIO UART