iWave iW-RainboW-G40D User manual

i.MX 8M Plus SMARC Development Platform Hardware User Guide
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iWave Systems Technologies Pvt. Ltd.
iW-RainboW-G40D
i.MX 8M Plus Quad/QuadLite/Dual
SMARC Development Platform
Hardware User Guide

i.MX 8M Plus SMARC Development Platform Hardware User Guide
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Document Revision History
Document Number
iW-PRGQZ-UM-01-R2.0-REL1.0-Hardware-i.MX 8M Plus-DevKit
Revision
Date
Description
0.1
02th March 2022
Draft Release
1.0
8th May 2023
Initial Release
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others
is strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are
hereby notified that any disclosure, copying distribution or use of any of the information contained within this
document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent
permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners and
used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that our
Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bengaluru, Karnataka,
India –560076

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Table of Contents
1. INTRODUCTION.................................................................................................................................................. 8
1.1 Purpose ...................................................................................................................................................... 8
1.2 Overview .................................................................................................................................................... 8
1.3 List of Acronyms ......................................................................................................................................... 8
1.4 Terminology Description........................................................................................................................... 10
1.5 References................................................................................................................................................ 10
2. ARCHITECTURE AND DESIGN............................................................................................................................ 11
2.1 i.MX 8M Plus Q/QL/D SMARC Development Platform Block Diagram ........................................................ 11
2.2 i.MX 8M Plus Q/QL/D SMARC Development Platform Features................................................................. 12
2.3 SMARC MXM Connector ........................................................................................................................... 14
2.3.1 SMARC PCB Edge Connector Pin Assignment ......................................................................................... 15
2.4 Serial Interface Features ........................................................................................................................... 35
2.4.1 Debug UART Port .................................................................................................................................. 35
2.4.2 RS232 UART Interface (Optional)........................................................................................................... 36
2.4.3 Data UART Header................................................................................................................................ 37
2.5 High Speed Interface Features .................................................................................................................. 38
2.5.1 PCIe Port ............................................................................................................................................... 38
2.5.2 Secondary M.2 Interface (Optional)....................................................................................................... 45
2.5.3 USB3.0 Host Interface ........................................................................................................................... 49
2.6 Communication Interface Features ........................................................................................................... 50
2.6.1 Dual Gigabit Ethernet Ports................................................................................................................... 50
2.6.2 USB2.0 Host Port................................................................................................................................... 50
2.6.3 USB2.0 OTG Interface(optional)............................................................................................................. 51
2.6.4 SDIO Interface....................................................................................................................................... 52
2.6.5 CAN Interface........................................................................................................................................ 53
2.7 Audio & Video Features ............................................................................................................................ 55
2.7.1 I2S Audio Interface................................................................................................................................ 55
2.7.2 MIPI DSI Display.................................................................................................................................... 56
2.7.3 LVDS Connector (Optional) .................................................................................................................... 58
2.7.4 HDMI Port............................................................................................................................................. 60
2.7.5 MIPI CSI Camera.................................................................................................................................... 61
2.7.6 LVDS1 Connector................................................................................................................................... 67
2.8 Additional Features................................................................................................................................... 69
2.8.1 RTC Coin Cell Holder.............................................................................................................................. 69
2.8.2 SPI Flash................................................................................................................................................ 69
2.8.3 QSPI Flash ............................................................................................................................................. 70
2.8.4 Capacitive Touch Connector .................................................................................................................. 70
2.8.5 USB2.0 Header...................................................................................................................................... 71
2.8.6 Display Backlight Power Header ............................................................................................................ 72
2.9 On Board Settings ..................................................................................................................................... 74
2.10 Carrier Expansion Connectors ................................................................................................................... 76
3. TECHNICAL SPECIFICATION .............................................................................................................................. 81

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3.1 Power Input Requirement......................................................................................................................... 81
3.2 Power Output Specification ...................................................................................................................... 82
3.3 Environmental Characteristics................................................................................................................... 83
3.3.1 Environmental Specification .................................................................................................................. 83
3.3.2 RoHS Compliance .................................................................................................................................. 83
3.3.3 Electrostatic Discharge.......................................................................................................................... 83
3.4 Mechanical Characteristics........................................................................................................................ 84
3.4.1 i.MX 8M Plus Q/QL/D SMARC Carrier Board Mechanical Dimensions..................................................... 84
3.4.2 Guidelines to insert the SMARC SOM into Carrier Board ........................................................................ 86
4. ORDERING INFORMATION............................................................................................................................... 88

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List of Figures
Figure 1: i.MX 8M Plus Q/QL/D SMARC Development Platform Block Diagram................................................................... 11
Figure 2: SMARC MXM Connector ...................................................................................................................................... 14
Figure 3: Data UART Header............................................................................................................................................... 35
Figure 4: RS232 UART Header............................................................................................................................................. 36
Figure 5: Data UART Header............................................................................................................................................... 37
Figure 6: PCIex4 Connector ................................................................................................................................................ 38
Figure 7: M.2 Connector..................................................................................................................................................... 41
Figure 8: Secondary M.2 Connector.................................................................................................................................... 45
Figure 9: USB3.0 Host......................................................................................................................................................... 49
Figure 10: Dual Stack RJ45 Magjack .................................................................................................................................... 50
Figure 11: USB2.0 Host Port ............................................................................................................................................... 51
Figure 12: USB2.0 OTG Port................................................................................................................................................ 52
Figure 13: SDIO Port........................................................................................................................................................... 53
Figure 14: CAN Header....................................................................................................................................................... 54
Figure 15: Audio In and Out Ports....................................................................................................................................... 55
Figure 16: MIPI DSI Display Connector................................................................................................................................ 56
Figure 17: LVDS Display Connector..................................................................................................................................... 59
Figure 18: HDMI Port.......................................................................................................................................................... 60
Figure 19: MIPI Camera Connect ........................................................................................................................................ 61
Figure 20: MIPI Camera Connector..................................................................................................................................... 63
Figure 21: LVDS1 Connector ............................................................................................................................................... 67
Figure 22: RTC Coin Cell Holder .......................................................................................................................................... 69
Figure 23: Capacitive Touch Connector............................................................................................................................... 70
Figure 24: USB2.0 Header................................................................................................................................................... 71
Figure 25: Display Backlight Power Header......................................................................................................................... 72
Figure 26: SMARC On Board Switches................................................................................................................................. 74
Figure 27: SMARC Expansion Connector............................................................................................................................. 76
Figure 28: Power Jack......................................................................................................................................................... 81
Figure 29: Mechanical dimension of i.MX 8M Plus Q/QL/D SMARC Carrier Board- Top View............................................... 84
Figure 30: Mechanical dimension of i.MX 8M Plus Q/QL/D SMARC Carrier Board- Bottom View......................................... 85
Figure 31: Mechanical dimension of i.MX 8M Plus Q/QL/D SMARC Carrier Board- Side View.............................................. 86
Figure 32: SOM Insertion Guideline.................................................................................................................................... 87

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List of Tables
Table 1: Acronyms & Abbreviations...................................................................................................................................... 8
Table 2: Terminology.......................................................................................................................................................... 10
Table 3: SMARC MXM Connector Pin Assignment............................................................................................................... 15
Table 4: RS323 UART Header Pin Out ................................................................................................................................. 36
Table 5: Data UART Header Pin Out.................................................................................................................................... 37
Table 6: PCIex4 Connector Pin Out ..................................................................................................................................... 39
Table 7: M.2 Connector Key B-PCIe Pinout ......................................................................................................................... 41
Table 8: Secondary M.2 Connector Pinout.......................................................................................................................... 45
Table 9: CAN0 Header Pinout ............................................................................................................................................. 54
Table 10: CAN1 Header Pinout ........................................................................................................................................... 54
Table 11: MIPI DSI Display Connector Pin Out..................................................................................................................... 57
Table 12: LVDS Connector Pinout ....................................................................................................................................... 59
Table 13: MIPI Camera Connector Pin Out.......................................................................................................................... 61
Table 14: MIPI CSI FPC Camera 36 Pin Connector Pinout .................................................................................................... 63
Table 15: MIPI CSI FPC Camera 40 Pin Connector Pinout (Optional).................................................................................... 65
Table 16: LVDS1 Connector Pinout ..................................................................................................................................... 67
Table 17: Capacitive Touch Connector................................................................................................................................ 70
Table 18: USB2.0 Header.................................................................................................................................................... 72
Table 19: Display Backlight Power Header.......................................................................................................................... 72
Table 20: Board Configuration Switch................................................................................................................................. 74
Table 21: Expansion Connector1 Pinout ............................................................................................................................. 77
Table 22: Expansion Connector2 Pinout ............................................................................................................................. 78
Table 23: Power Input Requirement................................................................................................................................... 82
Table 24: Power Output Specification................................................................................................................................. 82
Table 25: Environmental Specification................................................................................................................................ 83
Table 26: Orderable Product Part Numbers........................................................................................................................ 88

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1. INTRODUCTION
1.1 Purpose
The iW-RainboW-G40D i.MX 8M Plus SMARC SOM development platform incorporates i.MX 8M Plus
Quad/QuadLite/Dual (Q/QL/D) SoC based SMARC SOM and generic SMARC Carrier board for complete validation of
i.MX 8M Plus Q/QL/D SoC functionality. This document is the hardware user guide for the i.MX 8M Plus SMARC
Carrier board. This guide provides detailed information on the overall design and usage of the SMARC carrier board
from a hardware systems perspective. Complete information about the i.MX 8M Plus SMARC SOM hardware is
explained in another document “iW-RainboW-G40M-i.MX 8M Plus-SMARC-SOM-HardwareUserGuide”.
1.2 Overview
iW-RainboW-G40D-i.MX 8M Plus Development Platform comes with i.MX 8M Plus Q/QL/D based SMARC SOM,
SMARC V2.1.1 Generic Carrier. The development board can be used for quick prototyping of various applications
targeted by the i.MX 8M Plus Q/QL/D application processor. With the 120mmx120mm Nano ITX form factor, SMARC
carrier board is highly packed with all the necessary on-board connectors to validate the features of i.MX 8M Plus
Q/QL/D SMARC SOM.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
CMOS
Complementary Metal-Oxide Semiconductor
CPU
Central Processing Unit
CSI
Camera Serial Interface
DSI
Display Serial Interface
eMMC
Enhanced Multi Media Card
GB
Giga Byte
Gbps
Gigabits per sec
GPIO
General Purpose Input Output
Hz
Hertz
I2C
Inter-Integrated Circuit
I2S
Inter-IC Sound Bu
IC
Integrated Circuit
MIPI
Mobile Industry Processor Interface
PCB
Printed Circuit Board
RoHS
Restriction of Hazardous Substances
RTC
Real Time Clock

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Acronyms
Abbreviations
SD
Secure Digital
SMARC SOM
Smart Mobility Architecture
TBD
To Be Defined
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
USB OTG
USB On The Go
V
Voltage

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1.4 Terminology Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
DIFF
Differential Signal
LVDS
Low Voltage Differential Signal
GBE
Gigabit Ethernet Media Dependent Interface differential pair signals
USB HS
Universal Serial Bus High Speed differential pair signals
USB SS
Universal Serial Bus Super Speed differential pair signals
MIPI
Mobile Industry Processor Interface signals
TMDS
Transition Minimized Differential Signaling
OD
Open Drain Signal
OC
Open Collector Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented On-SMARC SOM.
1.5 References
•IMX8MPXEC_Rev_x.pdf
•iMX_8M_Plus_RM_Revx.pdf
•SMARC Specification V2.1.1

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about the i.MX 8M Plus Q/QL/D SMARC SOM Development Platform
Carrier board features with high level block diagram and detailed information about each block.
2.1 i.MX 8M Plus Q/QL/D SMARC Development Platform Block Diagram
iWave Systems Technologies Pvt. Ltd.
[email protected]
iW-RainboW-G40D_i.MX 8M Plus Q/QL/D SMARC Development Kit Block Diagram
SMARC Edge
Connector
USB3.0 Switch
RJ45 Stack
ENET0 to
GBE0
Bottom
ENET1 to
GBE1
Top
10/100/1000 Mbps Ethernet
USB2.0 Host x 1
10/100/1000 Mbps Ethernet
USB TypeC
Connector
USB3.0 Stack
USB2
Bottom
Top
USB3.0 Host x 1
USB3
USB3.0 Host x 1
USB2.0 1:4 Hub
USB2.0 Stack
USB4
Bottom
Top
USB2.0 Host x 1
USB3
USB microAB
Connector USB0
USB2.0 OTG x 1*
M.2 Module-Key B
Connector
SATA
USB_Touch
I2C_GP I2C2
UART3
UART3*
Nano SIM
Connector
M.2 Module-Key B
Connector
PCIe
PCIeA
PCIe 1:3 Switch PCIeA
PCIe0
PCIe X4
PCIe1
PCIe0
HDA/I2S1 x 1
I2C_GP
UART3
UART4
USB microAB
Connector
UART4
UART to USB
Converter
UART1*
RS232 Header UART1*
UART to RS232
IC
FLEXCAN1
CAN0 Header CAN0 CAN Transceiver
FLEXCAN2
CAN1 Header CAN1
CAN Transceiver
UART2
UART Header UART2 (with CTS & RTS)
BOOT_SEL
Control
DIP Switch
BOOT_SEL x3
CTRL Signals
PCIe_SW_SEL
MIPI DSI0/
LVDS1CH01
LVDS0/MIPI DSI0 x 11
HDMI/DP1
LVDS0 Connector
MIPI DSI0
Connector
MIPI DSI0
HDMI Connector
MIPI CSI1,
I2C_CAM0 OV5640 Camera
HDMI x 1
MIPI CSI x 2lane[0:1], I2C x 1
LVDS0
To On-board
Peripherals &
SOM
12V Power Jack
On-Board
Regulators
12V
RTC Coin cell
Holder
VDD_RTC 3V
SD2 Standard SD/ µSD
Connector
SDIO x 1
LVDS1 Connector
MIPI DSI1/
LVDS1CH11
LVDS1/MIPI DSI1 x 1
LVDS1 Touch
LVDS0 TOUCH
I2C_GP
MIPI CSI2,
I2C_CAM0 Camera Connector
MIPI CSI x 4lane[0:4], I2C x 1
SAI2 SGTL
Audio Codec
Audio IN Jack
I2S0
Audio IN
SAI3 Audio IN & OUT
Jack
I2S1
Audio OUT Jack
Audio Out
ECSPI1 SPI FLASH
SPI0
ECSPI2 QSPI FLASH
QSPI
USB5
Audio IN & OUT2
USB_Touch
SIM Switch
SIM_IN
SIM_OUT1
SIM_OUT2
MIPI_CSI0 x 2lane [2:3]
WM8960
Audio Codec
Type-C SW SEL
Type-C SW SEL
Note: * Optional
1. Either MIPI_DSI or LVDS can be supported on SOM, in default configuration MIPI_DSI is supported.
2. Shared between M.2 Connector and 2nd Audio Codec
Figure 1: i.MX 8M Plus Q/QL/D SMARC Development Platform Block Diagram

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2.2 i.MX 8M Plus Q/QL/D SMARC Development Platform Features
The i.MX 8M Plus Q/QL/D SMARC carrier board supports the following features to validate the NXP’s i.MX 8M Plus
Q/QL/D SMARC SOM Edge connector interfaces.
Serial Interface Features
•Debug UART through USB Micro AB Connector
•Data UART x 1 Port through Header
•RS232 UART Interface (Optional)
High Speed Interface Features
•PCIe x 1 Port through x4 connector or M.2 connector 1,2
•USB 3.0 Host x 2 Port through USB 3.0 Type A Connector3
•USB Type C x 1 Port3
Communication Features
•Dual 10/100/1000Mbps Ethernet through dual stack RJ45MagJack
•USB 2.0 Host x 2 Ports through USB 2.0 dual stack USB Type A Connector
•SDHC/SDIO (4bit) x 1 Port through Standard SD Connector
•CAN FD x 2 Port through Header
•USB2.0 OTG Interface (Optional)
Audio & Video Features
•MIPI DSI 4lane Display connector with Capacitive touch
•MIPI CSI 2lane Camera Connector
•HDMI X 1 Port through Type A Connector
•I2S Audio codec with 3.5mm Audio IN and OUT Jack
•LVDS0 Connector (Optional)
•LVDS1 Display Connector
Additional Features
•QSPI and SPI Flash
•RTC Coin Cell holder
•Capacitive Touch Connector
•LVDS Backlight Header
On Board Switches
•Power ON/OFF Switch
•Board Configuration DIP Switch
•Boot Selection DIP Switch

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•Reset Switch
•Force Recovery switch
General Specification
•Power Supply : 12V, 2A Power Input Jack
•Temperature Supported: 0°C to +60°C
•Form Factor : 120mm X 120mm Nano ITX
1.PCIe Channel A can be connected to either M.2 Connector or PETp0 of PCIe X4 connector by using on Board
Switches.
2. At a time, do not set Both the PCIe Channel A & B neither to M.2 connector nor to PCIe X4 connector.
3. Either USB Type C connector or USB 3.0 Type A TOP connector can be supported at a time. Anyone can be selected
using on Board Switches.

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2.3 SMARC MXM Connector
The i.MX 8M Plus Q/QL/D SMARC carrier board supports 314Pin SMARC MXM Edge mating connector for SMARC
SOM attachment. This standard 314-pin robust connector is capable of handling high-speed serialized signals and
can be used for size constrained embedded applications. This SMARC MXM Edge mating connector (J18) is physically
located at the top of the board as shown below.
Figure 2: SMARC MXM Connector

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2.3.1 SMARC PCB Edge Connector Pin Assignment
Table 3: SMARC MXM Connector Pin Assignment
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
SMARC Primary Side
P1
SMB_ALERT#
GPIO_SMB_ALERT_G
PIO5_02
SAI3_MCLK/AJ20
I, 1.8V CMOS
SM Bus Alert#
(interrupt)
Signal through GPIO.
P2
GND
GND
NA
Power
Ground.
P3
CSI1_CK+
MIPI_CSI2_CLK_P
MIPI_CSI2_CLK_P/A2
3
O, MIPI
MIPI CSI2 differential
clock positive.
P4
CSI1_CK-
MIPI_CSI2_CLK_N
MIPI_CSI2_CLK_N/B2
3
O, MIPI
MIPI CSI2 differential
clock negative.
P5
GBE1_SDP
GBE1_PPS_SDP
NA
NA
NC.
P6
GBE0_SDP
GBE0_PPS_SDP
NA
O, 3.3V CMOS
NC
P7
CSI1_RX0+
MIPI_CSI2_D0_P
MIPI_CSI2_D0_P/
A25
O, MIPI
MIPI CSI2 differential
data lane 0 positive.
P8
CSI1_RX0-
MIPI_CSI2_D0_N
MIPI_CSI2_D0_N/
B25
O, MIPI
MIPI CSI2 differential
data lane 0 negative.
P9
GND
GND
NA
Power
Ground.
P10
CSI1_RX1+
MIPI_CSI2_D1_P
MIPI_CSI2_D1_P/
A24
O, MIPI
MIPI CSI2 differential
data lane 1 positive.
P11
CSI1_RX1-
MIPI_CSI2_D1_N
MIPI_CSI2_D1_N/
B24
O, MIPI
MIPI CSI2 differential
data lane 1 negative.
P12
GND
GND
NA
Power
Ground.
P13
CSI1_RX2+
MIPI_CSI2_D2_P
MIPI_CSI2_D2_P/
A22
O, MIPI
MIPI CSI2 differential
data lane 2 positive.
P14
CSI1_RX2-
MIPI_CSI2_D2_N
MIPI_CSI2_D2_N/
B22
O, MIPI
MIPI CSI2 differential
data lane 2 negative.
P15
GND
GND
NA
Power
Ground.
P16
CSI1_RX3+
MIPI_CSI2_D3_P
MIPI_CSI2_D3_P/
A21
O, MIPI
MIPI CSI2 differential
data lane 3 positive.
P17
CSI1_RX3-
MIPI_CSI2_D3_N
MIPI_CSI2_D3_N/
B21
O, MIPI
MIPI CSI2 differential
data lane 3 negative.
P18
GND
GND
NA
Power
Ground.
P19
GBE0_MDI3-
GBE0_MDI3-
NA
IO, GBE
Gigabit Ethernet0
MDI differential
pair 3 negative to
bottom port of Dual
Magjack.
P20
GBE0_MDI3+
GBE0_MDI3+
NA
IO, GBE
Gigabit Ethernet0
MDI differential pair
3 positiveto bottom
port of Dual Magjack.
P21
GBE0_LINK100#
GBE0_LINK100#
NA
I, 3.3V CMOS
Ethernet0 100Mbps
linkstatus LED

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Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
signal to bottom
port of Dual
Magjack.
P22
GBE0_LINK1000#
GBE0_LINK1000#
NA
I, 3.3V CMOS
Gigabit Ethernet0
1000Mbps link status
LED signal.
P23
GBE0_MDI2-
GBE0_MDI2-
NA
IO, GBE
Gigabit Ethernet0
MDI differential
pair 2 negative to
bottom port of Dual
Magjack.
P24
GBE0_MDI2+
GBE0_MDI2+
NA
IO, GBE
Gigabit Ethernet0
MDI differential pair
2 positiveto bottom
port of Dual Magjack.
P25
GBE0_LINK_ACT#
GBE0_LINK_ACT#
NA
I, 3.3V CMOS
Gigabit Ethernet0
activitystatus LED
signal to bottom port
of Dual Magjack.
P26
GBE0_MDI1-
GBE0_MDI1-
NA
IO, GBE
Gigabit Ethernet0
MDI differential
pair 1 negative to
bottom port of Dual
Magjack.
P27
GBE0_MDI1+
GBE0_MDI1+
NA
IO, GBE
Gigabit Ethernet0
MDI differential pair
1 positiveto bottom
port of Dual Magjack.
P28
GBE0_CTREF
VPHY0_DVDDL
NA
I, 3.3V Power
CTREF Power for
Ethernet0 to Centre
Tapof bottom port
of Dual Magjack.
P29
GBE0_MDI0-
GBE0_MDI0-
NA
IO, GBE
Gigabit Ethernet0
MDI differential
pair 0 negative to
bottom port of Dual
Magjack.
P30
GBE0_MDI0+
GBE0_MDI0+
NA
IO, GBE
Gigabit Ethernet0
MDI differential pair
0 positiveto bottom
port of Dual Magjack.
P31
SPI0_CS1#
NC
NA
-
NC.
P32
GND
GND
NA
Power
Ground.

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Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
P33
SDIO_WP
GPIO2_20(SD2_WP)
SD2_WP/AC26
O, 1.8V/3.3V
CMOS
SD write Protect.
P34
SDIO_CMD
SD2_CMD
SD2_CMD/AB28
IO, 1.8/3.3V
CMOS
SD command.
P35
SDIO_CD#
GPIO2_12(SD2_CD_
B)
SD2_CD_B/AD29
O, 1.8V/3.3V
CMOS
SD Card Detect.
P36
SDIO_CK
SD2_CLK
SD2_CLK/ AB29
I, 1.8/3.3V
CMOS
SD Clock.
P37
SDIO_PWR_EN
GPIO2_19(SD2_RESE
T_B)
SD2_RESET_B/
AD28
I, 3.3V CMOS
SD Power enable.
P38
GND
GND
NA
Power
Ground.
P39
SDIO_D0
SD2_DATA0
SD2_DATA0/ AC28
IO, 1.8/3.3V
CMOS
SD data 0.
P40
SDIO_D1
SD2_DATA1
SD2_DATA1/ AC29
IO, 1.8/3.3V
CMOS
SD data 1
P41
SDIO_D2
SD2_DATA2
SD2_DATA2/ AA26
IO, 1.8/3.3V
CMOS
SD data 2
P42
SDIO_D3
SD2_DATA3
SD2_DATA3/ AA25
IO, 1.8/3.3V
CMOS
SD data 3
P43
SPI0_CS0#
ECSPI1_SS0
ECSPI1_SS0/AE20
I, 1.8V CMOS
eCSPI1 Chip Select 0.
P44
SPI0_CK
ECSPI1_SCLK
ECSPI1_SCLK/AF20
I, 1.8V CMOS
eCSPI1 Clock.
P45
SPI0_DIN
ECSPI1_MISO
ECSPI1_MISO/AD2
0
O, 1.8V CMOS
eCSPI1 Master In Slave
Out.
P46
SPI0_DO
ECSPI1_MOSI
ECSPI1_MOSI/AC20
I, 1.8V CMOS
eCSPI1 Master Out
Slave In.
P47
GND
GND
NA
Power
Ground.
P48
SATA_TX+
NC
NA
-
NC.
P49
SATA_TX-
NC
NA
-
NC.
P50
GND
GND
NA
Power
Ground.
P51
SATA_RX+
NC
NA
-
NC.
P52
SATA_RX-
NC
NA
-
NC.
P53
GND
GND
NA
Power
Ground.
P54
SPI1_CS0# /
ESPI_CS0#
/
QSPI_CS0#
ECSPI2_SS0
ECSPI2_SS0/AJ22
I, 1.8V CMOS
eCSPI2 Chip Select 0.
P55
SPI1_CS1# /
ESPI_CS1#
/
QSPI_CS1#
NC
NA
-
eCSPI2 Chip Select 1.
P56
SPI1_CK / ESPI_CK
/ QSPI_CK
ECSPI2_SCLK
ECSPI2_SCLK/AH21
I, 1.8V CMOS
eCSPI2 Clock.
P57
SPI1_DIN /
ESPI_IO_1
/
QSPI_IO_1
ECSPI2_MISO(I2C4_S
CL)
I2C4_SCL/ AF8
IO, 1.8V CMOS
eCSPI2 DATA 0.

i.MX 8M Plus SMARC Development Platform Hardware User Guide
REL1.0
Page 18 of 84
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
P58
SPI1_DO /
ESPI_IO_0
/
QSPI_IO_0
ECSPI2_MOSI
ECSPI2_MOSI/AJ21
IO, 1.8V CMOS
eCSPI2 DATA 1.
P59
GND
GND
NA
Power
Ground.
P60
USB0+
USB0_DP
(Optionally
USB_OTG1_DP)
USB1_D_P/D10
IO, USB HS
NC.
Note: USB Port0
Data Positive to
USB2.0 OTG
connector (J22).
Note: This is optional
feature in SOM.
P61
USB0-
NC
(Optionally
USB_OTG1_D
M)
USB1_D_N/E10
IO, USB HS
NC.
Note: USB Port0
Data Negative to
USB2.0 OTG
connector (J22).
Note: This is optional
feature in SOM.
P62
USB0_EN_OC#
NC
(Optionally
USB1_OTG_OC(GPI
O 1_IO13))
GPIO1_IO13/A6
IO, 3.3V CMOS
NC.
Note: USB Port0
PowerEnable/
Over Current
Indicator.
Note: This is optional
feature in SOM.
P63
USB0_VBUS_DET
NC
(Optionally
VBUS_OTG
1)
NA
O, 5V Power
NC.
Note: USB Port0
OTGVBUS
detection.
Note: This is optional
feature in SOM.
P64
USB0_OTG_ID
NC
(Optionally
USB_OTG1_ID
)
USB1_ID/B11
O, 3.3V CMOS
NC.
Note: USB Port0 OTG
ID.
This is Note: This is
optional feature in
SOM.
P65
USB1+
USB_HUB1OUT_DP
NA
IO, USB HS
USB Port1 Data Plus
Note: Connected to
USBHub
P66
USB1-
USB_HUB1OUT_DM
NA
IO, USB HS
USB Port1 Data Minus
Note: Connected to
USBHub
P67
USB1_EN_OC#
USB_HUB1_OC
NA
O, 3.3V CMOS
USB Port1 Power

i.MX 8M Plus SMARC Development Platform Hardware User Guide
REL1.0
Page 19 of 84
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
Enable/Over Current
Indicator Note:
Connected to USB
Hub.
P68
GND
GND
NA
Power
Ground.
P69
USB2+
USB_HUB2OUT_DP
NA
IO, USB HS
USB Port2 Data Plus
Note: Connected to
USBHub
P70
USB2-
USB_HUB2OUT_DM
NA
IO, USB HS
USB Port2 Data Minus
Note: Connected to
USB Hub
P71
USB2_EN_OC#
USB_HUB1_OC
NA
IO, 3.3V CMOS
USB Port2 Power
Enable/ Over Current
Indicator
Note: Connected to
USB Hub
P71
USB2_EN_OC#
USB_HUB2_OC
NA
O, 3.3V CMOS
USB Port2 Power
Enable/Over Current
Indicator Note:
Connected to USB
Hub
P72
RSVD4
NC
NA
-
NC.
P73
RSVD5
NC
NA
-
NC.
P74
USB3_EN_OC#
USB1_OTG_OC(GPIO
1_IO13)
GPIO1_IO13/A6
O, 3.3V CMOS
USB Port3 Power
Enable/ Over Current
Indicator
KEY
P75
PCIE_A_RST#
GPIO_PCIE_RST(GPI
O1_IO12)
GPIO1_IO12/A5
I, 3.3V CMOS
PCIe Reset.
P76
USB4_EN_OC#
USB_HUB3_OC
NA
O, 3.3V CMOS
USB Port4 Power
Enable/Over Current
Indicator Note:
Connected to USB
Hub
P77
PCIE_B_CKREQ#
NC
NA
NA
NC.
P78
PCIE_A_CKREQ#
NC
(Optional
PCIE_CLKREQ_B(S
AI3_MCLK))
SAI3_MCLK/AJ20
NA
NC.
Note: In SOM
Optionally connected
to PCIE_CLKREQ_B.
P79
GND
GND
NA
Power
Ground.
P80
PCIE_C_REFCK+
NC
PCIE_REF_PAD_CLK_
P/D16
-
NC.
P81
PCIE_C_REFCK-
NC
PCIE_REF_PAD_CLK_
N/E16
-
NC.
P82
GND
GND
NA
Power
Ground.
P83
PCIE_A_REFCK+
PCIE_REFCLK_DP
NA
I, PCIe
PCIe Reference Clock
Positive.

i.MX 8M Plus SMARC Development Platform Hardware User Guide
REL1.0
Page 20 of 84
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/Pin
Number
Signal Type/
Termination
Description
P84
PCIE_A_REFCK-
PCIE_REFCLK_DM
NA
I, PCIe
PCIe Reference Clock
Negative.
P85
GND
GND
NA
Power
Ground.
P86
PCIE_A_RX+
PCIE_RXN_P
PCIE_RXN_P/A14
O, PCIe
PCIe Receive Positive.
P87
PCIE_A_RX-
PCIE_RXN_N
PCIE_RXN_N/B14
O, PCIe
PCIe Receive Negative.
P88
GND
GND
NA
Power
Ground.
P89
PCIE_A_TX+
PCIE_TXN_P
PCIE_TXN_P/A15
I, PCIe
PCIe Transmit Positive.
P90
PCIE_A_TX-
PCIE_TXN_N
PCIE_TXN_N/B15
I, PCIe
PCIe Transmit
Negative.
P91
GND
GND
NA
Power
Ground.
P92
HDMI_D2+/DP1_L
ANE0+
HDMI_TX_D2_P
HDMI_TX2_P/AH27
I, TMDS
HDMI Transceiver 2
Positive to HDMI
Connector.
P93
HDMI_D2-
/DP1_LANE0-
HDMI_TX_D2_N
HDMI_TX2_N/AJ27
I, TMDS
HDMI Transceiver 2
Negative to HDMI
Connector.
P94
GND
GND
NA
Power
Ground.
P95
HDMI_D1+ /
DP1_LANE1+
HDMI_TX_D1_P
HDMI_TX1_P/AH26
I, TMDS
HDMI Transceiver 1
Positive to
HDMI
Connector.
P96
HDMI_D1- /
DP1_LANE1-
HDMI_TX_D1_N
HDMI_TX1_N/ AJ26
I, TMDS
HDMI Transceiver 1
Negative to
HDMI
Connector.
P97
GND
GND
NA
Power
Ground.
P98
HDMI_D0+ /
DP1_LANE2+
HDMI_TX_D0_P
HDMI_TX0_P/AH25
I, TMDS
HDMI Transceiver 0
Positive to HDMI
Connector.
P99
HDMI_D0- /
DP1_LANE2-
HDMI_TX_D0_N
HDMI_TX0_N/AJ25
I, TMDS
HDMI Transceiver 0
Negative to HDMI
Connector.
P100
GND
GND
NA
Power
Ground.
P101
HDMI_CK+ /
DP1_LANE3+
HDMI_TX_CLK_P
HDMI_TXC_P/AH24
I, TMDS
HDMI Transceiver CLK
Positive to
HDMI
Connector.
P102
HDMI_CK- /
DP1_LANE3-
HDMI_TX_CLK_N
HDMI_TXC_N/AJ24
I, TMDS
HDMI Transceiver CLK
Negative to HDMI
Connector.
P103
GND
GND
NA
Power
Ground.
P104
HDMI_HPD /
DP1_HPD
HDMI_TX_HPD
HDMI_HPD/AE22
O, 1.8V CMOS
100K PU
HDMI Hot Plug Detect
from HDMI Connector.