NEC DB2000 User manual

DB2000
Service Manual
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Introduction
This is the Electronic Service Manual for the MP5J1L1 Dual Band GSM Digital
Cellular Telephone from NEC. It contains specific information on repair and
test procedures.
For details on user functions, general operation and installation, please refer
to the User Guide.
The Service Manual is set out in the following sections.
1. Precautions for Repair Work provides general guidelines for
undertaking safe and efficient repair work.
2. Unit Specification provides the technical specifications for the
MP5J1L1 GSM Digital Cellular Telephone.
3. Circuit Description provides functional details of the circuits, block
diagrams and component purpose descriptions.
4. Servicing defines the jigs, fixtures and test configurations required for
servicing the product; and describes the processes of assembly and
disassembly.
5. Troubleshooting provides an aid to fault finding the product. Includes;
using the engineering functions, signal levels and plots at various parts
of the circuit and fault codes.
6. Device Information provides functional information and pin-outs of
most of the semiconductor devices within the HHP.
7. Parts provides information for the ordering of replacement parts.
8. Circuit Diagrams and Board Maps contains all the schematics and
component layout diagrams.
9. Glossary,, terms used in this manual.

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Performance
GeneralGeneral
DB2000 (Standard Battery)
Talktime 150 mins
Standby 300 hours
Dimensions 130 x 45.5 x17.5
Volume 100cc
Weight 130g
SIM Size Plug in SIM
RF power output Class 4 GSM
Transmitting Frequency Range:
Receiving Frequency Range:
TX - RX Duplex Spacing:
Channel Spacing:
Number of Channels:
GSM: 890 - 915 Mhz
PCN: 1710 - 1785 Mhz
GSM: 935 - 960 Mhz
PCN: 1805 - 1880 Mhz
GSM: 45 MHz / PCN: 95Mhz
GSM: 200 Khz / PCN: 200 Khz
GSM: 124 (Numbered 1 to 124)
PCN: 374 (Numbered 512 to 885)

Transmitter (GSM)
Frequency Stability
RF Power Output
Power Levels
Power Control Level 5
Power Control Level 6
Power Control Level 7
Power Control Level 8
Power Control Level 9
Power Control Level 10
Power Control Level 11
Power Control Level 12
Power Control Level 13
Power Control Level 14
Power Control Level 15
Power Control Level 16
Power Control Level 17
Power Control Level 18
Power Control Level 19
TX Frequency Output
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
TX Frequency Calculation (Ftx)
TX UHF VCO Frequency
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
TX UHF VCO Freq. Calculation (Ftuhf)
TX VCO Frequency
Phase Error
Peak Phase Error
RMS Phase Error
< +/- 90Hz
33dBm
11, decrementing in 2dB steps
33dBm +/-2dB
31dBm +/-3dB
29dBm +/-3dB
27dBm +/-3dB
25dBm +/-3dB
23dBm +/-3dB
21dBm +/-3dB
19dBm +/-3dB
17dBm +/-3dB
15dBm +/-3dB
13dBm +/-3dB
11dBm +/-5dB
9dBm +/-5dB
7dBm +/-5dB
5dBm +/-5dB
890.2 MHz
902.4 MHz
914.8 MHz
890 + (ARFCN x 0.2) = Ftx MHz
1160.2 MHz
1172.4 MHz
1184.8 MHz
Ftx + 270 = Ftuhf MHz
270 MHz
< 20 degrees
< 5 degrees

Transmitter (PCN)
Frequency Stability
RF Power Output
Power Levels
Power Control Level 0
Power Control Level 1
Power Control Level 2
Power Control Level 3
Power Control Level 4
Power Control Level 5
Power Control Level 6
Power Control Level 7
Power Control Level 8
Power Control Level 9
Power Control Level 10
Power Control Level 11
Power Control Level 12
Power Control Level 13
Power Control Level 14
Power Control Level 15
TX Frequency Output
Low Channel (Ch 512)
Mid Channel (Ch 699)
High Channel (Ch 885)
TX Frequency Calculation (Ftx)
TX UHF VCO Frequency
Low Channel (Ch 512)
Mid Channel (Ch 699)
High Channel (Ch 885)
TX UHF VCO Freq. Calculation (Ftuhf)
TX VCO Frequency
Phase Error
Peak Phase Error
RMS Phase Error
< +/- 180Hz
30dBm +/-2dB
28dBm +/-3dB
26dBm +/-3dB
24dBm +/-3dB
22dBm +/-3dB
20dBm +/-3dB
18dBm +/-3dB
16dBm +/-3dB
14dBm +/-3dB
12dBm +/-4dB
10dBm +/-4dB
8dBm +/-4dB
6dBm +/-4dB
4dBm +/-4dB
2dBm +/-5dB
0dBm +/-5dB
1710.2 MHz
1747.6 Mhz
1784.8 Mhz
1710.2 + (0.2 x (ARFCN - 512)) = Ftx Mhz
1530.2 Mhz
1567.6 Mhz
1604.8 Mhz
Ftx - 180 = Ftuhf MHz
180 Mhz
< 20 degrees
< 5 degrees

Receiver (GSM)
RX Frequency Input
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
RX Frequency Calculation (Frx)
RX UHF VCO Frequency
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
RX UHF VCO Freq. Calculation (Fruhf)
RX VCO Frequency
Demodulation Frequency
IF Frequency
BER (Bit Error Ratio)
935.2 MHz
947.4 MHz
959.8 MHz
935 + (ARFCN x 0.2) = Frx MHz
1160-1230 MHz
1205.2 MHz
1217.4 MHz
1229.8 MHz
Frx + 270 = Fruhf MHz
540 MHz
270 MHz (540/ 2)
270 MHz
Type II BER <2.4% at -102dBm
Type II BER <0.1% at -15dBm
Receiver (PCN)
RX Frequency Input
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
RX Frequency Calculation (Frx)
RX UHF VCO Frequency
Low Channel (Ch 1)
Mid Channel (Ch 62)
High Channel (Ch 124)
RX UHF VCO Freq. Calculation (Fruhf)
RX VCO Frequency
Demodulation Frequency
IF Frequency
BER (Bit Error Ratio)
1805.2 MHz
1842.6 MHz
1879.8 MHz
Ftx + 95 Mhz = Frx MHz
1535-1610 MHz
1535.2MHz
1572.6 MHz
1609.8 MHz
Frx - 270 = Fruhf MHz
540 MHz
270 MHz (540/ 2)
270 MHz
Type II BER <2.4% at -102dBm
Type II BER <0.1% at -15dBm

Part1 : Receiver
The front end
The RF receive signal (GSM 935Mhz - 960Mhz, PCN 1805Mhz-1880Mhz) is
input via the antenna or coaxial connector S400. The coaxial connector has a
built in switch, which is used to switch between the antenna and auxiliary RF input.
See Fig.1: The Receiver.
The Diplexor IC400 and D400/D401 diode packs are used to control the Tx and
Rx paths. These diodes are enabled by the control signals:- GSM_PRE_ON (Tx),
V_G_LNA (Rx), PCN_PRE_ON (Rx) and V_P_LNA (Tx) respectively. When combined
with the diplexor they provide sufficient protection for the receiver LNA’s from Tx
signals. The receiver front end requires Band Pass Filter’s (BPF) FL303 and FL300
to further protect the LNA’s from out-of-band signals and Tx signals. For the GSM
path the RF signal passes into the BPF FL303, through a matching circuit and into
IC300 #29.
At this stage the signal passes through a LNA within IC300 to improve the signal
to noise characteristics. This LNA is controlled by the enable supply:- V_G_LNA (
derived from IC27-#29) and the output from IC300 #26 is then fed to the input of
BPF-FL302. After this the RF signal is then passed to the Dual Balanced Balun-
L305 for filtering and then fed via balanced outputs to IC300 #13-14 for
conversion into an intermediate frequency (IF).
In the PCN path the RF signal passes through FL300 into a discrete LNA (TR300),
which is controlled by the enable supply:- V_P_LNA (derived from IC27- #30) and
then passed through BPF-FL301 to L305.
The interstage filters provide further out-of-band signal rejection and further image
rejection. The two balanced outputs from L305 are then passed into the
PMB2410 IC300 ready for conversion into an intermediate frequency.

Fig.1: The Receiver
GSM
Mechanical
Switch
External RF
V_G_LNA
FL303 FL302
FL301FL300
27
29
26 13
V_P_LNA
PCN
Diplexer
L305
PCN RX =1805-1880Mhz
GSM RX = 935-960Mhz
17
LNA
LNA
LNA
20 21
FL304
To IF Amp
8 9
RX_ON2
15
PMB2410
(IC300)
RX UHF VCO
GSM UHF VCO = 1205 – 1230Mhz
PCN UHF VCO 1535 – 1610Mhz
270Mhz
The rf signals from L305 form the inputs to the active double-balanced rf mixer of
IC300 #13-#14. These are mixed with the UHF VCO (GSM 1205Mhz-1230Mhz,
PCN 1535Mhz -1610Mhz) which is input to IC300 #17-18. When these two rf
signals are mixed a resultant signal of 270Mhz is produced, this is the
intermediate frequency (IF). The signal RX_ON2 (derived from IC27-#28) is the
control input which enables the mixer. Outputs from the mixer are differential with
the signals phase shifted by + and - 90 degrees. These are then fed into a Dual IF
SAW filter (FL304) and then back into IC300 #8-#9.
The RX IF of 270Mhz has been selected based on the number of image response
and intermodulation products in the IF band, subject also to the constraints that
harmonics of the IF do not fall within any RX and TX band and harmonics of the
13Mhz TCXO do not fall in the IF band.
The differential IF signal is then fed to the IF amplifier, within IC300 (see figure.3:
The IF Amp and demodulator). The gain of the amplifier is controlled by the
Superchip – IC27, using 3 AGC Control lines:
SYGCDT: AGC Programming Data Line (#75)
PGCSTR: AGC Programming Enable Line (#72)
SYGCCL: AGC Programming Clock Line (#74)
These signals are output from IC27 on the logic board. The IF amp can be
programmed to a range of 0dB to 70dB in 2dB steps, some 36 levels.

Fig.2:The UHF Synthesiser (RX)
DIV
65
LOOP
FILTER
PRE-
SCALER
IC201 LMX2331L RF-PLL
(IC202/3)
PHASE
COMPARATOR
IN OUT
32
4
3
5
PHASE
DIFFERENCE
(CURRENT) PHASE
DIFFERENCE
(VOLTAGE)
13MHz
CLK 8
VCCGND
1
NC
V_VC01/2
5
11,12,13
SERLT
SERCK
SERDA
EG :1205Mhz (GSM)
200Khz
200Khz
GND
GND
UHF VCO
UHF Synthesiser (Rx)
The RX & TX UHF Synthesisers are implemented within IC201- LMX2331L. The RX
UHF VCO output is fed to IC201 #5, where it is divided down (via a Prescalar) to a
200khz signal and input to a phase comparator. The phase comparator compares
this signal with a 200khz reference signal (which is derived down from the 13Mhz
clock). A current phase difference signal is produced, which is in turn converted to
a voltage phase difference and filtered at the output on #3, using the loop filter:-
(R205,R206,R207,C215,C216 & C217). This voltage is then applied to the
control input #3 of the UHF VCO (IC202/3). This voltage determines the RX UHF
VCO oscillator frequency, i.e.: RX GSM :1205 -1230Mhz / RX PCN:1535 -
1610Mhz. There are three control inputs for the UHF synthesiser:-
SERDA: Synthesiser Programming Data (#12)
SERCK: Synthesiser Programming Clock (#11)
SERLT:: Synthesiser Programming Enable (#13)
The SERDA input sets and controls the Pre-scalar inside IC201, this is totally
dependant on the chosen traffic channel that is active at the time.

Fig.3:The IF AMP and Demodulator
AGC Control:-PGSTR
SYGCCL
SYGCDT
8-9
PMB2410 (IC300)
RX_ON2
PUPLO2
36
31
TO W2013 (IC100)
(TX IF Modulator)
RINO
540MHz Div2
Div2/3
RINO
RIPO
RQNO
RQPO
45
46
40
39
FL304
23-2420-21
1st IF
270Mhz
270Mhz
First Mixer
Varactor Network
D303 (A,B)
LOOP FILTER
32-35
11,12,13
From (IC201#18) IF PLL (See Fig.4)
GSM_TX
Rx I&Q Demodulator
The modulated IF signal of 270Mhz is demodulated by mixing it with another
270Mhz signal, which is derived from an 540Mhz oscillator located inside IC300.
The 540Mhz is reduced by a pre-selectable divider, which can be set by the
control signal GSM_TX (from IC27#23). The output from the 540Mhz oscillator is
divided down by a factor of 2 or 3 to produce either a 180 or 270Mhz signal,
depending on whether the mobile is in TX or RX modes . It is this signal which is
mixed with that from the IF amplifier to produce the baseband I and Q signals. The
I and Q signals are then buffered and fed differentially to the Superchip (IC27) for
filtering and digitising.
The signal RX_ON2 (from IC27#28) enables both the demodulator and internal
buffers. The signal PUPLO2 which is supplied from IC27 #26, enables the
540Mhz internal oscillator.

Fig.4:The IF Synthesiser (RX)
DIV
13
LOOP
FILTER
DIV 180
IC201 LMX2331L IF-PLL
PHASE
COMPARATOR 23-24
PHASE
DIFFERENCE
(CURRENT) PHASE
DIFFERENCE
(VOLTAGE)
13MHz
CLK 81Mhz 1Mhz
GND
IC300
32
33
34-35
DIV3
18
16
180Mhz 180Mhz
D303B
D303A
DIV2
To RX Demodulator
540Mhz
31 PUPLO2
GSM_TX
GSM_TX =”1”= 180Mhz
GSM_TX =”0”= 270Mhz
2
The RX IF Synthesiser
The IF synthesiser (IF- PLL) is contained within IC201 - LMX2331L. It is used to
tune the 540Mhz TX/RX IF oscillator inside IC300.
The 540Mhz oscillator output is first divided down by a factor of 3 within IC300.
This is achieved by an internal pre-selectable divider, which is set by the signal
GSM_TX from IC27 #23. In receive mode the signal is high, which sets the divider
to 3 so therefore the 540Mhz is reduced to 180 Mhz, which is output on pins #23
and #24. This signal is then fed to #16 of IC201, where it is then divided down by
a factor of 180 to give a 1Mhz signal.
A 1Mhz reference signal derived from the 13Mhz clock is input to the phase
comparator and compared with the 1Mhz signal derived from the 270Mhz signal.
The phase comparator then derives a current phase difference of the two signals
and outputs it to the loop filter on pin #18 of the device.
The loop filter (C218, C219, C220,R202,R204 & L205) then uses the current
phase difference to produce a voltage phase difference and outputs this to the
Varactor network (D303 A/B).
The Varactor network and circuit at #33-35 form part of the 540Mhz oscillator
circuit, which is tuned by the phase voltage applied to the network.
The control signal: PUPLO2 from IC27 #26 is used to switch the 540Mhz signal
ON or OFF.

Part 2 : Transmitter
Fig.5:TRX -The TX IF Modulator W2013 (IC100)
TIPI
TINI
TQPI
TQNI
(1,16,20)
TIF Filter
270MHz
TIF Filter
180MHz
2
3
2v85_rf3
W2013
GND
GND
3V_G_TX
TR106
TR107
5
6
7
4
3V_P_TX
Div2/3
PMB2410 (IC300)
540Mhz Osc
180 - 270Mhz
GSM_TX
To IC101
To IC102
9
Loop Filter
32 IF-PLL
The TX IF Modulator
The TX I & Q signals from IC27 #86-89 are fed to #4-7 of the W2013 TX
modulator (IC100), where they are then modulated onto either a TX IF of 270Mhz
(for GSM- TX) or 180Mhz (for PCN-TX) by the quadrature mixer inside IC100.
The signal TX LO IF (180-270Mhz) is input on #9 of IC100 (W2013) from (IC300)
#24. This signal is produced by the internal 540Mhz oscillator within IC300, which
has been divided down by a factor of 2 for GSM-TX or 3 for PCN-TX. This division
factor is set by the control signal GSM_TX from IC27 #23.
The TX modulated IF signal of 270Mhz is output on #2 of IC100 for GSM or a
modulated IF signal of 180Mhz is output on #3 of IC100 for PCN.
Pre-amp transistors TR106 and TR107 amplify the signal and then pass it through
to BPF’s: FL100 or FL101 for filtering and then after to the RF Mixer’s (IC101 or
IC102).
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