Ublox LISA-U1 Series Quick setup guide

LISA-U1 series
3.75G UMTS/HSPA
Wireless Modules
System Integration Manual
Abstract
This document describes the features and the integration of the
LISA-U1 series HSPA wireless modules.
These modules are a complete and cost efficient 3.75G solution
offering high-speed dual-band HSDPA/HSUPA and quad-band
GSM/GPRS voice and/or data transmission technology in a compact
form factor.
locate, communicate, accelerate
33.2 x 22.4 x 2.7 mm
www.u-blox.com

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3G.G2-HW-10002-3
Page 2 of 125
Document Information
Title
LISA-U1 series
Subtitle
3.75G UMTS/HSPA
Wireless Modules
Document type
System Integration Manual
Document number
3G.G2-HW-10002-3
Document status
Preliminary
Document status information
Objective
Specification
This document contains target values. Revised and supplementary data will be published
later.
Advance
Information
This document contains data based on early testing. Revised and supplementary data will
be published later.
Preliminary
This document contains data from product verification. Revised and supplementary data
may be published later.
Released
This document contains the final product specification.
This document applies to the following products:
Name
Type number
Firmware version
PCN / IN
LISA-U100
LISA-U100-00S-00
10.72
n.a.
LISA-U110
LISA-U110-00S-00
10.72
n.a.
LISA-U120
LISA-U120-00S-00
10.72
n.a.
LISA-U130
LISA-U130-00S-00
10.72
n.a.
This document and the use of any information contained therein, is subject to the acceptance of the u-blox terms and conditions. They
can be downloaded from www.u-blox.com.
u-blox makes no warranties based on the accuracy or completeness of the contents of this document and reserves the right to make
changes to specifications and product descriptions at any time without notice.
u-blox reserves all rights to this document and the information contained herein. Reproduction, use or disclosure to third parties without
express permission is strictly prohibited. Copyright © 2011, u-blox AG.
u-blox®is a registered trademark of u-blox Holding AG in the EU and other countries.

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Preface
u-blox Technical Documentation
As part of our commitment to customer support, u-blox maintains an extensive volume of technical
documentation for our products. In addition to our product-specific technical data sheets, the following manuals
are available to assist u-blox customers in product design and development.
AT Commands Manual: This document provides the description of the supported AT commands by the
LISA-U1 series module to verify all implemented functionalities.
System Integration Manual: This Manual provides hardware design instructions and information on how to
set up production and final product tests.
Application Note: document provides general design instructions and information that applies to all u-blox
Wireless modules. See Section Related documents for a list of Application Notes related to your Wireless
Module.
How to use this Manual
The LISA-U1 series System Integration Manual provides the necessary information to successfully design in and
configure these u-blox wireless modules.
This manual has a modular structure. It is not necessary to read it from the beginning to the end.
The following symbols are used to highlight important information within the manual:
An index finger points out key information pertaining to module integration and performance.
A warning symbol indicates actions that could negatively impact or damage the module.
Questions
If you have any questions about u-blox Wireless Integration, please:
Read this manual carefully.
Contact our information service on the homepage http://www.u-blox.com
Read the questions and answers on our FAQ database on the homepage http://www.u-blox.com
Technical Support
Worldwide Web
Our website (www.u-blox.com) is a rich pool of information. Product information, technical documents and
helpful FAQ can be accessed 24h a day.
By E-mail
Contact the nearest of the Technical Support offices by email. Use our service pool email addresses rather than
any personal email address of our staff. This makes sure that your request is processed as soon as possible. You
will find the contact details at the end of the document.
Helpful Information when Contacting Technical Support
When contacting Technical Support please have the following information ready:
Module type (e.g. LISA-U100) and firmware version
Module configuration
Clear description of your question or the problem
A short description of the application
Your complete contact details

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Contents
Preface ................................................................................................................................3
Contents..............................................................................................................................4
1System description.......................................................................................................7
1.1 Overview .............................................................................................................................................. 7
1.2 Architecture.......................................................................................................................................... 8
1.2.1 Functional blocks........................................................................................................................... 9
1.2.2 Hardware differences between LISA-U1 series modules ............................................................... 10
1.3 Pin-out ............................................................................................................................................... 11
1.4 Operating modes................................................................................................................................ 15
1.5 Power management ........................................................................................................................... 17
1.5.1 Power supply circuit overview...................................................................................................... 17
1.5.2 Module supply (VCC) .................................................................................................................. 18
1.5.3 Current consumption profiles ...................................................................................................... 25
1.5.4 RTC Supply (V_BCKP) .................................................................................................................. 29
1.5.5 Interface supply (V_INT)............................................................................................................... 31
1.6 System functions ................................................................................................................................ 32
1.6.1 Module power on ....................................................................................................................... 32
1.6.2 Module power off ....................................................................................................................... 36
1.6.3 Module reset ............................................................................................................................... 37
1.7 RF connection..................................................................................................................................... 38
1.8 (U)SIM interface.................................................................................................................................. 39
1.8.1 (U)SIM functionality..................................................................................................................... 41
1.9 Serial communication ......................................................................................................................... 42
1.9.1 Serial interfaces configuration ..................................................................................................... 42
1.9.2 Asynchronous serial interface (UART)........................................................................................... 43
1.9.3 USB interface............................................................................................................................... 56
1.9.4 SPI interface ................................................................................................................................ 58
1.9.5 MUX Protocol (3GPP 27.010) ...................................................................................................... 63
1.10 DDC (I2C) interface .......................................................................................................................... 63
1.10.1 Overview ..................................................................................................................................... 63
1.10.2 DDC application circuit................................................................................................................ 64
1.11 Audio Interface (LISA-U120 and LISA-U130 only) ............................................................................ 67
1.11.1 Analog Audio interface ............................................................................................................... 67
1.11.2 Digital Audio interface................................................................................................................. 74
1.11.3 Voiceband processing system ...................................................................................................... 76
1.12 General Purpose Input/Output (GPIO) ............................................................................................. 78
1.12.1 GPIO functions available in upcoming FW version........................................................................ 81
1.13 Reserved pins (RSVD) ...................................................................................................................... 83
1.14 Schematic for LISA-U1 series module integration ............................................................................ 84

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1.15 Approvals........................................................................................................................................ 85
1.15.1 R&TTED and European Conformance CE mark ............................................................................ 85
1.15.2 IC ................................................................................................................................................ 85
1.15.3 Federal communications commission notice ................................................................................ 85
2Design-In.....................................................................................................................88
2.1 Design-in checklist .............................................................................................................................. 88
2.1.1 Schematic checklist ..................................................................................................................... 88
2.1.2 Layout checklist........................................................................................................................... 88
2.1.3 Antenna checklist ........................................................................................................................ 89
2.2 Design Guidelines for Layout .............................................................................................................. 90
2.2.1 Layout guidelines per pin function............................................................................................... 90
2.2.2 Footprint and paste mask ............................................................................................................ 99
2.2.3 Placement ................................................................................................................................. 100
2.3 Thermal aspects................................................................................................................................ 101
2.4 Antenna guidelines........................................................................................................................... 102
2.4.1 Antenna termination ................................................................................................................. 103
2.4.2 Antenna radiation ..................................................................................................................... 104
2.4.3 Antenna detection functionality ................................................................................................ 105
2.5 ESD immunity test precautions ......................................................................................................... 108
2.5.1 General precautions .................................................................................................................. 109
2.5.2 Antenna interface precautions................................................................................................... 110
2.5.3 Module interfaces precautions................................................................................................... 111
3Features description.................................................................................................112
3.1 Firmware (upgrade) Over AT (FOAT) ................................................................................................. 112
3.2 TCP/IP............................................................................................................................................... 112
3.2.1 Multiple PDP contexts and sockets............................................................................................. 112
3.3 FTP ................................................................................................................................................... 112
3.4 FTPS ................................................................................................................................................. 112
3.5 HTTP................................................................................................................................................. 112
3.6 HTTPS............................................................................................................................................... 112
3.7 AssistNow clients and GPS integration .............................................................................................. 113
3.8 Jamming Detection........................................................................................................................... 113
3.9 In-Band modem (LISA-U130 only) ..................................................................................................... 113
3.10 Smart Temperature Management ................................................................................................. 113
3.10.1 Smart Temperature Supervisor (STS) .......................................................................................... 114
3.10.2 Threshold Definitions................................................................................................................. 116
4Handling and soldering ...........................................................................................117
4.1 Packaging, shipping, storage and moisture preconditioning ............................................................. 117
4.2 Soldering .......................................................................................................................................... 117
4.2.1 Soldering paste.......................................................................................................................... 117
4.2.2 Reflow soldering ....................................................................................................................... 117
4.2.3 Optical inspection...................................................................................................................... 119

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4.2.4 Cleaning.................................................................................................................................... 119
4.2.5 Repeated reflow soldering......................................................................................................... 119
4.2.6 Wave soldering.......................................................................................................................... 119
4.2.7 Hand soldering.......................................................................................................................... 119
4.2.8 Rework...................................................................................................................................... 119
4.2.9 Conformal coating .................................................................................................................... 119
4.2.10 Casting...................................................................................................................................... 120
4.2.11 Grounding metal covers ............................................................................................................ 120
4.2.12 Use of ultrasonic processes........................................................................................................ 120
5Product Testing.........................................................................................................121
5.1 u-blox in-series production test......................................................................................................... 121
5.2 Test parameters for OEM manufacturer ............................................................................................ 121
Appendix ........................................................................................................................122
AGlossary ....................................................................................................................122
Related documents.........................................................................................................124
Revision history..............................................................................................................124
Contact............................................................................................................................125

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1System description
1.1 Overview
LISA-U1 wireless modules integrate full-feature 3G UMTS/HSxPA and 2G GSM/GPRS/EDGE protocol stack with
Assisted GPS support. These SMT modules come in the compact LISA form factor, featuring Leadless Chip
Carrier (LCC) packaging technology.
3G UMTS/HSDPA/HSUPA Characteristics
2G GSM/GPRS/EDGE Characteristics
Class A User Equipment1
Class B Mobile Station2
UMTS Terrestrial Radio Access (UTRA) Frequency Division Duplex (FDD)
operating mode
Dual-band support:
Band II (1900 MHz) and Band V (850 MHz) for LISA-U100,
LISA-U120
Band I (2100 MHz) and Band VIII (900 MHz) for LISA-U110,
LISA-U130
Quad-band support
GSM 850 MHz, E-GSM 900 MHz,
DCS 1800 MHz and PCS 1900 MHz
WCDMA/HSDPA/HSUPA
Power Class 3 (24 dBm)
GSM/GPRS
Power Class 4 (33 dBm) for GSM/E-GSM bands
Power Class 1 (30 dBm) for DCS/PCS bands
EDGE
Power Class E2 (27 dBm) for GSM/E-GSM bands
Power Class E2 (26 dBm) for DCS/PCS bands
PS
HSUPA category 6, up to 7.2 Mb/s DL, 5.76 Mb/s UL
HSDPA category 8, up to 7.2 Mb/s DL, 384 kb/s UL
WCDMA data up to 384 kb/s DL/UL
PS
EDGE multislot class 123, coding scheme MCS1-MCS9,
up to 236.8 kb/s
GPRS multislot class 123, coding scheme CS1-CS4, up to
85.6 kb/s
WCDMA CS data up to 64 kb/s DL/UL
CS (Circuit Switched) Data calls are supported in transparent/non
transparent mode up to 9.6 kb/s
Table 1: LISA-U1 UMTS/HSDPA/HSUPA and GSM/GPRS/EDGE characteristics
With GSM/GPRS network operation modes I to III are supported, with user-definable preferred service selectable
from GSM to GPRS. Optionally paging messages for GSM calls can be monitored during GPRS data transfer in
not-coordinating NOM II-III.
LISA-U1 series modules implement GPRS/EGPRS class 12 for data transfer. GPRS class determines the number of
timeslots available for upload and download and thus the speed at which data can be transmitted and received,
with higher classes typically allowing faster data transfer rates. Class 12 implies a maximum of 4 slots in
download (reception) and 4 slots in upload (transmission) with 5 slots in total.
The network automatically configures the number of timeslots used for reception or transmission (voice calls
take precedence over GPRS traffic). The network also automatically configures channel encoding (CS1 to MCS9).
The maximum (E)GPRS bit rate of the mobile station depends on the coding scheme and number of time slots.
Direct Link mode is supported for TCP sockets.
1
Device can work simultaneously in Packet Switch and Circuit Switch mode: voice calls are possible while the data connection is active
without any interruption in service.
2
Device can be attached to both GPRS and GSM services (i.e. Packet Switch and Circuit Switch mode) using one service at a time. If for
example during data transmission an incoming call occurs, the data connection is suspended to allow the voice communication. Once the
voice call has terminated, the data service is resumed.
3
GPRS/EDGE multislot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total. GPRS class
determines the number of timeslots available for upload and download and thus the speed at which data can be transmitted and received,
with higher classes typically allowing faster data transfer rates.

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1.2 Architecture
Wireless
Base-band
Processor
Memory
Power Management Unit
RF
Transceiver
26 MHz
32.768 kHz
SAW
Filter
FEM & 2G PA
ANT
LNA
3G PA
LNA
3G PA
DDC (for GPS)
(U)SIM Card
UART
SPI
USB
GPIO(s)
Power On
External Reset
V_BCKP (RTC)
Vcc (Supply)
V_INT (I/O)
Figure 1: LISA-U100, LISA-U110 block diagram
Wireless
Base-band
Processor
Memory
Power Management Unit
RF
Transceiver
26 MHz
32.768 kHz
SAW
Filter
FEM & 2G PA
ANT
LNA
3G PA
LNA
3G PA
DDC (for GPS)
(U)SIM Card
UART
SPI
USB
GPIO(s)
Power On
External Reset
V_BCKP (RTC)
Vcc (Supply)
V_INT (I/O)
Digital Audio (I2S)
AnalogAudio
Figure 2: LISA-U120, LISA-U130 block diagram

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1.2.1 Functional blocks
LISA-U1 series modules consist of the following internal functional blocks: RF high power front-end, RF
transceiver, Baseband section and Power Management Unit.
RF high-power front-end
A separated shielding box includes the RF high-power signal circuitry, namely:
Front-End Module (FEM) with integrated quad-band 2G Power Amplifier and antenna switch multiplexer
Two single-band 3G HSxPA/WCDMA Power Amplifier modules with integrated duplexers
The RF antenna is directly connected to the FEM, which dispatches the RF signals according to the active mode.
For time-duplex 2G operation, the incoming signal at the active Receiver (RX) slot is applied to integrated SAW
filters for out-of-band rejection and then sent to the appropriate receiver port of the RF transceiver. During the
allocated Transmitter (TX) slots, the low level signal coming from the RF transceiver is enhanced by the 2G power
amplifier module and then directed to the antenna through the FEM. The 3G transmitter and receiver are instead
active at the same time due to frequency-domain duplex operation. The switch integrated in the FEM connects
the antenna port to the passive duplexer which separates the TX and RX signal paths. The duplexer itself
provides front-end RF filtering for RX band selection while combining the amplified TX signal coming from the
fixed gain linear power amplifier.
RF Transceiver
In the same shielding box that includes the RF high-power signal circuitry there are all the low-level analog RF
components, namely:
Dual-band HSxPA/WCDMA and quad-band EDGE/GPRS/GSM transceiver
Voltage Controlled Temperature Compensated 26 MHz Crystal Oscillator (VC-TCXO)
Low Noise Amplifier (LNA) and SAW RF filters for 2G and 3G receivers
While operating in 3G mode, the RF transceiver performs direct up-conversion and down-conversion of the
baseband I/Q signals, with the RF voltage controlled gain amplifier being used to set the uplink TX power. In the
downlink path, the external LNA enhances the RX sensitivity while discrete inter-stage SAW filters additionally
improve the rejection of out-of-band blockers. An internal programmable gain amplifier optimizes the signal
levels before delivering to the analog I/Q to baseband for further digital processing.
For 2G operations, a constant gain direct conversion receiver with integrated LNAs and highly linear RF
quadrature demodulator are used to provide the same I/Q signals to baseband as well. In transmit mode, the
up-conversion is implemented by means of a digital sigma-delta transmitter or polar modulator depending on
the modulation to be transmitted.
In all the modes, a fractional-N sigma-delta RF synthesizer and an on-chip 3.296-4.340 GHz voltage controlled
oscillator are used to generate the local oscillator signal.
The frequency reference to RF oscillators is provided by the 26 MHz VC-TCXO. The same signal is buffered to the
baseband as a master reference for clock generation circuits while operating in active mode.
Modulation techniques
Modulation techniques related to the radio technologies this module supports, are listed as follows:
GSM GSMK
GPRS GMSK
EDGE GMSK / 8-PSK
WCDMA QPSK
HSDPA QPSK / 16-QAM
HSUPA QPSK / 16-QAM

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Baseband section and power management unit
Another shielding box includes all the digital circuitry and the power supplies, basically the following functional
blocks:
Wireless baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions, 2G & 3G upper layer software
DSP core for 2G Layer 1 and audio processing
3G coprocessor and HW accelerator for 3G Layer 1 control software and routines
Dedicated HW for peripherals control, as UART, USB, SPI etc
Memory system in a Multi-Chip Package (MCP) integrating two devices:
NOR flash non-volatile memory
DDR SRAM volatile memory
Power Management Unit (PMU), used to derive all the system supply voltages from the module supply VCC
32.768 kHz crystal, connected to the Real Time Clock (RTC) oscillator to provide the clock reference in idle or
power off mode
1.2.2 Hardware differences between LISA-U1 series modules
Hardware differences between the LISA-U1 series modules:
3G Dual-band support:
Band II (1900 MHz) and Band V (850 MHz) are supported by LISA-U100, LISA-U120
Band I (2100 MHz) and Band VIII (900 MHz) are supported by LISA-U110, LISA-U130
3G maximum data rate capabilities:
HSUPA category 6, up to 7.2 Mb/s DL, 5.76 Mb/s UL
HSDPA category 8, up to 7.2 Mb/s DL, 384 kb/s UL
Audio support:
One differential analog audio input, one differential analog audio output and one 4-wire digital audio
interface are supported by LISA-U120 and LISA-U130
No analog audio input, no analog audio output and no digital audio interface are supported by
LISA-U100, LISA-U110

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1.3 Pin-out
Table 2 lists the pin-out of the LISA-U1 series modules, with pins grouped by function.
Function
Pin
No
I/O
Description
Remarks
Power
VCC
61, 62, 63
I
Module Supply
Clean and stable supply is required: low ripple and
low voltage drop must be guaranteed.
Voltage provided has to be always above the
minimum limit of the operating range.
Consider that there are large current spikes in
connected mode, when a GSM call is enabled.
VCC pins are internally connected, but all the
available pads must be connected to the external
supply in order to minimize power loss due to
series resistance.
See section 1.5.2
GND
1, 3, 6, 7,
8, 17, 25,
28, 29, 30,
31, 32, 33,
34, 35, 36,
37, 38, 60,
64, 65, 66,
67, 69, 70,
71, 72, 73,
75, 76
N/A
Ground
GND pins are internally connected but a good
(low impedance) external ground connection can
improve RF performance: all GND pins must be
externally connected to ground.
V_BCKP
2
I/O
Real Time Clock supply
input/output
V_BCKP = 2.3 V (typical) generated by the module
when VCC supply voltage is within valid operating
range.
See section 1.5.4
V_INT
4
O
Digital I/O Interfaces
supply output
V_INT = 1.8V (typical) generated by the module
when it is switched-on and the RESET_N (external
reset input pin) is not forced to the low level.
See section 1.5.5
VSIM
50
O
SIM supply output
VSIM = 1.80 V typical or 2.90 V typical generated
by the module according to the SIM card type.
See section 1.8
RF
ANT
68
I/O
RF antenna interface
50 nominal impedance.
See section 1.7, section 2.4 and section 2.2.1.1
SIM
SIM_IO
48
I/O
SIM data
Internal 4.7 k pull-up to VSIM.
Must meet SIM specifications.
See section 1.8
SIM_CLK
47
O
SIM clock
Must meet SIM specifications.
See section 1.8
SIM_RST
49
O
SIM reset
Must meet SIM specifications.
See section 1.8
SPI
SPI_MISO
57
O
SPI Data Line.
Master Input,
Slave Output
Module Output: module runs as an SPI slave.
Shift data on rising clock edge (CPHA=1).
Latch data on falling clock edge (CPHA=1).
Idle high.
See section 1.9.4
SPI_MOSI
56
I
SPI Data Line.
Master Output,
Slave Input
Module Input: module runs as an SPI slave.
Shift data on rising clock edge (CPHA=1).
Latch data on falling clock edge (CPHA=1).
Idle high.
Internal active pull-up to V_INT (1.8 V) enabled.
See section 1.9.4
SPI_SCLK
55
I
SPI Serial Clock.
Master Output,
Slave Input
Module Input: module runs as an SPI slave.
Idle low (CPOL=0).
Internal active pull-down to GND enabled.
See section 1.9.4

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Function
Pin
No
I/O
Description
Remarks
SPI_SRDY
58
O
SPI Slave Ready to
transfer control line.
Master Input,
Slave Output
Module Output: module runs as an SPI slave.
Idle low.
See section 1.9.4
SPI_MRDY
59
I
SPI Master Ready to
transfer control line.
Master Output,
Slave Input
Module Input: module runs as an SPI slave.
Idle low.
Internal active pull- down to GND enabled.
See section 1.9.4
DDC
SCL
45
O
I2C bus clock line
Fixed open drain. External pull-up required.
See section 1.10
SDA
46
I/O
I2C bus data line
Fixed open drain. External pull-up required.
See section 1.10
UART
RxD
16
O
UART received data
Circuit 104 (RxD) in ITU-T V.24.
Provide access to the pin for FW update and
debugging if the USB interface is connected to the
application processor.
See section 1.9.2
TxD
15
I
UART transmitted data
Circuit 103 (TxD) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for FW update and
debugging if the USB interface is connected to the
application processor.
See section 1.9.2
CTS
14
O
UART clear to send
Circuit 106 (CTS) in ITU-T V.24.
Provide access to the pin for debugging if the USB
interface is connected to the application processor.
See section 1.9.2
RTS
13
I
UART ready to send
Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
Provide access to the pin for debugging if the USB
interface is connected to the application processor.
See section 1.9.2
DSR
9
O
UART data set ready
Circuit 107 (DSR) in ITU-T V.24.
See section 1.9.2
RI
10
O
UART ring indicator
Circuit 125 (RI) in ITU-T V.24.
See section 1.9.2
DTR
12
I
UART data terminal
ready
Circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up to V_INT (1.8 V) enabled.
See section 1.9.2
DCD
11
O
UART data carrier detect
Circuit 109 (DCD) in ITU-T V.24.
See section 1.9.2
GPIO
GPIO1
20
I/O
GPIO
See section 1.12
GPIO2
21
I/O
GPIO
See section 1.12
GPIO3
23
I/O
GPIO
See section 1.12
GPIO4
24
I/O
GPIO
See section 1.12
GPIO5
51
I/O
GPIO
See section 1.12
USB
VUSB_DET
18
I
USB detect input
Input for VBUS (5 V typical) USB supply sense to
enable USB interface.
Provide access to the pin for FW update and
debugging if the USB interface is not connected to
the application processor.
See section 1.9.3

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Function
Pin
No
I/O
Description
Remarks
USB_D-
26
I/O
USB Data Line D-
90 Ωnominal differential impedance
Pull-up or pull-down resistors and external series
resistors as required by the USB 2.0 high-speed
specification [7] are part of the USB pad driver and
need not be provided externally.
Provide access to the pin for FW update and
debugging if the USB interface is not connected to
the application processor.
See section 1.9.3
USB_D+
27
I/O
USB Data Line D+
90 Ωnominal differential impedance
Pull-up or pull-down resistors and external series
resistors as required by the USB 2.0 high-speed
specification [7] are part of the USB pad driver and
need not be provided externally.
Provide access to the pin for FW update and
debugging if the USB interface is not connected to
the application processor.
See section 1.9.3
System
PWR_ON
19
I
Power-on input
PWR_ON pin has high input impedance.
Do not keep floating in noisy environment:
external pull-up required.
See section 1.6.1
RESET_N
22
I
External reset input
Internal 10 kΩpull-up to V_BCKP (2.3 V).
See section 1.6.3
Audio
(LISA-U120,
LISA-U130
versions only)
I2S_CLK
43
O
I2S clock
Check device specifications to ensure compatibility
to module supported modes.
See section 1.11.2.
I2S_RXD
44
I
I2S receive data
Internal active pull-up to V_INT (1.8 V) enabled.
Check device specifications to ensure compatibility
to module supported modes.
See section 1.11.2.
I2S_TXD
42
O
I2S transmit data
Check device specifications to ensure compatibility
to module supported modes.
See section 1.11.2.
I2S_WA
41
O
I2S word alignment
Check device specifications to ensure compatibility
to module supported modes.
See section 1.11.2.
MIC_N
39
I
Differential analog
audio input (negative)
Differential analog input shared for all analog path
modes: handset, headset, hands-free mode.
Internal DC blocking capacitor.
See section 1.11.1
MIC_P
40
I
Differential analog
audio input (positive)
Differential analog input shared for all analog path
modes: handset, headset, hands-free mode.
Internal DC blocking capacitor.
See section 1.11.1
SPK_P
53
O
Differential analog
audio output (positive)
Differential analog audio output shared for all
analog path modes: earpiece, headset and
loudspeaker mode.
See section 1.11.1
SPK_N
54
O
Differential analog
audio output (negative)
Differential analog audio output shared for all
analog path modes: earpiece, headset and
loudspeaker mode.
See section 1.11.1
Reserved
RSVD
5
N/A
RESERVED pin
This pin must be connected to ground
See section 1.13
RSVD
52
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
74
N/A
RESERVED pin
Do not connect
See section 1.13

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Function
Pin
No
I/O
Description
Remarks
Reserved
(LISA-U100,
LISA-U110
versions only)
RSVD
43
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
44
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
42
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
41
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
39
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
40
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
53
N/A
RESERVED pin
Do not connect
See section 1.13
RSVD
54
N/A
RESERVED pin
Do not connect
See section 1.13
Table 2: LISA-U1 series modules pin-out

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1.4 Operating modes
LISA-U1 series modules have several operating modes. Table 3 summarizes the various operating modes and
provides general guidelines for operation.
Operating Mode
Description
Features / Remarks
Transition condition
General Status: Power-down
Not-Powered
Mode
VCC supply not present or
below operating range.
Microprocessor switched off
(not operating).
RTC only operates if supplied
through V_BCKP pin.
Module is switched off.
Application interfaces are not
accessible.
Internal RTC timer operates only if a
valid voltage is applied to V_BCKP pin.
Module cannot be switched on by a
falling edge provided on the PWR_ON
input, or by a preset RTC alarm or by a
rising edge provided on the RESET_N
input.
Module can be switched on applying
VCC supply.
Power-Off Mode
VCC supply within operating
range.
Microprocessor switched off
(not operating).
Only RTC runs.
Module is switched off: normal
shutdown after sending the
AT+CPWROFF command (refer to
u-blox AT Commands Manual [2]).
Application interfaces are not
accessible.
Only the internal RTC timer in
operation.
Module can be switched on by a falling
edge on the PWR_ON input, or by a
rising edge on the RESET_N input, or by
a preset RTC alarm.
General Status: Normal Operation
Idle-Mode
Microprocessor runs with
32 kHz as reference oscillator.
Module does not accept data
signals from an external
device.
If power saving is enabled, the module
automatically enters idle mode whenever
possible.
Application interfaces are disabled.
If hardware flow control is enabled, the
CTS line to ON state indicates that the
module is in active mode and the UART
interface is enabled: the line is driven in
the OFF state when the module is not
prepared to accept data by the UART
interface.
If hardware flow control is disabled, the
CTS line is fixed to ON state.
Module by default is not set to
automatically enter idle mode whenever
possible, unless power saving
configuration is enabled by appropriate
AT command (refer to u-blox AT
Commands Manual [2], AT+UPSV).
Module enters automatically idle mode
when power saving is enabled and there
is no activity for the defined time
interval:
Module registered with the
network and power saving
enabled. Periodically wakes up to
active mode to monitor the paging
channel for the paging block
reception according to network
indication
Module not registered with the
network and power saving is
enabled. Periodically wakes up to
monitor external activity
Module wakes up from idle-mode to
active-mode in the following events:
Incoming voice or data call
RTC alarm occurs
Data received on UART interface
(refer to 1.9.2)
RTS input line set to the ON state
by the DTE if the AT+UPSV=2
command is sent to the module
(refer to 1.9.2)
USB detection, applying 5 V (typ.)
to the VUSB_DET pin
The connected USB host forces a
remote wakeup of the module as
USB device (refer to 1.9.3)
The connected SPI master indicates
to the module that it is ready for
transmission or reception, by the
IPC SPI_MRDY signal (refer to
1.9.4)

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Operating Mode
Description
Features / Remarks
Transition condition
Active-Mode
Microprocessor runs with
26 MHz as reference
oscillator.
The module is prepared to
accept data signals from an
external device.
Module is switched on and is fully active.
The application interfaces are enabled,
unless power saving configuration is
enabled by the AT+UPSV command
(refer to sections 1.9.2.3, 1.9.3.2, 1.9.4.2
and u-blox AT Commands Manual [2]).
Power saving is not enabled by default: it
can be enabled by the AT+UPSV
command (see u-blox AT Commands
Manual [2])
If power saving is enabled, the module
automatically enters idle mode and
application interfaces are disabled
whenever possible (refer to sections
1.9.2.3, 1.9.3.2, 1.9.4.2 and u-blox AT
Commands Manual [2], AT+UPSV).
Connected-Mode
Voice or data call enabled.
Microprocessor runs with
26 MHz as reference
oscillator.
The module is prepared to
accept data signals from an
external device.
The module is switched on and a voice
call or a data call (2G/3G) is in progress.
Module is fully active.
The application interfaces are enabled,
unless power saving configuration is
enabled by the AT+UPSV command (see
section 1.9.2.3, 1.9.3.2, 1.9.4.2 and the
u-blox AT Commands Manual [2]).
When call terminates, the module
returns to the active operating mode.
Table 3: Module operating modes summary
Transition between the different modes is described in Figure 3.
Switch ON:
•Apply VCC
If power saving is enabled
and there is no activity for
a defined time interval
Any wake up event described
in the module operating
modes summary table above
AT+CPWROFF
(no HW pin)
Incoming/outgoing call or
other dedicated device
network communication
Call terminated,
communication dropped
Remove VCC
Switch ON:
•PWR_ON
•RESET_N
•RTC Alarm
Not
powered
Power off
ActiveConnected Idle
Figure 3: Operating modes transition

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1.5 Power management
1.5.1 Power supply circuit overview
LISA-U1 series modules feature a power management concept optimized for the most efficient use of supplied
power. This is achieved by hardware design utilizing a power efficient circuit topology (Figure 4), and by power
management software controlling the module’s power saving mode.
Baseband Processor
2G Power Amplifier
Switching
Step-Down
LISA-U1 series
5 x 10 µF
61
VCC
62
VCC
63
VCC
50
VSIM
2
V_BCKP
4
V_INT
2 x 3G Power Amplifier(s)
Linear
LDO
Linear
LDO
Switching
Step-Down
Linear
LDO
Linear
LDO
Linear
LDO
I/O
EBU
CORE
Analog
SIM
RTC
NOR Flash
DDR SRAM
RF Transceiver
Memory
Power Management Unit
22 µF 10 µF 220 nF
Figure 4: Power management simplified block diagram
Pins with supply function are reported in Table 4, Table 8 and Table 10.
LISA-U1 series modules must be supplied via the VCC pins. There is only one main power supply input, available
on the three VCC pins that must be all connected to the external power supply
The VCC pins are directly connected to the RF power amplifiers and to the integrated Power Management Unit
(PMU) within the module: all supply voltages needed by the module are generated from the VCC supply by
integrated voltage regulators.

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V_BCKP is the Real Time Clock (RTC) supply. When the VCC voltage is within the valid operating range, the
internal PMU supplies the Real Time Clock and the same supply voltage will be available to the V_BCKP pin. If
the VCC voltage is under the minimum operating limit (for example, during not powered mode), the Real Time
Clock can be externally supplied via the V_BCKP pin (see section 1.5.4).
When a 1.8 V or a 3 V SIM card type is connected, LISA-U1 series modules automatically supply the SIM card via
the VSIM pin. Activation and deactivation of the SIM interface with automatic voltage switch from 1.8 to 3 V is
implemented, in accordance to the ISO-IEC 7816-3 specifications.
The same voltage domain used internally to supply the digital interfaces is also available on the V_INT pin, to
allow more economical and efficient integration of the LISA-U1 series modules in the final application.
The integrated Power Management Unit also provides the control state machine for system start up and system
reset control.
1.5.2 Module supply (VCC)
The LISA-U1 series modules must be supplied through the VCC pins by a DC power supply. Voltages must be
stable: during operation, the current drawn from VCC can vary by some orders of magnitude, especially due to
surging consumption profile of the GSM system (described in the section 1.5.3). It is important that the system
power supply circuit is able to support peak power (refer to LISA-U1 series Data Sheet [1] for specification).
Name
Description
Remarks
VCC
Module power supply input
VCC pins are internally connected, but all the available pads
must be connected to the external supply in order to
minimize the power loss due to series resistance.
Clean and stable supply is required: low ripple and low
voltage drop must be guaranteed.
Voltage provided must always be above the minimum limit of
the operating range.
Consider that during a GSM call there are large current spikes
in connected mode.
GND
Ground
GND pins are internally connected but a good (low
impedance) external ground can improve RF performance: all
available pads must be connected to ground.
Table 4: Module supply pins
VCC pins ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-A114F). Higher
protection level can be required if the line is externally accessible on the application board. Higher
protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor
array) on the line connected to this pin.
The voltage provided to the VCC pins must be within the normal operating range limits as specified in the
LISA-U1 series Data Sheet [1]. Complete functionality of the module is only guaranteed within the specified
minimum and maximum VCC voltage operating range.
Ensure that the input voltage at the VCC pins never drops below the minimum limit of the operating
range when the module is switched on. This is the case even during a GSM transmit burst, where the
current consumption can rise up to minimum peaks of 2.5 A in case of a mismatched antenna load.
Operation above the operating range maximum limit is not recommended and extended
exposure beyond it may affect device reliability.

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Stress beyond the VCC absolute maximum ratings can cause permanent damage to the
module: if necessary, voltage spikes beyond VCC absolute maximum ratings must be restricted
to values within the specified limits by using appropriate protection.
When designing the power supply for the application, pay specific attention to power losses and
transients. The DC power supply must be able to provide a voltage profile to the VCC pins with the
following characteristics:
Voltage drop during transmit slots must be lower than 400 mV
No undershoot or overshoot at the start and at the end of transmit slots
Voltage ripple during transmit slots must be minimized:
lower than 70 mVpp if fripple ≤200 kHz
lower than 10 mVpp if 200 kHz < fripple ≤400 kHz
lower than 2 mVpp if fripple > 400 kHz
Time
undershoot
overshoot
ripple
ripple
drop
Voltage
3.8 V
(typ)
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
GSM frame
4.615 ms
(1 frame = 8 slots)
Figure 5: Description of the VCC voltage profile versus time during a GSM call
Any degradation in power supply performance (due to losses, noise or transients) will directly affect the
RF performance of the module since the single external DC power source indirectly supplies all the
digital and analog interfaces, and also directly supplies the RF power amplifier (PA).
The voltage at the VCC pins must ramp from 2.5 V to 3.2 V within 1 ms. This VCC slope allows a proper
switch on of the module, that is switched on when the voltage rises to the VCC operating range starting
from a voltage value lower than 2.25 V.
1.5.2.1 VCC application circuits
LISA-U1 series modules must be supplied through the VCC pins by one (and only one) proper DC power supply
that must be one of the following:
Switching regulator
Low Drop-Out (LDO) linear regulator
Rechargeable Li-Ion battery
Primary (disposable) battery

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Main Supply
Available?
Battery
Li-Ion 3.7 V
Linear LDO
Regulator
Main Supply
Voltage
>5 V?
Switching
Step-Down
Regulator
No, portable device
No, less than 5 V
Yes, greater than 5 V
Yes, always available
Figure 6: VCC supply concept selection
The switching step-down regulator is the typical choice when the available primary supply source has a nominal
voltage much higher (e.g. greater than 5 V) than the LISA-U1 series modules operating supply voltage. The use
of switching step-down provides the best power efficiency for the overall application and minimizes current
drawn from the main supply source.
The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low voltage (e.g.
less than 5 V). In this case the typical 90% efficiency of the switching regulator will diminish the benefit of
voltage step-down and no true advantage will be gained in input current savings. On the opposite side, linear
regulators are not recommended for high voltage step-down as they will dissipate a considerable amount of
energy in thermal power.
If LISA-U1 series modules are deployed in a mobile unit where no permanent primary supply source is available,
then a battery will be required to provide VCC. A standard 3-cell Lithium-Ion battery pack directly connected to
VCC is the usual choice for battery-powered devices. During charging, batteries with Ni-MH chemistry typically
reach a maximum voltage that is above the maximum rating for VCC, and should therefore be avoided.
The use of primary (not rechargeable) battery is uncommon, since the most cells available are seldom capable of
delivering the burst peak current for a GSM call due to high internal resistance.
Keep in mind that the use of batteries requires the implementation of a suitable charger circuit (not included in
LISA-U1 series modules). The charger circuit should be designed in order to prevent over-voltage on VCC beyond
the upper limit of the absolute maximum rating.
The following sections highlight some design aspects for each of the supplies listed above.
Switching regulator
The characteristics of the switching regulator connected to VCC pins should meet the following requirements:
Power capability: the switching regulator with its output circuit must be capable of providing a voltage
value to the VCC pins within the specified operating range and must be capable of delivering 2.5 A current
pulses with 1/8 duty cycle to the VCC pins
Low output ripple: the switching regulator together with its output circuit must be capable of providing a
clean (low noise) VCC voltage profile
High switching frequency: for best performance and for smaller applications select a switching frequency
≥600 kHz (since L-C output filter is typically smaller for high switching frequency). The use of a switching
regulator with a variable switching frequency or with a switching frequency lower than 600 kHz must be
carefully evaluated since this can produce noise in the VCC voltage profile and therefore negatively impact
GSM modulation spectrum performance. An additional L-C low-pass filter between the switching regulator