Ublox ODIN-W2 Series Quick setup guide

UBX-14040040 - R20
C1-Public www.u-blox.com
ODIN-W2 series
Stand-alone multiradio modules with
Wi-Fi and Bluetooth
System integration manual

Abstract
This document describes the system integration of ODIN-W2 series
multiradio modules. The
ODIN-W2 module is a compact, stand-alone, dual-band Wi-Fi, Bluetooth®dual-
mode (Bluetooth
BR/EDR v2.1 and Bluetooth Low Energy v4.0), multiradio module designed for Internet-of-Things
gateway applications.

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Document information
Title ODIN-W2 series
Subtitle Stand-alone multiradio modules with
Wi-Fi and Bluetooth
Document type System integration manual
Document number UBX-14040040
Revision and date R20 21-Sep-2020
Disclosure restriction C1-Public
Document status explanation
Draft For functional testing. Revised and supplementary data will be published later.
Objective Specification Target values. Revised and supplementary data will be published later.
Advance Information Data based on early testing. Revised and supplementary data will be published later.
Early Production Information Data from product verification. Revised and supplementary data may be published later.
Production Information Document contains the final product specification.
This document applies to the following products:
Product name
ODIN-W260
ODIN-W262
ODIN-W263
☞For information about the hardware, software, and current status of the available product types,
see the ODIN-W2 data sheet [2].

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Contents
Document information .............................................................................................................................2
Contents .......................................................................................................................................................3
1System description ............................................................................................................................6
1.1 Overview and applications ........................................................................................................................6
1.1.1Module architecture...........................................................................................................................8
1.1.2 Radio interfaces ..................................................................................................................................8
1.1.3 Host processor ....................................................................................................................................8
1.1.4 Radio modes ........................................................................................................................................9
1.1.5 u-blox connectivity software ............................................................................................................9
1.1.6 Mbed™...................................................................................................................................................9
1.2 Pin configuration and function.................................................................................................................9
1.2.1 Pin attributes.......................................................................................................................................9
1.2.2 Pin description...................................................................................................................................10
1.3 Supply interfaces ......................................................................................................................................13
1.3.1 Main supply inputs ...........................................................................................................................13
1.3.2 Generic digital interfaces supply output (V_INT).......................................................................14
1.4 System function interfaces ....................................................................................................................14
1.4.1 Module reset ......................................................................................................................................14
1.4.2 External low power clock for power saving modes.....................................................................14
1.4.3 System input and output signals..................................................................................................14
1.4.4 Restoring default configuration ....................................................................................................15
1.5 Data communication interfaces ............................................................................................................15
1.5.1 Universal asynchronous serial interface (UART) .......................................................................15
1.5.2 Ethernet (RMII+SMI) ........................................................................................................................15
1.5.3 Mbed Data communication interfaces ........................................................................................16
1.6 Antenna interfaces...................................................................................................................................17
1.6.1 Antenna connectors.........................................................................................................................17
1.6.2 Internal antenna................................................................................................................................17
1.7 GPIO pins.....................................................................................................................................................18
1.8 Reserved pins (RSVD) ..............................................................................................................................18
1.9 GND pins .....................................................................................................................................................18
2Software ............................................................................................................................................. 19
2.1 Flashing the u-blox connectivity software...........................................................................................19
2.1.1 Flashing using s-center...................................................................................................................19
2.1.2 Software update using AT command...........................................................................................20
2.1.3 Software update using rescue mode............................................................................................20
2.1.4 XMODEM protocol ............................................................................................................................21
2.2 Flashing the u-blox bootloader...............................................................................................................21
2.2.1 ROM based bootloader ....................................................................................................................21
2.2.2 SWD/JTAG debugger ......................................................................................................................21

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2.3 Flashing an Arm Mbed application........................................................................................................21
2.3.1 ROM based bootloader ....................................................................................................................21
2.3.2 SWD/JTAG debugger ......................................................................................................................22
3Design-in............................................................................................................................................. 23
3.1 Overview......................................................................................................................................................23
3.2 Antenna interface design........................................................................................................................23
3.2.1 Antenna connectors.........................................................................................................................23
3.2.2 Internal antenna design ..................................................................................................................24
3.3 Supply interfaces ......................................................................................................................................24
3.3.1 Module supply design ......................................................................................................................24
3.3.2 Generic digital interfaces supply output (V_INT) design..........................................................25
3.4 Data communication interfaces ............................................................................................................25
3.4.1 Asynchronous serial interface (UART) design............................................................................25
3.4.2 Ethernet (RMII+SMI) ........................................................................................................................25
3.5 Other interface and notes .......................................................................................................................25
3.5.1 Low power clock (LPO_CLK) design..............................................................................................25
3.6 General High Speed layout guidelines ..................................................................................................25
3.6.1 General considerations for schematic design and PCB floor-planning.................................26
3.6.2 Module placement ............................................................................................................................26
3.6.3 Layout and manufacturing.............................................................................................................26
3.7 Module footprint and paste mask .........................................................................................................27
3.8 Thermal guidelines ...................................................................................................................................27
3.8.1 Thermal protection...........................................................................................................................28
3.8.2 Heat dissipation................................................................................................................................28
3.9 ESD guidelines ...........................................................................................................................................28
3.10Schematic for ODIN-W2 ..........................................................................................................................28
4Handling and soldering................................................................................................................... 30
4.1 Packaging, shipping, storage and moisture preconditioning ..........................................................30
4.2 Handling......................................................................................................................................................30
4.3 Soldering .....................................................................................................................................................31
4.3.1 Solder paste.......................................................................................................................................31
4.3.2 Reflow soldering................................................................................................................................31
4.3.3 Optical inspection.............................................................................................................................32
4.3.4 Cleaning ..............................................................................................................................................32
4.3.5 Repeated reflow soldering ..............................................................................................................33
4.3.6 Wave soldering..................................................................................................................................33
4.3.7 Hand soldering ..................................................................................................................................33
4.3.8 Rework ................................................................................................................................................33
4.3.9 Conformal coating............................................................................................................................33
4.3.10 Casting................................................................................................................................................33
4.3.11 Grounding metal covers ..................................................................................................................33
4.3.12 Use of ultrasonic processes ...........................................................................................................33

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5Qualifications and approvals ........................................................................................................ 34
6Product testing................................................................................................................................. 35
6.1 u-blox In-Series production test.............................................................................................................35
6.2 OEM manufacturer production test .....................................................................................................35
6.2.1 “Go/No go” tests for integrated devices ......................................................................................36
Appendix .................................................................................................................................................... 37
AGlossary .............................................................................................................................................. 37
BChecklist............................................................................................................................................. 38
B.1 Schematic checklist........................................................................................................................ 38
B.2 Layout checklist ............................................................................................................................... 38
CXMODEM code example ................................................................................................................. 39
Related documents ................................................................................................................................ 41
Revision history ....................................................................................................................................... 42
Contact....................................................................................................................................................... 43

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1System description
1.1 Overview and applications
The ODIN-W2 is a compact and powerful stand-alone multiradio module, designed for
Internet-of-Things gateway applications. The module includes an embedded Bluetooth stack, Wi-Fi
driver, IP stack, and an application for wireless data transfer, all configurable using AT commands.
The wireless support includes dual-mode Bluetooth v4.0 (BR/EDR and low energy) and dual-band Wi-
Fi (2.4 and 5 GHz bands).
The module supports point-to-point and point-to-multipoint configurations and can have concurrent
Bluetooth and Wi-Fi connections. It can operate in Wireless Multidrop™ or Extended Data Mode for
advanced multipoint capabilities. Operation in Point-to-Point Protocol (PPP) mode gives the host a
UART-based IP interface for advanced use cases. The software provides support for RMII with a micro
Access Point.
Additionally, interfaces like SPI, I2C, CAN, and ADC are made available through the software libraries
provided by the Arm Mbed development tool.

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Table 1: Key features of ODIN-W2 series
ODIN
-W260
ODIN
-W262/
ODIN-W263

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1.1.1 Module architecture
Figure 1: Block diagram of ODIN-W2 series
1.1.2 Radio interfaces
The radio frequency (RF) section contains an RF transceiver, RF switches, RF filters, RF diplexer and
a high tolerance crystal oscillator. The transceiver has the following five RF ports:
•Bluetooth 2.4 GHz in/out, Classic Bluetooth and Bluetooth low energy
•Wi-Fi 2.4 GHz band main port in/out
•Wi-Fi 5 GHz band In
•Wi-Fi 5 GHz band out
•Wi-Fi 2.4 GHz band MIMO port in/out
The Wi-Fi MIMO port is separate from the other ports and connected directly to a coaxial U.FL.
connector through a band pass filter. The U.FL. connector should be connected to an external antenna
through a coaxial cable. See Approved antennas section in
ODIN-W2 series Data sheet [2] section for
more information about how to select the antennas.
☞The MIMO port/functionality is available only in the ODIN-W260 module.
Different antenna options are available depending on the chosen ODIN-W2 series model:
•ODIN-W260: A standard coaxial U.FL. connector that must be connected to an external antenna
through a coaxial cable. See Antenna connectors section for more information about the antenna
connectors.
•ODIN-W262 and ODIN-W263: An internal dual-band PIFA antenna. See Internal antenna
subsection for more information about the internal antenna. ODIN-W263 is a special version of
ODIN-W262 configured to always support the ETSI domain and is only allowed to be used in
countries allowing ETSI domain channels.
Three internal DC/DC regulators generate 1.1 V, 1.8 V and 2.7 V to the RF parts.
1.1.3 Host processor
The host processor is composed of a high-performance Arm®Cortex®-M4 with FPU. The MCU
operates at a system frequency of up to 168 MHz and has 2 MB of Flash and 256 KB of RAM memory.
A 24 MHz crystal supplies the host for accurate interface timing. The host enables communication
with the ODIN-W2 module over both UART and RMII.

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The power management is handled by a 1.8 V DC regulator that supplies the host core and iOS. The
1.8 V IO voltage is also available on the solder pads for use on external interface logic. The 1.8 V is
always available if the VCC supply to the module is stable.
1.1.4 Radio modes
The ODIN-W2 series is a stand-alone multiradio module that supports Wi-Fi, Classic Bluetooth, and
Bluetooth low energy. It can run as a single radio module with only one radio-mode enabled or as a true
multiradio module with both Bluetooth and Wi-Fi enabled concurrently.
When the ODIN-W2 series runs as a multiradio module, coexistence is handled internally. In other
words, the ODIN-W2 series module will swap between Bluetooth and Wi-Fi when needed and ensures
that no transmissions occur simultaneously.
1.1.5 u-blox connectivity software
The ODIN-W2 module is pre-flashed with u-blox connectivity software. See the u-connectXpress
software user guide [3] and u-blox Short range AT commands manual [1] for more information.
1.1.6 Mbed™
The ODIN-W2 series modules are designed to be able to run in an Mbed environment.
The Arm®Mbed™ IoT device platform provides the operating system, cloud services, tools, and
developer ecosystem that enable creation and deployment of commercial, standards-based IoT
solutions possible at scale.
1.2 Pin configuration and function
1.2.1 Pin attributes
1. FUNCTION: Pin function
2. PIN NAME: The name of the package pin or terminal
3. PIN NUMBER: Package pin numbers associated with each signal
4. GPIO_ID: GPIO ID used for using pins in the GPIO mode
5. Mbed pin: Mbed pin number used by the EVK-ODIN-W2
6. STM32 pin: Pin number on the STM32
7. SIGNAL NAME: The signal name for that pin in the mode being used
8. REMARKS: Pin description and notes

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1.2.2 Pin description
Figure 2: ODIN-W2 series pin assignment
The signals are available on castellation pads on the edge of the PCB. The unfilled circular pads are
GND pads. Black circular pads are test and production points.
The pin id in the Table 2 refers to the ids used in the
u-blox Short range AT commands manual [1] .

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Function Pin name Pin No. GPIO
id
Mbed pin STM32
pin
Signal description Remarks
Power VCC A4 Module power
supply.
3.0 – 3.6 V power supply.
V_INT A2 Regulated output
voltage for external
interface supply.
1.8 V, max output current
100mA. The maximum output
current can be limited by the
internal current consumption of
the V_INT rail.
GND A3, C1, C3,
C4, C7, D7
All GND pads must
be connected to
ground.
System
IO
RESET_N A1 External reset input. Internal active pull-up to V_INT.
SWITCH_0 A6 SW0 PF2 System Input Signal Active low. The module will
revert to factory settings if both
SWITCH_1=’0’
and SWITCH_0=’0’ for 10 sec
startup (RESET_N pin is
released or power is applied).
RED A7 A5 / LED1 /
LED_RED
PE_0 Logic Red LED
Signal.
Active low.
GREEN/
SWITCH_1
A8 LED2 /
LED_GRE /
SW1
PB_6 Logic Green LED
Signal. System
Input Signal
Active low.
The GREEN signal is not valid
until 500 ms after the startup
(RESET_N pin is released or
power is applied).
If the level on this pin is pulled-
down during start-up the unit
goes back to default serial
settings. The SWITCH_1 input
is only active during the first
500ms after startup.
The module will revert to factory
settings if both SWITCH_1=’0’
and SWITCH_0=’0’ for 10 sec
startup.
BLUE A9 D5 / LED_BLU PB_8 Logic Blue LED
Signal.
Active low.
Clock LPO_CLK C16 14 A3 PF_7 Low Power
Oscillator clock
input
The modules require an external
32.768 kHz clock for low power
modes. Should be left
unconnected if not used.
UART UART_RXD A13 D2 PA_10 UART Receive.
UART_TXD A11 D8 PA_9 UART Transmit.
UART_RTS A12 28 D4 PA_12 UART Request To
Send, Hardware
flow control.
Active low.
UART_CTS A10 27 D3 PA_11 UART Clear To
Send, Hardware
flow control.
Active low.
UART_DTR A5 A2 PC2 UART Data
Terminal Ready
System Output
Signal
Active low.
Is used as a System IO
UART_DSR A18 A1 PA_3 UART Data Set
Ready.
Active low. Can also be used as a
System IO.

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Function Pin name Pin No. GPIO
id
Mbed pin STM32
pin
Signal description Remarks
RMII RMII_MDC C14 12 Management data
clock line
RMII_MDIO C15 13 Management data
I/O line
An external pull-up resistor is
required on the bidirectional
data signal.
RMII_TXD0 D1 20 RMII Transmit 0
RMII_TXD1 D2 21 RMII Transmit 1
RMII_TX-EN D3 22 RMII Transmit
enable
Active high.
RMII_CRS-DV D4 23 Carrier
Sense/Receive Data
Valid input
Carrier Sense and Receive Data
Valid signals are multiplexed
together; the multiplexing
scheme varies with
implementation.
RMII_RXD0 D5 24 RMII Receive 0
RMII_RXD1 D6 25 RMII Receive 1
RMII_REF-
CLK
D8 26 RMII Reference
clock input
Continuous 50 MHz reference
clock input.
IO UART3 RX A14 7 D0 PD_9 IO UART3 not used for u-blox
connectivity software
UART3 TX A15 8 D1 PD_8 IO UART3 not used for u-blox
connectivity software
UART3 CTS A16 9 D6 PD_11 IO UART3 not used for u-blox
connectivity software
UART3 RTS A17 10 D7 PD_12 IO UART3 not used for u-blox
connectivity software
RSVD C13 11 A0 PF_6 IO IO
RSVD C5 15 A4 PG_4 IO IO
SPI MISO /
SDIO D0
C6 16 D12 PE_13 IO SPI not used for
SPI SCK/
SDIO CLK
C8 17 D13 PE_12 IO SPI not used for u-blox
connectivity software
SPI MOSI /
SDIO CMD
C10 18 D11 PE_14 IO SPI not used for u-blox
connectivity software
SPI SEL C11 19 D10 PE_11 IO SPI not used for u-blox
connectivity software
IO SDIO CD C12 29 D9 PE_9 IO
RSVD RSVD/
I2C_SCL
C17 D15 PF_1 I2C not used for u-blox
connectivity software
RSVD/
I2C_SDA
C18 D14 PF_0 I2C not used for u-blox
connectivity software
RSVD RSVD B1, B2, B3,
B4, B5, B6,
B7, B8, C2,
C9
Reserved pin. All RSVD should be left
unconnected.
Test
point
JTAG_NTRST TP5 JTAG_NTRST PB_4 JTAG not used for u-blox
connectivity software
JTAG_TMS TP7 JTAG_TMS PA_13 JTAG not used for u-blox
connectivity software
JTAG_TDI TP8 JTAG_TDI PA_15 JTAG not used for u-blox
connectivity software

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Function Pin name Pin No. GPIO
id
Mbed pin STM32
pin
Signal description Remarks
JTAG_TCK TP9 JTAG_TCK PA_14 JTAG not used for u-blox
connectivity software
JTAG_TDO TP10 JTAG_TDO PB_3 JTAG not used for u-blox
connectivity software
SYS_BOOT TP11 SYS_BOOT BOOT0 Pull to V_INT to
enter the ROM
based bootloader
10k internal pull down
RSVD TP1, TP2,
TP3, TP4,
TP6, TP12
Reserved pin. All RSVD should be left
unconnected.
Table 2: ODIN-W2 pin description
⚠Do not apply any Voltage to Digital, Control and Radio signal groups while in Not Powered mode to
avoid damaging the module.
1.3 Supply interfaces
1.3.1 Main supply inputs
The ODIN-W2 series modules must be supplied with a DC power through VCC pins. Voltage must be
stable, as during operation, the current drawn from the VCC can vary significantly depending on the
power consumption profile of the Bluetooth (BT) and Wi-Fi technologies. See Supply interfaces
section for power supply design information and the
ODIN-W2 series Data sheet [2] for information
about voltage supply requirement.
Rail Voltage requirement Current requirement (peak)
VCC Refer to ODIN-W2 series Data sheet [2] 900 mA
Table 3: Summary of voltage supply requirements
The ODIN-W2 series modules must be supplied with a proper DC power supply through the VCC pins,
which can be one of the following:
•Switching Mode Power Supply (SMPS)
•Low Drop Out (LDO) regulator
The SMPS is the ideal choice when the available primary supply source has higher value than the
operating supply voltage of the ODIN-W2 series modules. The use of SMPS provides the best power
efficiency for the overall application and minimizes current drawn from the main supply source.
⚠While selecting SMPS, ensure that AC voltage ripple at switching frequency is kept as low as
possible. Layout shall be implemented to minimize impact of high frequency ringing.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage
where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear
regulators are not recommended for high voltage step-down as they will dissipate a considerable
amount of energy.
Independent of the selected DC power supply, it is crucial that it can handle the high peak current
generated by the ODIN-W2 series module. It is recommended to use a supply that can handle 1000
mA.
It is considered as best practice to have decoupling capacitors on the supply rails close to the ODIN-
W2 series module, although depending on the design of the power routing on the host system,
capacitance might not be needed.

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1.3.2 Generic digital interfaces supply output (V_INT)
The ODIN-W2 series modules provide a 1.8 V supply rail output through the V_INT pin, which is
internally generated when the module has VCC supply. The same voltage domain is used internally to
supply the generic digital interfaces of the modules. The V_INT supply output can be used instead of
an external discrete regulator.
The V_INT supply is available 2.5 ms after applying the VCC.
1.4 System function interfaces
1.4.1 Module reset
You can reset (reboot) the ODIN-W2 series modules using one of the following methods:
•Hardware reset: Low level on the RESET_N pin, which is normally set high by an internal pull-up,
for a valid time period (see ODIN-W2 series Data sheet [2]). This causes an “external” or “hardware”
reset of the module. The RESET_N line should be driven by open drain, open collector or contact
switch.
•Software reset with an AT command: This causes an “internal” or “software” reset of the module.
See
u-blox Short range AT commands manual [1] for more information.
1.4.2 External low power clock for power saving modes
An external 32.768 kHz Low Power Clock (LPO) is required for using power saving modes. See the
u-blox Short Range AT Commands Manual [1] for more information about the different power saving
modes. The clock must be available during start-up (after power on or while leaving the reset-state).
See the low power clock (LPO_CLK) design section for more information about external LPO clock
design. The LPO clock should be left unconnected if not needed in the design. See
ODIN-W2 series
Data sheet [2]
for electrical requirements.
1.4.3 System input and output signals
The module can be in the Command mode, Data mode, and Extended Data mode. The RED, GREEN,
BLUE and UART DTR signals are used to indicate the status.
The UART_DTR pin can be set to indicate whether the module is in one of the below-mentioned modes:
•Data mode
•Command mode
•If there are any remote peers connected to the module
The UART_DSR pin can used to put the module in Command or it can be used to disconnect all remote
pears. For more details see the
u-blox Short range AT commands manual [1].
Table 4 describes the default setup of the RED, GREEN and BLUE System iOS. For more information,
see the
u-blox Short range AT commands manual [1] and Pin attributes section.
Mode Status RGB LED Color GREEN GPIO BLUE GPIO RED GPIO
Data mode, EDM IDLE Green LOW HIGH HIGH
Command mode IDLE Orange LOW HIGH LOW
Data mode, Command mode, EDM CONNECTING1Purple HIGH LOW LOW
Data mode, Command mode, EDM CONNECTED1 Blue HIGH LOW HIGH
Table 4: LED Signal states in different module modes
1On data activity, the active LED flashes.

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1.4.4 Restoring default configuration
In some situations, it is necessary to restore the settings to their default values. The following two
levels of restore to default configuration can be activated through hardware:
•Serial Settings: The serial settings are restored to default if SWITCH_1=’0’ during start-up. See
the table in Universal asynchronous serial interface (UART) section for more information about
the default serial settings.
•Factory Settings: The module will restore all factory settings if both SWITCH_1=’0’ and
SWITCH_0=’0’ for more than 10s during start-up. See the
u-blox Short range AT commands
manual [1]
for more information about the default factory settings.
1.5 Data communication interfaces
1.5.1 Universal asynchronous serial interface (UART)
The ODIN-W2 series module provides a Universal Asynchronous Serial Interface (UART) for data
communication. The ODIN-W2 series module can be in configuration mode (Command mode) and
data mode. See the
u-blox Short range AT commands manual [1] for more information about the
different modes of the module.
The following UART signals are available:
•Data lines (RXD as input, TXD as output)
•Hardware flow control lines (CTS as input, RTS as output)
The UART can be used as both 4 wire UART with hardware flow control and as 2-wire UART with only
TXD and RXD. If using the UART in 2-wire mode CTS should be connected to GND on the ODIN-W2
module. The use of flow control is configured with an AT command. See the
u-blox Short range AT
commands manual [1]
for more information.
The Link status pins (DTR as output, DSR as input) are available as System IO signals, this is
described in System input and output signals section. It is recommended to use CMOS compatible
signal levels.
The UART interface is also used for software upgrade. See the
u-blox Short range AT commands
manual [1]
for more information about the software upgrade.
See the
ODIN-W2 series Data sheet [2] for characteristic information about the UART interface.
Interface Default configuration
COM port 115200 baud, 8 data bits, no parity, 1 stop bit, hardware flow control
Table 5: Default settings for the COM port
1.5.2 Ethernet (RMII+SMI)
☞The IO voltage of the ODIN-W2 is 1.8 V, which means that the RMII interface operates outside the
RMII specification v1.2. If the RMII has to be connected to a PHY circuit, then that circuit must
support 1.8 V operation. If a direct MAC to MAC connection is to be used, then a level shifter might
be needed depending on the selected host. The selected hardware setup must be verified on the
application board to guarantee operation.
RMII:
The ODIN-W2 series module includes a full RMII either for Ethernet MAC to MAC communication or
for MAC to PHY communication using the included Station Management Interface (SMI). The RMII
and SMI use 9 signals in total. The interface requires an external 50 MHz clock source either from a
compatible PHY chip or from an external oscillator. The ODIN-W2 series module cannot provide this
clock signal by itself.

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SMI (MDC/MDIO management interface):
The two-wire SMI is used to configure PHY chip. It uses a clock line and a data line to setup the internal
registers on PHY chip.
A pull up resistor of 1.5 kΩmust be added to MDIO pin.
MAC to MAC connection:
If you connect the ODIN-W2 series module using a direct MAC to MAC connection, the SMI interface
can be left unconnected. Depending on the routing of the RMII interface on the host PCB, termination
resistors might also be needed.
An external 50 MHz oscillator is needed while running a MAC to MAC connection.
MAC to PHY connection:
If you connect the ODIN-W2 series module to an external PHY circuit, both the RMII and SMI interfaces
must be connected. The default PHY address (0x1) must be configured on the PHY side. Follow the
recommendations from the selected PHY chip for implementation details.
An example of a PHY implementation is shown in Figure 3. The PHY KSZ8081 is the recommended
PHY that is used on the EVK-ODIN-W2.
Figure 3: Example schematic RMII to PHY
1.5.3 Mbed Data communication interfaces
Through the Mbed software, the ODIN-W2 series module can be used with a wide range of interfaces
and is not limited to the pinout used by the serial port service.
⚠Only the interfaces used by the EVK-ODIN-W2 are described here.
1.5.3.1 CAN
The CAN bus is compliant with the 2.0A and B (active) specifications with a bitrate of up to 1 Mbit/s.
They can receive and transmit standard frames with 11-bit identifiers and extended frames with 29-
bit identifiers. Each CAN has three transmit mailboxes; two receive FIFOS with 3 stages and 28
shared scalable filter banks (you can use all of them even though you use only one CAN). 256 bytes of
SRAM are allocated for each CAN.
An external transceiver is needed to connect the ODIN-W2 series module to a CAN bus.

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1.5.3.2 SPI / SD card
The SPI bus supports both slave and master modes in full-duplex and simplex communication modes.
It can communicate up to 45 Mbits/s. The 3-bit prescaler gives 8 master mode frequencies and the
frame is configurable either up to 8 bits or 16 bits. The hardware CRC generation/verification supports
basic SD Card/MMC modes.
1.5.3.3 I2C
The I²C bus interfaces can operate in multimaster and slave modes. They can support the standard
(up to 100 KHz), and fast (up to 400 KHz) modes. It supports the 7/10-bit addressing mode and the
7-bit dual addressing mode (as slave). A hardware CRC generation and verification is embedded.
1.6 Antenna interfaces
☞The antenna interface is different for each module version in the ODIN-W2 series.
1.6.1 Antenna connectors
The ODIN-W260 module has two RF antenna U.FL. connectors with a characteristic impedance of
50 Ω. The main supports both Bluetooth and dual-band Wi-Fi. See Figure 4.
Figure 4: ODIN-W260 with external antenna connectors
The MIMO antenna connector supports 2x2 MIMO 2.4 GHz single band Wi-Fi. The use of multiple
antennas at both the transmitter and receiver improves communication performance. A MIMO m x n
system consists of m transmit and n receive antennas, where the data to be transmitted is divided
into m independent data streams.
For Bluetooth and Wi-Fi operation, the module has been tested and approved for use with the
antennas listed in the
ODIN-W2 series Data sheet [2] .
☞2x2 MIMO is supported from software version 5.0.1 onwards.
1.6.2 Internal antenna
The ODIN-W262 and ODIN-W263 modules have an internal dual-band PIFA antenna. See “Internal
antenna design” section for antenna design information.

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1.7 GPIO pins
On the ODIN-W2 series module, 23 pins can also be used as GPIO to control external logic. They can
be configured as output or input. When used as input, pull up or pull down resistor can be enabled.
The mapping of the GPIO pins can be found in the pin description in chapter 1.2. For more information
on setting up the GPIO pins, see the
u-blox Short range AT commands manual [1] .
1.8 Reserved pins (RSVD)
Do not connect reserved (RSVD) pin. The reserved pins can be allocated for future interfaces and
functionality.
1.9 GND pins
Good connection of the module’s GND pins with solid ground layer of the host application board is
required for correct RF performance. It significantly reduces EMC issues and provides a thermal heat
sink for the module.
The following two types of ground (GND) pads are available:
•GND pads and the PCB edge (castellations): Mainly for power supply return path and RF ground.
•Heat dissipation GND pads under the module: Mainly used for dissipation of heat, especially during
intensive Wi-Fi activity.
See the Module footprint and paste mask and Thermal guidelines sections for information about
ground design.

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2Software
The u-blox connectivity software flashed on the ODIN-W2 module consists of a binary software file.
The ODIN-W2 also has a built in ROM-based bootloader that can be used to reflash the
u-blox software and for flashing Mbed applications. Flashing the u-blox connectivity software is done
using the UART interface of the ODIN-W2 module.
You can use the SWD/JTAG if you use Arm Mbed applications together with the ODIN-W2 module.
2.1 Flashing the u-blox connectivity software
2.1.1 Flashing using s-center
You can update the software through s-center [6] using one of the following methods:
•Click Firmware Update button on the bottom right as shown in Figure 5 or
•Select Tools Firmware Update
option
Figure 5: Screenshot that depicts Software Update options in the s-center
This will open Firmware Update window. In this window, select the binary file that should be flashed
to the module and click Update as shown in Figure 6.

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Figure 6: Software update window in s-center
The module is now re-flashed with the selected software.
2.1.2 Software update using AT command
Use the AT+UFWUPD AT command to update the software in the ODIN-W2 series module. This will
trigger the bootloader to accept a file for download. The file download uses an XMODEM protocol.
☞The UART HW Flow is not used during the software update. See the u-blox Short range AT
commands Manual [1]
for information about the firmware update command.
2.1.3 Software update using rescue mode
Flashing a new version of the ODIN-W2 connectivity software can also be done using the rescue mode;
this mode also uses the XMODEM protocol. This mode is not started by an AT command, but by
grounding pin A6 (SWITCH_0) and pin A8 (SWITCH_1) during a reset.
•When the module has started in bootloader mode, a ‘>’ prompt will appear
•Note that the baud rate must be sent in hex, for example:
o115200 = 1C200
o230400 = 38400
o460800 = 70800
o921600 = E1000
•For example, to update the software using the baud rate of 460800, use the ‘r’ command
or 70800
•Start the software flashing with the ‘x’ command on address 0x8010000
ox 0x8010000
•The module will now reply with ‘C’ characters showing it is ready to receive XMODEM-CRC16 data.
Once the download is complete, the command ‘q’ shall be sent to reset the module, or a power cycle.
Keep in mind that the u-blox bootloader requires the following UART settings irrespective of the
settings that were used before entering the bootloader:
•Baud rate: 115200
•Data: 8 bits
•Parity: none
•Stop: 1 bit
•Flow control: none