Abov MC96F8204 Series User manual

CMOS single-chip 8-bit MCU
with 12-bit A/D converter
MC96F8204
User’s manual
Main features
8-bit Microcontroller With High Speed 8051 CPU
Basic MCU Function
–4Kbytes Flash Code Memory
–256bytes IRAM
Built-in Analog Function
–Power-On Reset and Low Voltage Detect Reset
–Internal 8MHz RC Oscillator (±2.0%, TA= 0 ~ +50°C)
–Internal 200kHz RC Oscillator (±3.0%, TA= -20 ~ +85°C)
–WatchdogTimer RC Oscillator (5kHz)
Peripheral Features
–12-bitAnalog to Digital Converter (8 inputs)
–USART(UART + SPI) 1set
–I2C 8-bit x 1-ch
–16-bit CRC/Checksum Generator
I/O and Packages
–Up to 18 Programmable I/O lines with 20 pin package.
–8 SOP, 10 SSOP, 16 SOPN, 20 SOP, 20 TSSOP
–Pb-free package
Operating Conditions
–1.8V to 5.5V Wide Voltage Range
–-40°C to 85°C Temperature Range
Application
–Small HomeAppliance
V 1.4
Revised 21 December, 2016

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MC96F8204
ABOV Semiconductor Co., Ltd.
Revision history
Version
Date
Revision list
1.0
2016.03.14
Published this book.
1.1
2016.04.08
Change tR spec max value form 5.0V/ms to 30.0V/ms in 7.4 Power-On Reset.
Add a chapter 7.23 Recommended Circuit and Layout with SMPS Power.
Modify the program tips in Chapter 15. Flash Memory.
Add an appendix about “Flash Protection for invalid Erase/Write”
Fix typos.
1.2
2016.05.17
Fix typo of 8SOP package device name (MC96F8104M).
Fix typos of I2C Status Register.
1.3
2016.09.08
Remove packages the 20 QFN, 16 TSSOP, 16 QFN, 8 PDIP.
Modify package from 16 SOP to 16 SOPN.
1.4
2016.12.21
Revised this book.
Fix typos of T0/T1/T2.
Version 1.4
Published by FAE team
2016 ABOV Semiconductor Co. Ltd. all rights reserved.
Additional information of this manual may be served by ABOV Semiconductor offices in Korea or distributors.
ABOV Semiconductor reserves the right to make changes to any information here in at any time without notice.
The information, diagrams and other data in this manual are correct and reliable;
however, ABOV Semiconductor is in no way responsible for any violations of patents or other rights of the third
party generated by the use of this manual.

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MC96F8204
ABOV Semiconductor Co., Ltd.
1 Overview
1.1. Description
The MC96F8204 is advanced CMOS 8-bit microcontroller with 4 Kbytes of FLASH. This is powerful microcontroller
which provides a highly flexible and cost effective solution to many embedded control applications. This provides the
following features : 4k bytes of FLASH, 256 bytes of IRAM, general purpose I/O, basic interval timer, watchdog timer,
8/16-bit timer/counter, 16-bit PPG output, watch timer, USART(UART + SPI), I2C, 12-bit A/D converter, Flash
CRC/Checksum Generator, on-chip POR, LVR, LVI, on-chip oscillator and clock circuitry. The MC96F8204 also
supports power down modes to reduce power consumption.
Device Name
FLASH
IRAM
ADC
I/O PORT
Package
MC96F8204D
4 Kbytes FLASH
256 bytes
8 inputs
18
20 SOP
MC96F8204R
8 inputs
18
20 TSSOP
MC96F8204M
8 inputs
14
16 SOPN
MC96F8104S
8 inputs
8
10 SSOP
MC96F8104M
6 inputs
6
8 SOP
Table 1.1 Ordering Information of MC96F8204

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MC96F8204
ABOV Semiconductor Co., Ltd.
1.2 Features
CPU
–8-bit CISCcore (M8051, 2 clocks per cycle)
ROM (FLASH) Capacity
–4 Kbytes Flash with self read/write capability
–On Chip debug andIn-System Programming(ISP)
–Endurance : 10,000 times
–Retention : 10 years
256bytes IRAM
General Purpose I/O (GPIO)
–Normal I/O : 18 Ports
(P0, P1, P2[1:0])
Timer/Counter
–Basic Interval Timer (BIT) 8-bit× 1-ch
–Watch Dog Timer (WDT) 8-bit × 1-ch
5kHz internal RC oscillator for WDT
–8-bit× 1-ch(T0), 16-bit× 2-ch (T1/T2)
Programmable Pulse Generation
–Pulse generation (byT1/T2)
Watch Timer (WT)
–3.91ms/0.25s/0.5s/1s /1min interval at 32.768kHz
USART
–8Bit UART × 1ch, 8Bit SPI x 1ch
I2C
–8-bit× 1-ch
12-bit A/D Converter
–8 Input channels
16-Bit CRC/Checksum Generator
–Auto and User CRC/Checksum mode
Power On Reset
–Reset release level (1.4V)
Low Voltage Reset
–14 level detect
(1.60/ 2.05/ 2.15/ 2.25/ 2.37/ 2.50/ 2.65/ 2.82/ 3.01/
3.22/ 3.47/ 3.76/ 4.10/ 4.51V)
Low Voltage Indicator
–13 level detect
(2.05/ 2.15/ 2.25/ 2.37/ 2.50/ 2.65/ 2.82/ 3.01/ 3.22/
3.47/ 3.76/ 4.10/ 4.51V)
Interrupt Sources
–External Interrupts
(EINT0/1/10/11/12) (5)
–Timer(0/1/2) (3)
–WT (1)
–WDT (1)
–BIT (1)
–USART (2)
–I2C(1)
–ADC (1)
Internal RC Oscillator
–Low frequency: 200kHz ± 3.0% (TA = -20 to +85 C)
–High frequency: 8MHz ± 2.0% (TA= 0 to +50 C)
Power Down Mode
–STOP, IDLE mode
Operating Voltage and Frequency
–1.8V~ 5.5V (@32 ~ 38kHz with X-tal)
–1.8V ~ 5.5V (@ 0.4 ~ 4.2MHz with X-tal, Ceramic)
–2.0V ~ 5.5V (@ 0.4 ~ 4.2MHz with X-tal, Crystal)
–2.7V ~ 5.5V (@ 0.4 ~ 12.0MHz with X-tal)
–1.8V ~ 5.5V (@ 0.5 ~ 8.0MHz with HFIRC)
–1.8V ~ 5.5V (@ 25.0 ~ 200kHz with LFIRC)
–Voltage dropout converter included for core
Minimum Instruction Execution Time
–167ns (@12MHz main clock)
–61us (@ 32.768kHz sub clock)
Operating Temperature
––40 ~ +85℃
Oscillator Type
–0.4-12MHz Crystal or Ceramic for main clock
•Package Type
–20 SOP/TSSOP
–16 SOPN
–10 SSOP
–8 SOP
–Pb-free package

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MC96F8204
ABOV Semiconductor Co., Ltd.
2
User VCC
1
3
4
5
6
7
8
10
9
User GND
DSCL
DSDA
1.3 Development tools
1.3.1 Compiler
We do not provide the compiler. Please contact the third parties.
The core of MC96F8204 is Mentor 8051. And, device ROM size is smaller than 64k bytes. Developer can use all kinds
of third party’s standard 8051 compiler.
1.3.2 OCD(On-chip debugger) emulator and debugger
The OCD (On Chip Debug) emulator supports ABOV Semiconductor’s 8051 series MCU emulation.
The OCD interface uses two-wire interfacing between PC and MCU which is attached to user’s system. The OCD can
read or change the value of MCU internal memory and I/O peripherals. And the OCD also controls MCU internal
debugging logic, it means OCD controls emulation, step run, monitoring, etc.
The OCD Debugger program works on Microsoft-Windows NT, 2000, XP, Vista (32bit) operating system.
If you want to see more details, please refer to OCD debugger manual. You can download debugger S/W and manual
from our web-site(http://www.abov.co.kr).
Connection:
−DSCL(MC96F8204 P01 port)
−DSDA(MC96F8204 P00 port)
OCD connector diagram: Connect OCD with user system
Figure 1.1 Debugger(OCD1/OCD2) and Pin description

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MC96F8204
ABOV Semiconductor Co., Ltd.
1.3.3 Programmer
Single programmer :
E-PGM+ : It programsMCU device directly.
DSDA
VDD
DSCL
VSS
Figure 1.2 E-PGM+ (Single writer)

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MC96F8204
ABOV Semiconductor Co., Ltd.
OCD emulator:
It can write code to MCU device too, because OCD debugger supports ISP (In System Programming).It does not
require additional H/W, except developer’s target system.
Gang programmer: E-GANG4 and E-GANG6
- It can run PC controlled mode.
- It can run standalone without PC control too.
- USB interface is supported.
- Easy to connect to the handler.
Figure 1.3 E-GANG4 and E-GANG6 (for Mass Production)

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MC96F8204
ABOV Semiconductor Co., Ltd.
1.4 MTP programming
1.4.1 Overview
The program memory of MC96F8204 is MTP Type. This flash is accessed by serial data format. There are four
pins(DSCL, DSDA, VDD, VSS) for programming/reading the flash.
Table 1.2 Descriptions of pins which are used to programming/reading the Flash
1.4.2 On-Board programming
The MC96F8204 needs only four signal lines including VDD and VSS pins for programming FLASH with serial
protocol. Therefore the on-board programming is possible if the programming signal lines are considered when the
PCB of application board is designed.
Pin name
Main chip
pin name
During programming
I/O
Description
DSCL
P01
I
Serial clock pin. Input only pin.
DSDA
P00
I/O
Serial data pin. Output port when reading and input port when programming.
Can be assigned as input/push-pull output port.
VDD, VSS
VDD, VSS
-
Logic power supply pin.

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MC96F8204
ABOV Semiconductor Co., Ltd.
1.4.3 Circuit Design Guide
At the FLASH programming, the programming tool needs 4 signal lines that are DSCL, DSDA, VDD, and VSS. When
you design the PCB circuits, you should consider the usage of these signal lines for the on-board programming.
Please be careful to design the related circuit of these signal pins because rising/falling timing of DSCL and DSDA is
very important for proper programming.
To application circuitDSCL(I)
DSDA(I/O)
R1 (2kΩ~ 5kΩ)
To application circuit
R2 (2kΩ~ 5kΩ)
VDD
VSS
E-PGM+, E-GANG4/E-GANG6
NOTE) 1. In on-board programming mode, very high-speed signal will be provided to pin DSCL and DSDA.
And it will cause some damages to the application circuits connected to DSCL or DSDA port if the
application circuit is designed as high speed response such as relay control circuit. If possible, the
I/O configuration of DSDA, DSCL pins had better be set to input mode.
2. The value of R1 and R2 is recommended value. It varies with circuit of system.
Figure 1.4 PCB design guide for on board programming

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MC96F8204
ABOV Semiconductor Co., Ltd.
2 Block diagram
IRAM
256B
Flash
4KB
On-chip debug
In-system programming
Power control
Power on reset
Low voltage reset
Low voltage indicator
Power down mode
Clock generator
8MHz, HF IRC OSC
200kHz, LF IRC OSC
12MHz, Crystal OSC
32.768kHz, Crystal OSC
USART
UART 1 channel, 8-bit
SPI 1 channel, 8-bit
I2C
1 channel, 8-bit
CORE
M8051
General purpose I/O
18 ports normal I/O
Watchdog timer
1 channel, 8-bit
5kHz, internal RC OSC
Basic interval timer
1 channel, 8-bit
Timer / Counter
1 channel, 8-bit
2 channels, 16-bit
ADC
8 Input channels, 12-bit
Flash CRC/Checksum
Generator
16-bit CRC/Checksum Result
Auto and User CRC/Checksum
Mode
Figure 2.1 Block diagram of MC96F8204
NOTE) 1. The P16-P17 and P20-P21 are not in the 16-Pin package.
2. The P10-P17 and P20-P21 are not in the 10-Pin package.
3. The P03-P04, P10-P17 and P20-P21 are not in the 8-Pin package.

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MC96F8204
ABOV Semiconductor Co., Ltd.
3 Pin assignment
MC96F8204D/R
(20-SOP/TSSOP)
1
2
3
4
18
17
20
19
VDD
P06/AN6/SS/XIN/SXIN
P05/AN5/AVREF/EC1/RESETB
VSS
P07/AN7/SCK/XOUT/SXOUT
P01/AN1/EINT1/RXD/MISO/DSCL
P00/AN0/EINT0/TXD/MOSI/DSDA
P02/AN2/EINT11/T1O/PWM1O
516
P04/AN4/EINT10/EC2/SDA P03/AN3/EINT12/T2O/PWM2O/SCL
6
P21
7
P20
15 P10/(SDA)
14 P11/(SCL)
8
9
10
13
12
11
P12/(TXD/MOSI)
P13/(RXD/MISO)
P14/(SCK)
P17
P16
P15
NOTE) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSCL, DSDA.
Figure 3.1 MC96F8204D 20SOP/TSSOP Pin Assignment
MC96F8204M
(16-SOPN)
1
2
3
4
14
13
16
15
VDD
P06/AN6/SS/XIN/SXIN
P05/AN5/AVREF/EC1/RESETB
VSS
P07/AN7/SCK/XOUT/SXOUT
P01/AN1/EINT1/RXD/MISO/DSCL
P00/AN0/EINT0/TXD/MOSI/DSDA
P02/AN2/EINT11/T1O/PWM1O
512
P04/AN4/EINT10/EC2/SDA P03/AN3/EINT12/T2O/PWM2O/SCL
6
P15
7
P14/(SCK)
11 P10/(SDA)
10 P11/(SCL)
8 9 P12/(TXD/MOSI)P13/(RXD/MISO)
NOTE) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSCL, DSDA.
2. The P16-P17 and P20-P21 pins should be selected as a push-pull output or an input with pull-up resistor by
software control when the 16-pin package is used.
Figure 3.2 MC96F8204M 16SOPN Pin Assignment

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MC96F8204
ABOV Semiconductor Co., Ltd.
MC96F8104S
(10-SSOP)
1
2
3
4
8
7
10
9
VDD
P04/AN4/EINT10/EC2/SDA
P06/AN6/SS/XIN/SXIN
VSS
P05/AN5/AVREF/EC1/RESETB
P03/AN3/EINT12/T2O/PWM2O/SCL
P02/AN2/EINT11/T1O/PWM1O
P01/AN1/EINT1/RXD/MISO/DSCL
56
P07/AN7/SCK/XOUT/SXOUT P00/AN0/EINT0/TXD/MOSI/DSDA
NOTE) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSCL, DSDA.
2. The P10-P17 and P20-P21 pins should be selected as a push-pull output or an input with pull-up resistor by
software control when the 10-pin package is used.
Figure 3.3 MC96F8104S 10SSOP Pin Assignment
MC96F8104M
(8-SOP)
1
2
3
4
6
5
8
7
VDD
VSS
P02/AN2/EINT11/T1O/PWM1O
P01/AN1/EINT1/RXD/MISO/DSCL
P00/AN0/EINT0/TXD/MOSI/DSDA
P06/AN6/SS/XIN/SXIN
P07/AN7/SCK/XOUT/SXOUT
P05/AN5/AVREF/EC1/RESETB
NOTE) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSCL, DSDA.
2. The P03-P04, P10-P17 and P20-P21 pins should be selected as a push-pull output or an input with pull-up
resistor by software control when the 8-pin package is used.
Figure 3.4 MC96F8104M 8SOP Pin Assignment

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MC96F8204
ABOV Semiconductor Co., Ltd.
4 Package Diagram
Figure 4.1 20-Pin SOP Package

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MC96F8204
ABOV Semiconductor Co., Ltd.
Figure 4.2 20-Pin TSSOP Package

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MC96F8204
ABOV Semiconductor Co., Ltd.
Figure 4.3 16-Pin SOPN Package

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MC96F8204
ABOV Semiconductor Co., Ltd.
Figure 4.4 10-Pin SSOP Package

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MC96F8204
ABOV Semiconductor Co., Ltd.
Figure 4.5 8-Pin SOP Package

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MC96F8204
ABOV Semiconductor Co., Ltd.
5 Pin Description
PIN
Name
I/O
Function
@RESET
Shared with
P00
I/O
Port 0 is a bit-programmable I/O port which can be
configured as a schmitt-trigger input, a push-pull
output, or an open-drain output.
A pull-up resistor can be specified in 1-bit unit.
The P03-P04 are not in the 8-Pin package.
Input
AN0/EINT0/TXD/MOSI/DSDA
P01
AN1/EINT1/RXD/MISO/DSCL
P02
AN2/EINT11/T1O/PWM1O
P03
AN3/EINT12/T2O/PWM2O/SCL
P04
AN4/EINT10/EC2/SDA
P05
AN5/AVREF/EC1/RESETB
P06
AN6/SS/XIN/SXIN
P07
AN7/SCK/XOUT/SXOUT
P10
I/O
Port 1 is a bit-programmable I/O port which can be
configured as a schmitt-trigger input, a push-pull
output, or an open-drain output.
A pull-up resistor can be specified in 1-bit unit.
The P10-P17 are not in the 10-Pin/8-Pin package.
The P16-P17 are not in the 16-Pin package.
Input
(SDA)
P11
(SCL)
P12
(TXD/MOSI)
P13
(RXD/MISO)
P14
(SCK)
P15
–
P16
–
P17
–
P20
I/O
Port 2 is a bit-programmable I/O port which can be
configured as a schmitt-trigger input, a push-pull
output, or an open-drain output.
A pull-up resistor can be specified in 1-bit unit.
The P20-P21 are not in the 16-Pin/10-Pin/8-Pin
package.
Input
–
P21
–
EINT0
I/O
External interrupt input
Input
P00/AN0/TXD/MOSI/DSDA
EINT1
I/O
External interrupt input
Input
P01/AN1/RXD/MISO/DSCL
EINT10
I/O
External interrupt and Timer 0 capture input
Input
P04/AN4/EC2/SDA
EINT11
I/O
External interrupt and Timer 1 capture input
Input
P02/AN2/T1O/PWM1O
EINT12
I/O
External interrupt and Timer 2 capture input
Input
P03/AN3/T2O/PWM2O/SCL
T1O
I/O
Timer 1 interval output
Input
P02/AN2/EINT11/PWM1O
T2O
I/O
Timer 2 interval output
Input
P03/AN3/EINT12/PWM2O/SCL
PWM1O
I/O
Timer 1 pulse output
Input
P02/AN2/EINT11/T1O
PWM2O
I/O
Timer 2 pulse output
Input
P03/AN3/EINT12/T2O/SCL
EC1
I/O
Timer 1 event count input
Input
P05/AN5/AVREF/RESETB
EC2
I/O
Timer 2 event count input
Input
P04/AN4/EINT10/SDA
SCK
I/O
Serial 0 clock input/output
Input
P07/AN7/XOUT/SXOUT
MOSI
I/O
SPI 0 master output, slave input
Input
P00/AN0/EINT0/TXD/DSDA
(P12)
MISO
I/O
SPI 0 master input, slave output
Input
P01/AN1/EINT1/RXD/DSCL
(P13)
SS
I/O
SPI 0 slave select input
Input
P06/AN6/XIN/SXIN
TXD
I/O
UART 0 data output
Input
P00/AN0/EINT0/MOSI/DSDA
(P12)
RXD
I/O
UART 0 data input
Input
P01/AN1/EINT1/MISO/DSCL
(P13)
SCL
I/O
I2C clock input/output
Input
P03/AN3/EINT12/T2O/PWM2O
(P11)
SDA
I/O
I2C data input/output
Input
P04/AN4/EINT10/EC2
(P10)
Table 5.1 Normal Pin Description

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MC96F8204
ABOV Semiconductor Co., Ltd.
PIN
Name
I/O
Function
@RESET
Shared with
AVREF
I/O
A/D converter reference voltage
Input
P05/AN5/EC1/RESETB
AN0
I/O
A/D converter analog input channels
Input
P00/EINT0/TXD/MOSI/DSDA
AN1
P01/EINT1/RXD/MISO/DSCL
AN2
P02/EINT11/T1O/PWM1O
AN3
P03/EINT12/T2O/PWM2O/SCL
AN4
P04/EINT10/EC2/SDA
AN5
P05/AVREF/EC1/RESETB
AN6
P06/SS/XIN/SXIN
AN7
P07/SCK/XOUT/SXOUT
RESETB
I/O
System reset pin with a pull-up resistor when it is
selected as the RESETB by CONFIGURE
OPTION
Input
P05/AN5/AVREF/EC1
DSDA
I/O
On chip debugger data input/output
Input
P00/AN0/EINT0/TXD/MOSI
DSCL
I/O
On chip debugger clock input
Input
P01/AN1/EINT1/RXD/MISO
XIN
I/O
Main oscillator pins
Input
P06/AN6/SS/SXIN
XOUT
P07/AN7/SCK/SXOUT
SXIN
I/O
Sub oscillator pins
Input
P06/AN6/SS/XIN
SXOUT
P07/AN7/SCK/XOUT
VDD,
VSS
–
Power input pins
–
–
Table 5.1 Normal Pin Description (Concluded)
NOTE) 1. The P16-P17 and P20-P21 are not in the 16-Pin package.
2. The P10-P17 and P20-P21 are not in the 10-Pin package.
3. The P03-P04, P10-P17 and P20-P21 are not in the 8-Pin package.
4. The P05/RESETB pin is configured as one of the P05 and the RESETB pin by the “CONFIGURE
OPTION”.
5. If the P00/AN0/EINT0/TXD/MOSI/DSDA and P01/AN1/EINT1/RXD/MISO/DSCL pins are connected to
an emulator during power-on reset, the pins are automatically configured as the debugger pins.
6. The P00/AN0/EINT0/TXD/MOSI/DSDA and P01/AN1/EINT1/RXD/MISO/DSCL pins are configured as
inputs with an internal pull-up resistor only during the reset or power-on reset.
7. The P06/XIN/SXIN and P07/XOUT/SXOUT pins are configured as a function pin by software control.

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MC96F8204
ABOV Semiconductor Co., Ltd.
6 Port Structures
6.1 General Purpose I/O Port
PULL-UP
REGISTER VDD
VDD
PAD
VDD
OPEN DRAIN
REGISTER
DATA
REGISTER
DIRECTION
REGISTER
MUX
0
1
MUX
1
0
CMOS or
Schmitt Level
Input
ANALOG CHANNEL
ENABLE
ANALOG INPUT
PORTx INPUT or
SUB-FUNC DATA INPUT
SUB-FUNC DIRECTION
SUB-FUNC ENABLE
SUB-FUNC DATA OUTPUT
Level Shift (ExtVDD to VDC)
Level Shift (VDC to ExtVDD)
Figure 6.1 General Purpose I/O Port
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