AKM AKD5367A-A User manual

[AKD5367A-A]
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GENERAL DESCRIPTION
AKD5367A-A is an evaluation board for the digital audio 24bit 96kHz A/D converter, AK5367A. The
AKD5367A-A includes the input circuit and also has a digital interface transmitter. Further, the
AKD5367A-A can achieve the interface with digital audio systems via optical connector. And it can
achieve the direct interface with AKEMD’s D/A converter evaluation boards of via 10-line flat cable.
Ordering Guide
AKD5367A-A --- AK5367A Evaluation Board
(Cable for connecting with printer port of IBM-AT compatible PC and control software
are enclosed with board. This control software does not support Windows NT.)
FUNCTION
•DIT with optical output
•BNC connector for an external clock input
•10pin header for serial control interface
RIN1
LIN1
AK4104
(DIT)
10pinHeader
AK5367A
REG +3.3V
AVDD CVDD
JP3
DVDD VSS1
VSS2
AGND DGND
MCLK_EXT
12.288MHz
D3V
Clock
Generator
Opt
Out
PORT1
AVDD CVDD DVDD
JP2
RIN2
LIN2
RIN3
LIN3
RIN4
LIN4
JP4
PORT2
ROM PORT3 uP-I/F
Figure 1. AKD5367A-A Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
AK5367A Evaluation Board Rev.0
A
KD5367A-
A

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Operation Sequence
1) Set up the power supplies lines. (Note 1)
Connector
name Connector color Voltage Used for Comment and attention Default
Setting
AVDD Orange
+4.75~+5.25
V AVDD for AK5367A, Regulator T1. This connector must be connected. +5V
DVDD Red +3.0~+3.6V DVDD for AK5367A This connector is used when DVDD of AK5367A is supplied from DVDD connector without regulator T1.
In this case, JP2 should be open. (Default) +3.3V
CVDD Red +3.0~+3.6V CVDD for AK5367A This connector is used when CVDD of AK5367A is supplied from CVDD connector without regulator T1.
In this case, JP3 should be open. (Default) +3.3V
D3V Red +3.0~+3.6V
AK4104,
Logic circuit
This connector is used when power of AK4104 and
logic circuit is supplied from +3.3V connector without
regulator T1. In this case, JP4 should be open. (Default) +3.3V
AGND Black 0V Analog ground This connector must be connected. 0V
DGND Black 0V Digital ground This connector is used when DGND is supplied separately from AGND. In this case, JP1 should be
open. (Default) 0V
Table 1. Power Supply Lines
Note 1. Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.)
3) Power on.
The AK5367A and AK4104 should be reset once bringing SW1 and SW2 = “L” and return it to “H” to upon
power-up.
Evaluation Mode
(1)Slave mode
When evaluating the AK5367A using the AK4104, the setting of the AK5367A’s audio interface format
should be the same as the AK4104’s format. When the AK4104 is used, the audio interface format is the
default setting of 16/24bit I2S compatible. Therefore, set DIF bit=”1” to agree with the AK4104’s format.
(1-1) A/D evaluation using AK4104 DIT function
PORT1 (DIT) is used. DIT generates audio bi-phase signal from received data and it is output through optical
connector (TOTX141). It is possible to connect AKEMD’s D/A converter evaluation boards on the
digital-amplifier. The clock can be generated from crystal oscillator X1 or be input from J11 (BNC) or PORT2
(ROM).

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(1-1-1) The MCLK is generated from crystal oscillator X1
Please set JP10 (CLK) “XTL”, open JP8 (XTE), and short JP5 (LRCK), JP6 (BICK), JP7 (MCLK), JP9 (EXT).
MCLK can be selected to 256fs or 512fs with JP11 and JP12. In this case, please do not connect anything with
PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 2. Switch Setting when the MCLK is Generated from Crystal Oscillator X1
(1-1-2) The MCLK is input from BNC
Please set JP10 (CLK) “EXT”, short JP5 (LRCK), JP6 (BICK), JP7 (MCLK) and JP8 (XTE), open JP9 (EXT).
MCLK can be selected to 256fs or 512fs with JP11 and JP12. In this case, please do not connect anything with
PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 3. Switch Setting when the MCLK is Input from BNC
(1-1-3) The MCLK, BICK and LRCK input from PORT2
Please open JP5 (LRCK), JP6 (BICK), JP7 (MCLK), JP8(XTE), JP9(EXT) and JP10(CLK) when input the
external clock from PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 4. Switch Setting when the External Clock is Input from PORT2 (ROM)
(1-2) The A/D converter is evaluated with external AP equipment by using PORT2 (ROM)
The analog to digital conversion data can be transmitted from PORT2 (ROM). The clock can be generated from
crystal oscillator X1 or J11 (BNC) or PORT2 (ROM). Refer to (1-1-1), (1-1-2) and (1-1-3) to setting the
switches.

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(2)Master mode
(2-1) A/D evaluation using AK4104 DIT function
PORT1 (DIT) is used. DIT generates audio bi-phase signal from received data and it is output through optical
connector (TOTX141). It is possible to connect AKEMD’s D/A converter evaluation boards on the
digital-amplifier. The MCLK can be generated from crystal oscillator X1 or be input fromJ11 (BNC) or PORT2
(ROM).
(2-1-1) The MCLK is generated from crystal oscillator X1
Please set JP10 (CLK) “XTL”, open JP5 (LRCK), JP6 (BICK) and JP8 (XTE), short JP7 (MCLK) and JP9
(EXT). In this case, please do not connect anything with PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 5. Switch Setting when the MCLK is Generated from Crystal Oscillator X1
(2-1-2) The MCLK input from BNC
Please set JP10 (CLK) “EXT”, short JP7 (MCLK) and JP8 (XTE), open JP5 (LRCK), JP6 (BICK) and JP9
(EXT). In this case, please do not connect anything with PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 6. Switch Setting when the MCLK is Input from BNC
(2-1-3) The MCLK is input from PORT2
Please open JP5 (LRCK), JP6 (BICK), JP7 (MCLK), JP8(XTE), JP9(EXT) and JP10(CLK) when input the
external clock from PORT2 (ROM).
JP10
CLK
JP6
BICK JP7
MCLK
X
TL
EXT
JP8
XTE JP9
EXT
JP5
LRCK
Figure 7. Switch Setting when the MCLK is Input from PORT2 (ROM)
(2-2) The A/D converter is evaluated with external AP equipment by using PORT2 (ROM)

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The analog to digital conversion data can be transmitted from PORT2 (ROM). The MCLK can be generated
from crystal oscillator X1 or J11 (BNC) or PORT2 (ROM). Refer to (2-1-1), (2-1-2) and (2-1-3) to setting the
switches.

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Other Jumper Pins Set Up
1. JP1 (GND): Analog and Digital ground
OPEN: Separated. <Default>
SHORT: Common. (The connector “DGND” can be open.)
2. JP2 (DVDD): Select AVDD for AK5367A
OPEN: Supply from DVDD connector. <Default>
SHORT: Supply from regulator T1. In this case, DVDD connector should be open.
3. JP3 (CVDD): Select DVDD for AK5367A
OPEN: Supply from CVDD connector. <Default>
SHORT: Supply from regulator T1. In this case, CVDD connector should be open.
4. JP4 (D3V): Select D3V for AK4104 and logic circuit
OPEN: Supply from D3V connector. <Default>
SHORT: Supply from regulator T1. In this case, D3V connector should be open.
5. JP11 (SBICK), JP12 (SLRCK): Select MCLK frequency
256: MCLK=256fs (=12.288MHz@fs=48kHz) <Default>
512: MCLK=512fs (=24.576MHz@fs=48kHz)
The Function of the Toggle SW
Upper-side is “H” and lower-side is “L”.
[SW1] (5367_PDN): Resets of AK5367A. Keep “H” during normal operation.
[SW2] (DIT_PDN): Resets of AK4104. Keep “H” during normal operation.
Serial Control
AKD5367A-A can be controlled through the printer port of IBM-AT compatible machine (parallel port). Please
connect PORT3 (uP-I/F) and PC with bundled ten line flat cable.
10 wire
flat cable
10pin Connector
Connect
PC AKD5367A-A
SDA(ACK)
SCL
SDA
10pin Header
10
1
PORT3
uP-I/F
Figure 8. 10pin Header Connecting

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Analog Input/Output Circuit
1. Analog input circuit
The analog input of AK5367A are input from J1~J8.
R1
47k RIN1
+
C33
short
RIN2
RIN3
RIN4
LIN2
LIN1
LIN3
LIN4
R3
47k
+
C35
short
+
C34
short
R4
47k
R5
47k
+
C37
short
+
C36
short
R6
47k
R7
47k
+
C39
short
+
C38
short
R8
47k
LIN1
J1
MR-552LS
2
3
1
LIN2
J3
MR-552LS
2
3
1
LIN3
J5
MR-552LS
2
3
1
+
C32
short
LIN4
J7
MR-552LS
2
3
1
RIN1
J2
MR-552LS
2
3
1
RIN2
J4
MR-552LS
2
3
1
RIN3
J6
MR-552LS
2
3
1
RIN4
J8
MR-552LS
2
3
1
R2
47k
Figure 9. Analog Input Circuits
* AKEMD assumes no responsibility for the trouble when using the circuit examples.

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CONTROL SOFTWARE MANUAL
Set-up of Evaluation Board and Control Software
1.Set up the AKD5367A-A according to previous term.
2.Connect IBM-AT compatible PC with AKD5367A-A by 10-line type flat cable (packed with AKD5367A-A). Take
care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3.Insert the CD-ROM labeled “AKD5367A-A Evaluation Kit” into the CD-ROM drive.
4.Access the CD-ROM drive and double-click the icon of “AKD5367A-A.exe” to set up the control program.
5.Then please evaluate according to the follows.
Operation Flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
Explanation of Each Buttons
1. [Port Reset]: Set up the USB interface board (AKDUSBIF-A) .
2. [Write default]: Initialize the register of AK5367A.
3. [All Write]: Write all registers that is currently displayed.
4. [Function1]: Dialog to write data by keyboard operation.
5. [Function2]: Dialog to write data by keyboard operation.
6. [Function3]: The sequence of register setting can be set and executed.
7. [Function4]: The sequence that is created on [Function3] can be assigned to buttons and executed.
8. [Function5]: The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
9. [SAVE]: Save the current register setting.
10. [OPEN]: Write the saved values to all register.
11. [Write] : Dialog to write data by mouse operation.
Indication of Data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.

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Explanation of Each Dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK5367A, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal.
Data Box: Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK5367A, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate ATT
Address Box: Input registers address in 2 figures of hexadecimal.
Start Data Box: Input starts data in 2 figures of hexadecimal.
End Data Box: Input end data in 2 figures of hexadecimal.
Interval Box: Data is written to AK5367A by this interval.
Step Box: Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to AK5367A, click [OK] button. If not, click [Cancel] button.

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4. [Save] and [Open]
4-1. [Save]
Save the current register setting data. The extension of file name is “akr”.
(Operation flow)
(1) Click [Save] Button.
(2) Set the file name and push [Save] Button. The extension of file name is “akr”.
4-2. [Open]
The register setting data saved by [Save] is written to AK5367A. The file type is the same as [Save].
(Operation flow)
(1) Click [Open] Button.
(2) Select the file (*.akr) and Click [Open] Button.

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5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [Start] button. Then this sequence is executed.
The sequence is paused at the step of Interval= “-1”. Click [START] button, the sequence restarts from the paused
step. This sequence can be saved and opened by [Save] and[Open] button on the Function3 window. The extension
of file name is “aks”.
Figure 10. Window of [F3]

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6. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the
window as shown in Figure 11 opens.
Figure 11. [F4] window

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6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks).
The sequence file name is displayed as shown in Figure 12.
Figure 12. [F4] window (2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The sequence file names can assign be saved. The file name is *.ak4.
[OPEN]: The sequence file names assign that are saved in *.ak4 are loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.

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7. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When
[F5] button is clicked, the following window as shown in Figure 13 opens.
Figure 13. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The register setting file names assign can be saved. The file name is *.ak5.
[OPEN]: The register setting file names assign that are saved in *.ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to
reflect the change.

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MEASUREMENT RESULTS
[Measurement condition]
•Measurement unit : Audio Precision, System Two Cascade
•MCLK : 512fs (fs=48kHz), 256fs (fs=96kHz)
•BICK :64fs
•fs : 48kHz, 96kHz
•Bit : 24bit
•Power Supply : AVDD = 5.0V, DVDD = CVDD = 3.3V
•Interface : DSP Data (10pin Header : PSIA)
•Temperature : Room
[Measurement Results]
Parameter Result Unit
L1ch / R1ch L2ch / R2ch L3ch / R3ch L4ch / R4ch
ADC Analog Input Characteristics:
S/(N+D): Filter=none
(fs=48kHz, -1dBFS, BW=20kHz)
(fs=96kHz, -1dBFS, BW=40kHz)
90.2 / 90.7
91.3 / 91.9
90.2 / 90.8
91.3 / 91.9
90.2 / 90.7
91.3 / 91.9
90.2 / 90.7
91.1 / 91.7
dB
dB
D-Range: Filter=A-weighted
(fs=48kHz, -60dBFS, BW=20kHz)
(fs=96kHz, -60dBFS, BW=40kHz)
101.7 / 101.9
102.6 / 102.8
101.8 / 101.9
102.6 / 102.8
101.7 / 101.9
102.6 / 102.8
101.7 / 102.0
102.0 / 102.2
dB
dB
S/N: Filter=A-weighted
(fs=48kHz, No signal, BW=20kHz)
(fs=96kHz, No signal, BW=40kHz)
101.8 / 102.1
102.7 / 102.9
101.9 / 102.1
102.7 / 102.9
101.9 / 102.1
102.7 / 102.9
101.9 / 102.1
102.3 / 102.5
dB
dB

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[ADC Plot: fs=48kHz]
AKM AK5367A THD+N vs. Input Level
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, fin=1kHz
-120
-70
-115
-110
-105
-100
-95
-90
-85
-80
-75
d
B
F
S
-140 +0-130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBr
Figure 14. THD+N vs. Input Level
AKM AK5367A THD+N vs. Input Frequency
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, -1dBFS input
-120
-70
-115
-110
-105
-100
-95
-90
-85
-80
-75
d
B
F
S
20 20k50 100 200 500 1k 2k 5k 10k
Hz
TTTTTTTTTT
Figure 15. THD+N vs. Input Frequency

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AKM AK5367A Linearity
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, fin=1kHz
-130 +0-120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBr
-130
+0
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
F
S
TTTT
Figure 16. Linearity
AKM AK5367A Frequency Response
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, -1dBFS input
2k 20k4k 6k 8k 10k 12k 14k 16k 18k
Hz
-2
-0
-1.9
-1.8
-1.7
-1.6
-1.5
-1.4
-1.3
-1.2
-1.1
-1
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
d
B
F
S
Figure 17. Frequency Response

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AKM AK5367A Crosstalk (Red=LIN1, Blue=RIN1)
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, -1dBFS input
-120
-50
-115
-110
-105
-100
-95
-90
-85
-80
-75
-70
-65
-60
-55
d
B
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 18. Crosstalk
AKM AK5367A FFT
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, -1dBFS input
-180
+0
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
F
S
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 19. FFT Plot

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AKM AK5367A FFT
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, -60dBFS input
-180
+0
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
F
S
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 20. FFT Plot
AKM AK5367A FFT
AVDD=5V, DVDD=CVDD=3.3V, fs=48kHz, MCLK=512fs, No signal input
-180
+0
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
F
S
20 20k50 100 200 500 1k 2k 5k 10k
Hz
Figure 21. FFT Plot

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[ADC Plot: fs=96kHz]
AKM AK5367A THD+Nvs. Input Level
AVDD=5V, DVDD=CVDD=3.3V, fs=96kHz, MCLK=256fs, fin=1kHz
-140 +0-130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10
dBr
-120
-70
-115
-110
-105
-100
-95
-90
-85
-80
-75
d
B
F
S
Figure 22. THD+N vs. Input Level
AKM AK5367A THD+Nvs. Input Frequency
AVDD=5V, DVDD=CVDD=3.3V, fs=96kHz, MCLK=256fs, -1dBFS input
40 40k50 100 200 500 1k 2k 5k 10k 20k
Hz
-120
-70
-115
-110
-105
-100
-95
-90
-85
-80
-75
d
B
F
S
TTTTT
Figure 23. THD+N vs. Input Frequency